pxa2x0_i2c.c revision 1.4.10.1
1 /* $NetBSD: pxa2x0_i2c.c,v 1.4.10.1 2011/06/23 14:19:01 cherry Exp $ */ 2 /* $OpenBSD: pxa2x0_i2c.c,v 1.2 2005/05/26 03:52:07 pascoe Exp $ */ 3 4 /* 5 * Copyright (c) 2005 Christopher Pascoe <pascoe (at) openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #include <sys/cdefs.h> 21 __KERNEL_RCSID(0, "$NetBSD: pxa2x0_i2c.c,v 1.4.10.1 2011/06/23 14:19:01 cherry Exp $"); 22 23 #include <sys/param.h> 24 #include <sys/systm.h> 25 #include <sys/device.h> 26 #include <sys/bus.h> 27 28 #include <dev/i2c/i2cvar.h> 29 30 #include <arm/xscale/pxa2x0reg.h> 31 #include <arm/xscale/pxa2x0var.h> 32 #include <arm/xscale/pxa2x0_i2c.h> 33 34 #ifdef PXAIIC_DEBUG 35 #define DPRINTF(s) printf s 36 #else 37 #define DPRINTF(s) do { } while (/*CONSTCOND*/0) 38 #endif 39 40 #define I2C_RETRY_COUNT 10 41 42 int 43 pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *sc) 44 { 45 int error; 46 47 error = bus_space_map(sc->sc_iot, PXA2X0_I2C_BASE, sc->sc_size, 0, 48 &sc->sc_ioh); 49 if (error) { 50 aprint_error_dev(sc->sc_dev, "unable to map register\n"); 51 sc->sc_size = 0; 52 return error; 53 } 54 55 bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size, 56 BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE); 57 58 sc->sc_icr = ICR_GCD | ICR_SCLE | ICR_IUE; 59 #if 0 60 if (ISSET(sc->sc_flags, PI2CF_ENABLE_INTR)) 61 sc->sc_icr |= ICR_BEIE | ICR_DRFIE | ICR_ITEIE; 62 #endif 63 if (ISSET(sc->sc_flags, PI2CF_FAST_MODE)) 64 sc->sc_icr |= ICR_FM; 65 66 pxa2x0_i2c_init(sc); 67 68 return 0; 69 } 70 71 int 72 pxa2x0_i2c_detach_sub(struct pxa2x0_i2c_softc *sc) 73 { 74 75 if (sc->sc_size != 0) { 76 bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size); 77 sc->sc_size = 0; 78 } 79 pxa2x0_clkman_config(CKEN_I2C, 0); 80 return 0; 81 } 82 83 void 84 pxa2x0_i2c_init(struct pxa2x0_i2c_softc *sc) 85 { 86 87 pxa2x0_i2c_open(sc); 88 pxa2x0_i2c_close(sc); 89 } 90 91 void 92 pxa2x0_i2c_open(struct pxa2x0_i2c_softc *sc) 93 { 94 95 /* Enable the clock to the standard I2C unit. */ 96 pxa2x0_clkman_config(CKEN_I2C, 1); 97 } 98 99 void 100 pxa2x0_i2c_close(struct pxa2x0_i2c_softc *sc) 101 { 102 103 /* Reset and disable the standard I2C unit. */ 104 bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ICR, ICR_UR); 105 bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ISAR, 0); 106 delay(1); 107 pxa2x0_clkman_config(CKEN_I2C, 0); 108 } 109 110 int 111 pxa2x0_i2c_read(struct pxa2x0_i2c_softc *sc, u_char slave, u_char *valuep) 112 { 113 bus_space_tag_t iot = sc->sc_iot; 114 bus_space_handle_t ioh = sc->sc_ioh; 115 int timeout; 116 int tries = I2C_RETRY_COUNT; 117 uint32_t rv; 118 119 retry: 120 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 121 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 122 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE | ISR_IRF); 123 delay(1); 124 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 125 126 /* Write slave device address. */ 127 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1) | 0x1); 128 rv = bus_space_read_4(iot, ioh, I2C_ICR); 129 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 130 rv = bus_space_read_4(iot, ioh, I2C_ICR); 131 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 132 rv = bus_space_read_4(iot, ioh, I2C_ICR); 133 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 134 135 timeout = 10000; 136 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 137 if (timeout-- == 0) 138 goto err; 139 delay(1); 140 } 141 142 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 143 144 rv = bus_space_read_4(iot, ioh, I2C_ICR); 145 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 146 147 /* Read data value. */ 148 rv = bus_space_read_4(iot, ioh, I2C_ICR); 149 bus_space_write_4(iot, ioh, I2C_ICR, rv | 150 (ICR_STOP | ICR_ACKNAK)); 151 rv = bus_space_read_4(iot, ioh, I2C_ICR); 152 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 153 154 timeout = 10000; 155 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_IRF) == 0) { 156 if (timeout-- == 0) 157 goto err; 158 delay(1); 159 } 160 161 bus_space_write_4(iot, ioh, I2C_ISR, ISR_IRF); 162 163 rv = bus_space_read_4(iot, ioh, I2C_IDBR); 164 *valuep = (u_char)rv; 165 rv = bus_space_read_4(iot, ioh, I2C_ICR); 166 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~(ICR_STOP | ICR_ACKNAK)); 167 168 return 0; 169 170 err: 171 if (tries-- >= 0) 172 goto retry; 173 174 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 175 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 176 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE | ISR_IRF); 177 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 178 179 return EIO; 180 } 181 182 int 183 pxa2x0_i2c_write(struct pxa2x0_i2c_softc *sc, u_char slave, u_char value) 184 { 185 bus_space_tag_t iot = sc->sc_iot; 186 bus_space_handle_t ioh = sc->sc_ioh; 187 int timeout; 188 int tries = I2C_RETRY_COUNT; 189 uint32_t rv; 190 191 retry: 192 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 193 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 194 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 195 delay(1); 196 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 197 198 /* Write slave device address. */ 199 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1)); 200 rv = bus_space_read_4(iot, ioh, I2C_ICR); 201 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 202 rv = bus_space_read_4(iot, ioh, I2C_ICR); 203 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 204 rv = bus_space_read_4(iot, ioh, I2C_ICR); 205 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 206 207 timeout = 10000; 208 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 209 if (timeout-- == 0) 210 goto err; 211 delay(1); 212 } 213 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 214 goto err; 215 216 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 217 218 /* Write data. */ 219 rv = bus_space_read_4(iot, ioh, I2C_ICR); 220 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 221 rv = bus_space_read_4(iot, ioh, I2C_ICR); 222 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP); 223 bus_space_write_4(iot, ioh, I2C_IDBR, value); 224 rv = bus_space_read_4(iot, ioh, I2C_ICR); 225 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 226 227 timeout = 10000; 228 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 229 if (timeout-- == 0) 230 goto err; 231 delay(1); 232 } 233 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 234 goto err; 235 236 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 237 238 rv = bus_space_read_4(iot, ioh, I2C_ICR); 239 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 240 241 return 0; 242 243 err: 244 if (tries-- >= 0) 245 goto retry; 246 247 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 248 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 249 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 250 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 251 252 return EIO; 253 } 254 255 /* 256 * XXX The quick_{read,write} opertions are untested! 257 */ 258 int 259 pxa2x0_i2c_quick(struct pxa2x0_i2c_softc *sc, u_char slave, u_char rw) 260 { 261 bus_space_tag_t iot = sc->sc_iot; 262 bus_space_handle_t ioh = sc->sc_ioh; 263 int timeout; 264 int tries = I2C_RETRY_COUNT; 265 uint32_t rv; 266 267 retry: 268 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 269 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 270 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 271 delay(1); 272 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 273 274 /* Write slave device address. */ 275 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1) | (rw & 1)); 276 rv = bus_space_read_4(iot, ioh, I2C_ICR); 277 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 278 rv = bus_space_read_4(iot, ioh, I2C_ICR); 279 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP); 280 rv = bus_space_read_4(iot, ioh, I2C_ICR); 281 282 timeout = 10000; 283 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 284 if (timeout-- == 0) 285 goto err; 286 delay(1); 287 } 288 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 289 goto err; 290 291 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 292 293 rv = bus_space_read_4(iot, ioh, I2C_ICR); 294 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 295 296 return 0; 297 298 err: 299 if (tries-- >= 0) 300 goto retry; 301 302 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 303 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 304 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 305 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 306 307 return EIO; 308 } 309 310 int 311 pxa2x0_i2c_write_2(struct pxa2x0_i2c_softc *sc, u_char slave, u_short value) 312 { 313 bus_space_tag_t iot = sc->sc_iot; 314 bus_space_handle_t ioh = sc->sc_ioh; 315 int timeout; 316 int tries = I2C_RETRY_COUNT; 317 uint32_t rv; 318 319 retry: 320 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 321 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 322 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 323 delay(1); 324 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 325 326 /* Write slave device address. */ 327 bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1)); 328 rv = bus_space_read_4(iot, ioh, I2C_ICR); 329 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START); 330 rv = bus_space_read_4(iot, ioh, I2C_ICR); 331 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 332 rv = bus_space_read_4(iot, ioh, I2C_ICR); 333 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 334 335 timeout = 10000; 336 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 337 if (timeout-- == 0) 338 goto err; 339 delay(1); 340 } 341 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 342 goto err; 343 344 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 345 346 /* Write upper 8 bits of data. */ 347 bus_space_write_4(iot, ioh, I2C_IDBR, (value >> 8) & 0xff); 348 rv = bus_space_read_4(iot, ioh, I2C_ICR); 349 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 350 rv = bus_space_read_4(iot, ioh, I2C_ICR); 351 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 352 rv = bus_space_read_4(iot, ioh, I2C_ICR); 353 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 354 355 timeout = 10000; 356 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 357 if (timeout-- == 0) 358 goto err; 359 delay(1); 360 } 361 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 362 goto err; 363 364 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 365 366 /* Write lower 8 bits of data. */ 367 bus_space_write_4(iot, ioh, I2C_IDBR, value & 0xff); 368 rv = bus_space_read_4(iot, ioh, I2C_ICR); 369 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START); 370 rv = bus_space_read_4(iot, ioh, I2C_ICR); 371 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP); 372 rv = bus_space_read_4(iot, ioh, I2C_ICR); 373 bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB); 374 375 timeout = 10000; 376 while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) { 377 if (timeout-- == 0) 378 goto err; 379 delay(1); 380 } 381 if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0) 382 goto err; 383 384 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 385 386 rv = bus_space_read_4(iot, ioh, I2C_ICR); 387 bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP); 388 389 return 0; 390 391 err: 392 if (tries-- >= 0) 393 goto retry; 394 395 bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR); 396 bus_space_write_4(iot, ioh, I2C_ISAR, 0x00); 397 bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE); 398 bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE); 399 400 return EIO; 401 } 402 403 /* ---------------------------------------------------------------------------- 404 * for i2c_controller 405 */ 406 407 #define CSR_READ_4(sc,r) bus_space_read_4(sc->sc_iot, sc->sc_ioh, r) 408 #define CSR_WRITE_4(sc,r,v) bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v) 409 410 #define ISR_ALL (ISR_RWM | ISR_ACKNAK | ISR_UE | ISR_IBB \ 411 | ISR_SSD | ISR_ALD | ISR_ITE | ISR_IRF \ 412 | ISR_GCAD | ISR_SAD | ISR_BED) 413 414 #define I2C_TIMEOUT 100 /* protocol timeout, in uSecs */ 415 416 void 417 pxa2x0_i2c_reset(struct pxa2x0_i2c_softc *sc) 418 { 419 420 CSR_WRITE_4(sc, I2C_ICR, ICR_UR); 421 CSR_WRITE_4(sc, I2C_ISAR, 0); 422 CSR_WRITE_4(sc, I2C_ISR, ISR_ALL); 423 while (CSR_READ_4(sc, I2C_ICR) & ~ICR_UR) 424 continue; 425 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr); 426 } 427 428 int 429 pxa2x0_i2c_wait(struct pxa2x0_i2c_softc *sc, int bit, int flags) 430 { 431 uint32_t isr; 432 int error; 433 int i; 434 435 for (i = I2C_TIMEOUT; i >= 0; --i) { 436 isr = CSR_READ_4(sc, I2C_ISR); 437 if (isr & (bit | ISR_BED)) 438 break; 439 delay(1); 440 } 441 442 if (isr & (ISR_BED | (bit & ISR_ALD))) 443 error = EIO; 444 else if (isr & (bit & ~ISR_ALD)) 445 error = 0; 446 else 447 error = ETIMEDOUT; 448 449 CSR_WRITE_4(sc, I2C_ISR, isr); 450 451 return error; 452 } 453 454 int 455 pxa2x0_i2c_send_start(struct pxa2x0_i2c_softc *sc, int flags) 456 { 457 458 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_START); 459 delay(I2C_TIMEOUT); 460 return 0; 461 } 462 463 int 464 pxa2x0_i2c_send_stop(struct pxa2x0_i2c_softc *sc, int flags) 465 { 466 467 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_STOP); 468 delay(I2C_TIMEOUT); 469 return 0; 470 } 471 472 int 473 pxa2x0_i2c_initiate_xfer(struct pxa2x0_i2c_softc *sc, uint16_t addr, int flags) 474 { 475 int rd_req = (flags & I2C_F_READ) ? 1 : 0; 476 int error; 477 478 if ((addr & ~0x7f) != 0) { 479 error = EINVAL; 480 goto error; 481 } 482 483 CSR_WRITE_4(sc, I2C_IDBR, (addr << 1) | rd_req); 484 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_START | ICR_TB); 485 486 error = pxa2x0_i2c_wait(sc, ISR_ITE, flags); 487 error: 488 if (error) { 489 DPRINTF(("%s: failed to initiate %s xfer (error=%d)\n", 490 device_xname(sc->sc_dev), 491 rd_req ? "read" : "write", error)); 492 return error; 493 } 494 return 0; 495 } 496 497 int 498 pxa2x0_i2c_read_byte(struct pxa2x0_i2c_softc *sc, uint8_t *bytep, int flags) 499 { 500 int last_byte = flags & I2C_F_LAST; 501 int send_stop = flags & I2C_F_STOP; 502 int error; 503 504 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_TB 505 | (last_byte ? ICR_ACKNAK : 0) | (send_stop ? ICR_STOP : 0)); 506 error = pxa2x0_i2c_wait(sc, ISR_IRF | ISR_ALD, flags); 507 if (error) { 508 DPRINTF(("%s: read byte failed\n", device_xname(sc->sc_dev))); 509 return error; 510 } 511 512 *bytep = CSR_READ_4(sc, I2C_IDBR); 513 return 0; 514 } 515 516 int 517 pxa2x0_i2c_write_byte(struct pxa2x0_i2c_softc *sc, uint8_t byte, int flags) 518 { 519 int send_stop = flags & I2C_F_STOP; 520 int error; 521 522 CSR_WRITE_4(sc, I2C_IDBR, byte); 523 CSR_WRITE_4(sc, I2C_ICR, sc->sc_icr | ICR_TB 524 | (send_stop ? ICR_STOP : 0)); 525 error = pxa2x0_i2c_wait(sc, ISR_ITE | ISR_ALD, flags); 526 if (error) { 527 DPRINTF(("%s: write byte failed\n", device_xname(sc->sc_dev))); 528 return error; 529 } 530 return 0; 531 } 532
Indexes created Wed Oct 22 13:09:56 GMT 2025