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pxa2x0_intr.h revision 1.12.16.1
      1  1.12.16.1     yamt /*	$NetBSD: pxa2x0_intr.h,v 1.12.16.1 2012/10/30 17:19:11 yamt Exp $ */
      2        1.1      bsh 
      3        1.1      bsh /* Derived from i80321_intr.h */
      4        1.1      bsh 
      5        1.1      bsh /*
      6        1.1      bsh  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      7        1.1      bsh  * All rights reserved.
      8        1.1      bsh  *
      9        1.1      bsh  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     10        1.1      bsh  *
     11        1.1      bsh  * Redistribution and use in source and binary forms, with or without
     12        1.1      bsh  * modification, are permitted provided that the following conditions
     13        1.1      bsh  * are met:
     14        1.1      bsh  * 1. Redistributions of source code must retain the above copyright
     15        1.1      bsh  *    notice, this list of conditions and the following disclaimer.
     16        1.1      bsh  * 2. Redistributions in binary form must reproduce the above copyright
     17        1.1      bsh  *    notice, this list of conditions and the following disclaimer in the
     18        1.1      bsh  *    documentation and/or other materials provided with the distribution.
     19        1.1      bsh  * 3. All advertising materials mentioning features or use of this software
     20        1.1      bsh  *    must display the following acknowledgement:
     21        1.1      bsh  *	This product includes software developed for the NetBSD Project by
     22        1.1      bsh  *	Wasabi Systems, Inc.
     23        1.1      bsh  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     24        1.1      bsh  *    or promote products derived from this software without specific prior
     25        1.1      bsh  *    written permission.
     26        1.1      bsh  *
     27        1.1      bsh  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     28        1.1      bsh  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29        1.1      bsh  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30        1.1      bsh  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     31        1.1      bsh  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32        1.1      bsh  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33        1.1      bsh  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34        1.1      bsh  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35        1.1      bsh  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36        1.1      bsh  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37        1.1      bsh  * POSSIBILITY OF SUCH DAMAGE.
     38        1.1      bsh  */
     39        1.1      bsh 
     40        1.1      bsh #ifndef _PXA2X0_INTR_H_
     41        1.1      bsh #define _PXA2X0_INTR_H_
     42        1.1      bsh 
     43        1.2  thorpej #define	ARM_IRQ_HANDLER	_C_LABEL(pxa2x0_irq_handler)
     44        1.2  thorpej 
     45        1.2  thorpej #ifndef _LOCORE
     46        1.2  thorpej 
     47        1.1      bsh #include <arm/cpu.h>
     48        1.1      bsh #include <arm/armreg.h>
     49        1.1      bsh #include <arm/cpufunc.h>
     50        1.1      bsh #include <machine/intr.h>
     51        1.1      bsh 
     52        1.1      bsh #include <arm/xscale/pxa2x0reg.h>
     53        1.1      bsh 
     54  1.12.16.1     yamt extern vaddr_t pxaic_base;		/* Shared with pxa2x0_irq.S */
     55       1.10    bjh21 #define read_icu(offset) (*(volatile uint32_t *)(pxaic_base + (offset)))
     56        1.1      bsh #define write_icu(offset,value) \
     57       1.10    bjh21  (*(volatile uint32_t *)(pxaic_base + (offset)) = (value))
     58        1.1      bsh 
     59        1.7    perry extern volatile int intr_mask;
     60        1.1      bsh extern int pxa2x0_imask[];
     61       1.11     matt 
     62       1.11     matt #ifdef __PROG32
     63        1.1      bsh 
     64        1.1      bsh /*
     65        1.1      bsh  * Cotulla's integrated ICU doesn't have IRQ0..7, so
     66        1.1      bsh  * we map software interrupts to bit 0..3
     67        1.1      bsh  */
     68        1.7    perry static inline void
     69        1.1      bsh pxa2x0_setipl(int new)
     70        1.1      bsh {
     71       1.11     matt 	set_curcpl(new);
     72       1.11     matt 	intr_mask = pxa2x0_imask[new];
     73       1.10    bjh21 	write_icu(SAIPIC_MR, intr_mask);
     74        1.1      bsh }
     75        1.1      bsh 
     76        1.1      bsh 
     77        1.7    perry static inline void
     78        1.1      bsh pxa2x0_splx(int new)
     79        1.1      bsh {
     80        1.1      bsh 	int psw;
     81        1.1      bsh 
     82        1.1      bsh 	psw = disable_interrupts(I32_bit);
     83        1.1      bsh 	pxa2x0_setipl(new);
     84        1.1      bsh 	restore_interrupts(psw);
     85        1.1      bsh 
     86       1.11     matt #ifdef __HAVE_FAST_SOFTINTS
     87       1.11     matt 	cpu_dosoftints();
     88       1.11     matt #endif
     89        1.1      bsh }
     90        1.1      bsh 
     91        1.1      bsh 
     92        1.7    perry static inline int
     93        1.1      bsh pxa2x0_splraise(int ipl)
     94        1.1      bsh {
     95       1.10    bjh21 	int old, psw;
     96        1.1      bsh 
     97       1.11     matt 	old = curcpl();
     98       1.11     matt 	if (ipl > old) {
     99        1.1      bsh 		psw = disable_interrupts(I32_bit);
    100        1.1      bsh 		pxa2x0_setipl(ipl);
    101        1.1      bsh 		restore_interrupts(psw);
    102        1.1      bsh 	}
    103        1.1      bsh 
    104       1.10    bjh21 	return old;
    105        1.1      bsh }
    106        1.1      bsh 
    107        1.7    perry static inline int
    108        1.1      bsh pxa2x0_spllower(int ipl)
    109        1.1      bsh {
    110       1.11     matt 	int old = curcpl();
    111        1.1      bsh 	int psw = disable_interrupts(I32_bit);
    112       1.10    bjh21 
    113        1.1      bsh 	pxa2x0_splx(ipl);
    114        1.1      bsh 	restore_interrupts(psw);
    115       1.10    bjh21 	return old;
    116        1.1      bsh }
    117        1.1      bsh 
    118        1.1      bsh /*
    119        1.1      bsh  * An useful function for interrupt handlers.
    120        1.1      bsh  * XXX: This shouldn't be here.
    121        1.1      bsh  */
    122        1.7    perry static inline int
    123       1.10    bjh21 find_first_bit(uint32_t bits)
    124        1.1      bsh {
    125       1.10    bjh21 	/*
    126       1.10    bjh21 	 * Since CLZ is available only on ARMv5, this isn't portable
    127        1.1      bsh 	 * to all ARM CPUs.  This file is for PXA2[15]0 processor.
    128        1.1      bsh 	 */
    129       1.11     matt 	return 31 - __builtin_clz(bits);
    130        1.1      bsh }
    131        1.1      bsh 
    132       1.11     matt #endif /* __PROG32 */
    133        1.1      bsh 
    134        1.1      bsh int	_splraise(int);
    135        1.1      bsh int	_spllower(int);
    136        1.1      bsh void	splx(int);
    137        1.1      bsh void	_setsoftintr(int);
    138        1.1      bsh 
    139        1.1      bsh #if !defined(EVBARM_SPL_NOINLINE)
    140        1.1      bsh 
    141        1.1      bsh #define splx(new)		pxa2x0_splx(new)
    142        1.1      bsh #define	_spllower(ipl)		pxa2x0_spllower(ipl)
    143        1.1      bsh #define	_splraise(ipl)		pxa2x0_splraise(ipl)
    144        1.1      bsh #define	_setsoftintr(si)	pxa2x0_setsoftintr(si)
    145        1.1      bsh 
    146        1.1      bsh #endif	/* !EVBARM_SPL_NOINTR */
    147        1.3      scw 
    148        1.3      scw /*
    149        1.3      scw  * This function *MUST* be called very early on in a port's
    150        1.3      scw  * initarm() function, before ANY spl*() functions are called.
    151        1.3      scw  *
    152        1.3      scw  * The parameter is the virtual address of the PXA2x0's Interrupt
    153        1.3      scw  * Controller registers.
    154        1.3      scw  */
    155        1.3      scw void pxa2x0_intr_bootstrap(vaddr_t);
    156        1.3      scw 
    157        1.3      scw void pxa2x0_irq_handler(void *);
    158        1.3      scw void *pxa2x0_intr_establish(int irqno, int level,
    159        1.3      scw 			    int (*func)(void *), void *cookie);
    160        1.9    peter void pxa2x0_intr_disestablish(void *cookie);
    161        1.3      scw void pxa2x0_update_intr_masks(int irqno, int level);
    162        1.2  thorpej 
    163        1.2  thorpej #endif /* ! _LOCORE */
    164        1.1      bsh 
    165        1.4   dogcow #endif /* _PXA2X0_INTR_H_ */
    166