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pxa2x0_intr.h revision 1.11 
      1 /*	$NetBSD: pxa2x0_intr.h,v 1.11 2008/04/27 18:58:45 matt Exp $ */
      2 
      3 /* Derived from i80321_intr.h */
      4 
      5 /*
      6  * Copyright (c) 2001, 2002 Wasabi Systems, Inc.
      7  * All rights reserved.
      8  *
      9  * Written by Jason R. Thorpe for Wasabi Systems, Inc.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. All advertising materials mentioning features or use of this software
     20  *    must display the following acknowledgement:
     21  *	This product includes software developed for the NetBSD Project by
     22  *	Wasabi Systems, Inc.
     23  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     24  *    or promote products derived from this software without specific prior
     25  *    written permission.
     26  *
     27  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     28  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     29  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     30  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     31  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     32  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     33  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     34  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     35  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     36  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     37  * POSSIBILITY OF SUCH DAMAGE.
     38  */
     39 
     40 #ifndef _PXA2X0_INTR_H_
     41 #define _PXA2X0_INTR_H_
     42 
     43 #define	ARM_IRQ_HANDLER	_C_LABEL(pxa2x0_irq_handler)
     44 
     45 #ifndef _LOCORE
     46 
     47 #include <arm/cpu.h>
     48 #include <arm/armreg.h>
     49 #include <arm/cpufunc.h>
     50 #include <machine/atomic.h>
     51 #include <machine/intr.h>
     52 
     53 #include <arm/xscale/pxa2x0reg.h>
     54 
     55 vaddr_t pxaic_base;		/* Shared with pxa2x0_irq.S */
     56 #define read_icu(offset) (*(volatile uint32_t *)(pxaic_base + (offset)))
     57 #define write_icu(offset,value) \
     58  (*(volatile uint32_t *)(pxaic_base + (offset)) = (value))
     59 
     60 extern volatile int intr_mask;
     61 extern int pxa2x0_imask[];
     62 
     63 #ifdef __PROG32
     64 
     65 /*
     66  * Cotulla's integrated ICU doesn't have IRQ0..7, so
     67  * we map software interrupts to bit 0..3
     68  */
     69 static inline void
     70 pxa2x0_setipl(int new)
     71 {
     72 	set_curcpl(new);
     73 	intr_mask = pxa2x0_imask[new];
     74 	write_icu(SAIPIC_MR, intr_mask);
     75 }
     76 
     77 
     78 static inline void
     79 pxa2x0_splx(int new)
     80 {
     81 	int psw;
     82 
     83 	psw = disable_interrupts(I32_bit);
     84 	pxa2x0_setipl(new);
     85 	restore_interrupts(psw);
     86 
     87 #ifdef __HAVE_FAST_SOFTINTS
     88 	cpu_dosoftints();
     89 #endif
     90 }
     91 
     92 
     93 static inline int
     94 pxa2x0_splraise(int ipl)
     95 {
     96 	int old, psw;
     97 
     98 	old = curcpl();
     99 	if (ipl > old) {
    100 		psw = disable_interrupts(I32_bit);
    101 		pxa2x0_setipl(ipl);
    102 		restore_interrupts(psw);
    103 	}
    104 
    105 	return old;
    106 }
    107 
    108 static inline int
    109 pxa2x0_spllower(int ipl)
    110 {
    111 	int old = curcpl();
    112 	int psw = disable_interrupts(I32_bit);
    113 
    114 	pxa2x0_splx(ipl);
    115 	restore_interrupts(psw);
    116 	return old;
    117 }
    118 
    119 /*
    120  * An useful function for interrupt handlers.
    121  * XXX: This shouldn't be here.
    122  */
    123 static inline int
    124 find_first_bit(uint32_t bits)
    125 {
    126 	/*
    127 	 * Since CLZ is available only on ARMv5, this isn't portable
    128 	 * to all ARM CPUs.  This file is for PXA2[15]0 processor.
    129 	 */
    130 	return 31 - __builtin_clz(bits);
    131 }
    132 
    133 #endif /* __PROG32 */
    134 
    135 int	_splraise(int);
    136 int	_spllower(int);
    137 void	splx(int);
    138 void	_setsoftintr(int);
    139 
    140 #if !defined(EVBARM_SPL_NOINLINE)
    141 
    142 #define splx(new)		pxa2x0_splx(new)
    143 #define	_spllower(ipl)		pxa2x0_spllower(ipl)
    144 #define	_splraise(ipl)		pxa2x0_splraise(ipl)
    145 #define	_setsoftintr(si)	pxa2x0_setsoftintr(si)
    146 
    147 #endif	/* !EVBARM_SPL_NOINTR */
    148 
    149 /*
    150  * This function *MUST* be called very early on in a port's
    151  * initarm() function, before ANY spl*() functions are called.
    152  *
    153  * The parameter is the virtual address of the PXA2x0's Interrupt
    154  * Controller registers.
    155  */
    156 void pxa2x0_intr_bootstrap(vaddr_t);
    157 
    158 void pxa2x0_irq_handler(void *);
    159 void *pxa2x0_intr_establish(int irqno, int level,
    160 			    int (*func)(void *), void *cookie);
    161 void pxa2x0_intr_disestablish(void *cookie);
    162 void pxa2x0_update_intr_masks(int irqno, int level);
    163 
    164 #endif /* ! _LOCORE */
    165 
    166 #endif /* _PXA2X0_INTR_H_ */
    167