pxa2x0_rtc.c revision 1.6
1 /* $NetBSD: pxa2x0_rtc.c,v 1.6 2012/10/27 17:17:42 chs Exp $ */ 2 3 /* 4 * Copyright (c) 2007 NONAKA Kimihiro <nonaka (at) netbsd.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 16 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 17 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 18 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 19 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 20 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 21 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 22 */ 23 24 #include <sys/cdefs.h> 25 __KERNEL_RCSID(0, "$NetBSD: pxa2x0_rtc.c,v 1.6 2012/10/27 17:17:42 chs Exp $"); 26 27 #include <sys/param.h> 28 #include <sys/systm.h> 29 #include <sys/device.h> 30 #include <sys/kernel.h> 31 32 #include <dev/clock_subr.h> 33 34 #include <sys/bus.h> 35 36 #include <arm/xscale/pxa2x0cpu.h> 37 #include <arm/xscale/pxa2x0reg.h> 38 #include <arm/xscale/pxa2x0var.h> 39 40 #ifdef PXARTC_DEBUG 41 #define DPRINTF(s) printf s 42 #else 43 #define DPRINTF(s) 44 #endif 45 46 struct pxartc_softc { 47 device_t sc_dev; 48 bus_space_tag_t sc_iot; 49 bus_space_handle_t sc_ioh; 50 51 struct todr_chip_handle sc_todr; 52 53 int sc_flags; 54 #define FLAG_WRISTWATCH (1 << 0) 55 }; 56 57 static int pxartc_match(device_t, cfdata_t, void *); 58 static void pxartc_attach(device_t, device_t, void *); 59 60 CFATTACH_DECL_NEW(pxartc, sizeof(struct pxartc_softc), 61 pxartc_match, pxartc_attach, NULL, NULL); 62 63 /* todr(9) interface */ 64 static int pxartc_todr_gettime(todr_chip_handle_t, struct timeval *); 65 static int pxartc_todr_settime(todr_chip_handle_t, struct timeval *); 66 67 static int pxartc_wristwatch_read(struct pxartc_softc *,struct clock_ymdhms *); 68 static int pxartc_wristwatch_write(struct pxartc_softc *,struct clock_ymdhms *); 69 70 static int 71 pxartc_match(device_t parent, cfdata_t cf, void *aux) 72 { 73 struct pxaip_attach_args *pxa = aux; 74 75 if (strcmp(pxa->pxa_name, cf->cf_name) != 0) 76 return 0; 77 78 if (pxa->pxa_size == 0) { 79 pxa->pxa_size = 80 CPU_IS_PXA270 ? PXA270_RTC_SIZE : PXA250_RTC_SIZE; 81 } 82 return 1; 83 } 84 85 static void 86 pxartc_attach(device_t parent, device_t self, void *aux) 87 { 88 struct pxartc_softc *sc = device_private(self); 89 struct pxaip_attach_args *pxa = aux; 90 91 sc->sc_dev = self; 92 sc->sc_iot = pxa->pxa_iot; 93 94 aprint_normal(": Real-time Clock\n"); 95 96 if (bus_space_map(sc->sc_iot, pxa->pxa_addr, pxa->pxa_size, 0, 97 &sc->sc_ioh)) { 98 aprint_error("%s: couldn't map registers\n", 99 device_xname(sc->sc_dev)); 100 return; 101 } 102 103 if (pxa->pxa_size == PXA270_RTC_SIZE) { 104 aprint_normal("%s: using wristwatch register\n", 105 device_xname(sc->sc_dev)); 106 sc->sc_flags |= FLAG_WRISTWATCH; 107 } 108 109 sc->sc_todr.cookie = sc; 110 sc->sc_todr.todr_gettime = pxartc_todr_gettime; 111 sc->sc_todr.todr_settime = pxartc_todr_settime; 112 sc->sc_todr.todr_setwen = NULL; 113 114 todr_attach(&sc->sc_todr); 115 } 116 117 static int 118 pxartc_todr_gettime(todr_chip_handle_t ch, struct timeval *tv) 119 { 120 struct pxartc_softc *sc = ch->cookie; 121 struct clock_ymdhms dt; 122 123 if ((sc->sc_flags & FLAG_WRISTWATCH) == 0) { 124 tv->tv_sec = bus_space_read_4(sc->sc_iot, sc->sc_ioh, RTC_RCNR); 125 tv->tv_usec = 0; 126 #ifdef PXARTC_DEBUG 127 DPRINTF(("%s: RCNR = %08llx\n", device_xname(sc->sc_dev), 128 tv->tv_sec)); 129 clock_secs_to_ymdhms(tv->tv_sec, &dt); 130 DPRINTF(("%s: %02d/%02d/%02d %02d:%02d:%02d\n", 131 device_xname(sc->sc_dev), 132 dt.dt_year, dt.dt_mon, dt.dt_day, 133 dt.dt_hour, dt.dt_min, dt.dt_sec)); 134 #endif 135 return 0; 136 } 137 138 memset(&dt, 0, sizeof(dt)); 139 140 if (pxartc_wristwatch_read(sc, &dt) == 0) 141 return -1; 142 143 tv->tv_sec = clock_ymdhms_to_secs(&dt); 144 tv->tv_usec = 0; 145 return 0; 146 } 147 148 static int 149 pxartc_todr_settime(todr_chip_handle_t ch, struct timeval *tv) 150 { 151 struct pxartc_softc *sc = ch->cookie; 152 struct clock_ymdhms dt; 153 154 if ((sc->sc_flags & FLAG_WRISTWATCH) == 0) { 155 #ifdef PXARTC_DEBUG 156 DPRINTF(("%s: RCNR = %08llx\n", device_xname(sc->sc_dev), 157 tv->tv_sec)); 158 clock_secs_to_ymdhms(tv->tv_sec, &dt); 159 DPRINTF(("%s: %02d/%02d/%02d %02d:%02d:%02d\n", 160 device_xname(sc->sc_dev), 161 dt.dt_year, dt.dt_mon, dt.dt_day, 162 dt.dt_hour, dt.dt_min, dt.dt_sec)); 163 #endif 164 bus_space_write_4(sc->sc_iot, sc->sc_ioh, RTC_RCNR, tv->tv_sec); 165 #ifdef PXARTC_DEBUG 166 { 167 uint32_t cntr; 168 delay(1); 169 cntr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, RTC_RCNR); 170 DPRINTF(("%s: new RCNR = %08x\n", device_xname(sc->sc_dev), 171 cntr)); 172 clock_secs_to_ymdhms(cntr, &dt); 173 DPRINTF(("%s: %02d/%02d/%02d %02d:%02d:%02d\n", 174 device_xname(sc->sc_dev), 175 dt.dt_year, dt.dt_mon, dt.dt_day, 176 dt.dt_hour, dt.dt_min, dt.dt_sec)); 177 } 178 #endif 179 return 0; 180 } 181 182 clock_secs_to_ymdhms(tv->tv_sec, &dt); 183 184 if (pxartc_wristwatch_write(sc, &dt) == 0) 185 return -1; 186 return 0; 187 } 188 189 static int 190 pxartc_wristwatch_read(struct pxartc_softc *sc, struct clock_ymdhms *dt) 191 { 192 uint32_t dayr, yearr; 193 int s; 194 195 DPRINTF(("%s: pxartc_wristwatch_read()\n", device_xname(sc->sc_dev))); 196 197 s = splhigh(); 198 dayr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, RTC_RDCR); 199 yearr = bus_space_read_4(sc->sc_iot, sc->sc_ioh, RTC_RYCR); 200 splx(s); 201 202 DPRINTF(("%s: RDCR = %08x, RYCR = %08x\n", device_xname(sc->sc_dev), 203 dayr, yearr)); 204 205 dt->dt_sec = (dayr >> RDCR_SECOND_SHIFT) & RDCR_SECOND_MASK; 206 dt->dt_min = (dayr >> RDCR_MINUTE_SHIFT) & RDCR_MINUTE_MASK; 207 dt->dt_hour = (dayr >> RDCR_HOUR_SHIFT) & RDCR_HOUR_MASK; 208 dt->dt_day = (yearr >> RYCR_DOM_SHIFT) & RYCR_DOM_MASK; 209 dt->dt_mon = (yearr >> RYCR_MONTH_SHIFT) & RYCR_MONTH_MASK; 210 dt->dt_year = (yearr >> RYCR_YEAR_SHIFT) & RYCR_YEAR_MASK; 211 212 DPRINTF(("%s: %02d/%02d/%02d %02d:%02d:%02d\n", 213 device_xname(sc->sc_dev), 214 dt->dt_year, dt->dt_mon, dt->dt_day, 215 dt->dt_hour, dt->dt_min, dt->dt_sec)); 216 217 return 1; 218 } 219 220 static int 221 pxartc_wristwatch_write(struct pxartc_softc *sc, struct clock_ymdhms *dt) 222 { 223 uint32_t dayr, yearr; 224 uint32_t wom; /* week of month: 1=first week of month */ 225 int s; 226 227 DPRINTF(("%s: pxartc_wristwatch_write()\n", device_xname(sc->sc_dev))); 228 229 DPRINTF(("%s: %02d/%02d/%02d %02d:%02d:%02d\n", 230 device_xname(sc->sc_dev), 231 dt->dt_year, dt->dt_mon, dt->dt_day, 232 dt->dt_hour, dt->dt_min, dt->dt_sec)); 233 234 dayr = (dt->dt_sec & RDCR_SECOND_MASK) << RDCR_SECOND_SHIFT; 235 dayr |= (dt->dt_min & RDCR_MINUTE_MASK) << RDCR_MINUTE_SHIFT; 236 dayr |= (dt->dt_hour & RDCR_HOUR_MASK) << RDCR_HOUR_SHIFT; 237 dayr |= ((dt->dt_wday + 1) & RDCR_DOW_MASK) << RDCR_DOW_SHIFT; 238 wom = ((dt->dt_day - 1 + 6 - dt->dt_wday) / 7) + 1; 239 dayr |= (wom & RDCR_WOM_MASK) << RDCR_WOM_SHIFT; 240 yearr = (dt->dt_day & RYCR_DOM_MASK) << RYCR_DOM_SHIFT; 241 yearr |= (dt->dt_mon & RYCR_MONTH_MASK) << RYCR_MONTH_SHIFT; 242 yearr |= (dt->dt_year & RYCR_YEAR_MASK) << RYCR_YEAR_SHIFT; 243 244 DPRINTF(("%s: RDCR = %08x, RYCR = %08x\n", device_xname(sc->sc_dev), 245 dayr, yearr)); 246 247 /* 248 * We must write RYCR register before write RDCR register. 249 * 250 * See PXA270 Processor Family Developer's Manual p.946 251 * 21.4.2.3.1 Writing RDCR and RYCR Counter Registers with Valid Data. 252 */ 253 s = splhigh(); 254 bus_space_write_4(sc->sc_iot, sc->sc_ioh, RTC_RYCR, yearr); 255 bus_space_write_4(sc->sc_iot, sc->sc_ioh, RTC_RDCR, dayr); 256 splx(s); 257 258 #ifdef PXARTC_DEBUG 259 { 260 struct clock_ymdhms dummy; 261 pxartc_wristwatch_read(sc, &dummy); 262 } 263 #endif 264 265 return 1; 266 } 267
Indexes created Thu Oct 02 07:10:07 GMT 2025