atari5380.c revision 1.33.4.2 1 1.33.4.2 wiz /* $NetBSD: atari5380.c,v 1.33.4.2 2001/09/16 16:34:29 wiz Exp $ */
2 1.33.4.2 wiz
3 1.33.4.2 wiz /*
4 1.33.4.2 wiz * Copyright (c) 1995 Leo Weppelman.
5 1.33.4.2 wiz * All rights reserved.
6 1.33.4.2 wiz *
7 1.33.4.2 wiz * Redistribution and use in source and binary forms, with or without
8 1.33.4.2 wiz * modification, are permitted provided that the following conditions
9 1.33.4.2 wiz * are met:
10 1.33.4.2 wiz * 1. Redistributions of source code must retain the above copyright
11 1.33.4.2 wiz * notice, this list of conditions and the following disclaimer.
12 1.33.4.2 wiz * 2. Redistributions in binary form must reproduce the above copyright
13 1.33.4.2 wiz * notice, this list of conditions and the following disclaimer in the
14 1.33.4.2 wiz * documentation and/or other materials provided with the distribution.
15 1.33.4.2 wiz * 3. All advertising materials mentioning features or use of this software
16 1.33.4.2 wiz * must display the following acknowledgement:
17 1.33.4.2 wiz * This product includes software developed by Leo Weppelman.
18 1.33.4.2 wiz * 4. The name of the author may not be used to endorse or promote products
19 1.33.4.2 wiz * derived from this software without specific prior written permission
20 1.33.4.2 wiz *
21 1.33.4.2 wiz * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.33.4.2 wiz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.33.4.2 wiz * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.33.4.2 wiz * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.33.4.2 wiz * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.33.4.2 wiz * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.33.4.2 wiz * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.33.4.2 wiz * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.33.4.2 wiz * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.33.4.2 wiz * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.33.4.2 wiz */
32 1.33.4.2 wiz
33 1.33.4.2 wiz #include "opt_atariscsi.h"
34 1.33.4.2 wiz
35 1.33.4.2 wiz #include <sys/param.h>
36 1.33.4.2 wiz #include <sys/systm.h>
37 1.33.4.2 wiz #include <sys/kernel.h>
38 1.33.4.2 wiz #include <sys/device.h>
39 1.33.4.2 wiz #include <sys/buf.h>
40 1.33.4.2 wiz #include <dev/scsipi/scsi_all.h>
41 1.33.4.2 wiz #include <dev/scsipi/scsipi_all.h>
42 1.33.4.2 wiz #include <dev/scsipi/scsi_message.h>
43 1.33.4.2 wiz #include <dev/scsipi/scsiconf.h>
44 1.33.4.2 wiz
45 1.33.4.2 wiz #include <m68k/asm_single.h>
46 1.33.4.2 wiz #include <m68k/cpu.h>
47 1.33.4.2 wiz #include <m68k/cacheops.h>
48 1.33.4.2 wiz
49 1.33.4.2 wiz #include <atari/atari/stalloc.h>
50 1.33.4.2 wiz
51 1.33.4.2 wiz /*
52 1.33.4.2 wiz * Include the driver definitions
53 1.33.4.2 wiz */
54 1.33.4.2 wiz #include <atari/dev/ncr5380reg.h>
55 1.33.4.2 wiz
56 1.33.4.2 wiz #include <machine/stdarg.h>
57 1.33.4.2 wiz #include <machine/iomap.h>
58 1.33.4.2 wiz #include <machine/mfp.h>
59 1.33.4.2 wiz
60 1.33.4.2 wiz #include <atari/atari/intr.h>
61 1.33.4.2 wiz
62 1.33.4.2 wiz #if defined(FALCON_SCSI)
63 1.33.4.2 wiz #include <machine/dma.h>
64 1.33.4.2 wiz #endif
65 1.33.4.2 wiz
66 1.33.4.2 wiz /*
67 1.33.4.2 wiz * Set the various driver options
68 1.33.4.2 wiz */
69 1.33.4.2 wiz #define NREQ 18 /* Size of issue queue */
70 1.33.4.2 wiz #define AUTO_SENSE 1 /* Automatically issue a request-sense */
71 1.33.4.2 wiz
72 1.33.4.2 wiz #define DRNAME ncrscsi /* used in various prints */
73 1.33.4.2 wiz #undef DBG_SEL /* Show the selection process */
74 1.33.4.2 wiz #undef DBG_REQ /* Show enqueued/ready requests */
75 1.33.4.2 wiz #undef DBG_ERR_RET /* Show requests with != 0 return code */
76 1.33.4.2 wiz #undef DBG_NOWRITE /* Do not allow writes to the targets */
77 1.33.4.2 wiz #undef DBG_PIO /* Show the polled-I/O process */
78 1.33.4.2 wiz #undef DBG_INF /* Show information transfer process */
79 1.33.4.2 wiz #define DBG_NOSTATIC /* No static functions, all in DDB trace*/
80 1.33.4.2 wiz #define DBG_PID 15 /* Keep track of driver */
81 1.33.4.2 wiz #define REAL_DMA /* Use DMA if sensible */
82 1.33.4.2 wiz #if defined(FALCON_SCSI)
83 1.33.4.2 wiz #define REAL_DMA_POLL 1 /* 1: Poll for end of DMA-transfer */
84 1.33.4.2 wiz #else
85 1.33.4.2 wiz #define REAL_DMA_POLL 0 /* 1: Poll for end of DMA-transfer */
86 1.33.4.2 wiz #endif
87 1.33.4.2 wiz #undef USE_PDMA /* Use special pdma-transfer function */
88 1.33.4.2 wiz #define MIN_PHYS 65536 /*BARF!!!!*/
89 1.33.4.2 wiz
90 1.33.4.2 wiz /*
91 1.33.4.2 wiz * Include more driver definitions
92 1.33.4.2 wiz */
93 1.33.4.2 wiz #include <atari/dev/ncr5380var.h>
94 1.33.4.2 wiz
95 1.33.4.2 wiz /*
96 1.33.4.2 wiz * The atari specific driver options
97 1.33.4.2 wiz */
98 1.33.4.2 wiz #undef NO_TTRAM_DMA /* Do not use DMA to TT-ram. This */
99 1.33.4.2 wiz /* fails on older atari's */
100 1.33.4.2 wiz #define ENABLE_NCR5380(sc) cur_softc = sc;
101 1.33.4.2 wiz
102 1.33.4.2 wiz static u_char *alloc_bounceb __P((u_long));
103 1.33.4.2 wiz static void free_bounceb __P((u_char *));
104 1.33.4.2 wiz static int machine_match __P((struct device *, void *, void *,
105 1.33.4.2 wiz struct cfdriver *));
106 1.33.4.2 wiz void scsi_ctrl __P((int));
107 1.33.4.2 wiz void scsi_dma __P((int));
108 1.33.4.2 wiz
109 1.33.4.2 wiz /*
110 1.33.4.2 wiz * Functions that do nothing on the atari
111 1.33.4.2 wiz */
112 1.33.4.2 wiz #define pdma_ready() 0
113 1.33.4.2 wiz
114 1.33.4.2 wiz #if defined(TT_SCSI)
115 1.33.4.2 wiz
116 1.33.4.2 wiz void ncr5380_drq_intr __P((int));
117 1.33.4.2 wiz
118 1.33.4.2 wiz /*
119 1.33.4.2 wiz * Define all the things we need of the DMA-controller
120 1.33.4.2 wiz */
121 1.33.4.2 wiz #define SCSI_DMA ((struct scsi_dma *)AD_SCSI_DMA)
122 1.33.4.2 wiz #define SCSI_5380 ((struct scsi_5380 *)AD_NCR5380)
123 1.33.4.2 wiz
124 1.33.4.2 wiz struct scsi_dma {
125 1.33.4.2 wiz volatile u_char s_dma_ptr[8]; /* use only the odd bytes */
126 1.33.4.2 wiz volatile u_char s_dma_cnt[8]; /* use only the odd bytes */
127 1.33.4.2 wiz volatile u_char s_dma_res[4]; /* data residue register */
128 1.33.4.2 wiz volatile u_char s_dma_gap; /* not used */
129 1.33.4.2 wiz volatile u_char s_dma_ctrl; /* control register */
130 1.33.4.2 wiz volatile u_char s_dma_gap2; /* not used */
131 1.33.4.2 wiz volatile u_char s_hdma_ctrl; /* Hades control register */
132 1.33.4.2 wiz };
133 1.33.4.2 wiz
134 1.33.4.2 wiz #define set_scsi_dma(addr, val) (void)( \
135 1.33.4.2 wiz { \
136 1.33.4.2 wiz u_char *address = (u_char*)addr+1; \
137 1.33.4.2 wiz u_long nval = (u_long)val; \
138 1.33.4.2 wiz __asm("movepl %0, %1@(0)": :"d" (nval), "a" (address)); \
139 1.33.4.2 wiz })
140 1.33.4.2 wiz
141 1.33.4.2 wiz #define get_scsi_dma(addr, res) ( \
142 1.33.4.2 wiz { \
143 1.33.4.2 wiz u_char *address = (u_char*)addr+1; \
144 1.33.4.2 wiz u_long nval; \
145 1.33.4.2 wiz __asm("movepl %1@(0), %0": "=d" (nval) : "a" (address)); \
146 1.33.4.2 wiz res = (u_long)nval; \
147 1.33.4.2 wiz })
148 1.33.4.2 wiz
149 1.33.4.2 wiz /*
150 1.33.4.2 wiz * Defines for TT-DMA control register
151 1.33.4.2 wiz */
152 1.33.4.2 wiz #define SD_BUSERR 0x80 /* 1 = transfer caused bus error*/
153 1.33.4.2 wiz #define SD_ZERO 0x40 /* 1 = byte counter is zero */
154 1.33.4.2 wiz #define SD_ENABLE 0x02 /* 1 = Enable DMA */
155 1.33.4.2 wiz #define SD_OUT 0x01 /* Direction: memory to SCSI */
156 1.33.4.2 wiz #define SD_IN 0x00 /* Direction: SCSI to memory */
157 1.33.4.2 wiz
158 1.33.4.2 wiz /*
159 1.33.4.2 wiz * Defines for Hades-DMA control register
160 1.33.4.2 wiz */
161 1.33.4.2 wiz #define SDH_BUSERR 0x02 /* 1 = Bus error */
162 1.33.4.2 wiz #define SDH_EOP 0x01 /* 1 = Signal EOP on 5380 */
163 1.33.4.2 wiz #define SDH_ZERO 0x40 /* 1 = Byte counter is zero */
164 1.33.4.2 wiz
165 1.33.4.2 wiz /*
166 1.33.4.2 wiz * Define the 5380 register set
167 1.33.4.2 wiz */
168 1.33.4.2 wiz struct scsi_5380 {
169 1.33.4.2 wiz volatile u_char scsi_5380[16]; /* use only the odd bytes */
170 1.33.4.2 wiz };
171 1.33.4.2 wiz #endif /* TT_SCSI */
172 1.33.4.2 wiz
173 1.33.4.2 wiz /**********************************************
174 1.33.4.2 wiz * Variables present for both TT and Falcon. *
175 1.33.4.2 wiz **********************************************/
176 1.33.4.2 wiz
177 1.33.4.2 wiz /*
178 1.33.4.2 wiz * Softc of currently active controller (a bit of fake; we only have one)
179 1.33.4.2 wiz */
180 1.33.4.2 wiz static struct ncr_softc *cur_softc;
181 1.33.4.2 wiz
182 1.33.4.2 wiz #if defined(TT_SCSI) && !defined(FALCON_SCSI)
183 1.33.4.2 wiz /*
184 1.33.4.2 wiz * We can be more efficient for some functions when only TT_SCSI is selected
185 1.33.4.2 wiz */
186 1.33.4.2 wiz #define GET_5380_REG(rnum) SCSI_5380->scsi_5380[(rnum << 1) | 1]
187 1.33.4.2 wiz #define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val)
188 1.33.4.2 wiz
189 1.33.4.2 wiz #define scsi_mach_init(sc) scsi_tt_init(sc)
190 1.33.4.2 wiz #define scsi_ienable() scsi_tt_ienable()
191 1.33.4.2 wiz #define scsi_idisable() scsi_tt_idisable()
192 1.33.4.2 wiz #define scsi_clr_ipend() scsi_tt_clr_ipend()
193 1.33.4.2 wiz #define scsi_ipending() (GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET)
194 1.33.4.2 wiz #define scsi_dma_setup(r,p,m) scsi_tt_dmasetup(r, p, m)
195 1.33.4.2 wiz #define wrong_dma_range(r,d) tt_wrong_dma_range(r, d)
196 1.33.4.2 wiz #define poll_edma(reqp) tt_poll_edma(reqp)
197 1.33.4.2 wiz #define get_dma_result(r, b) tt_get_dma_result(r, b)
198 1.33.4.2 wiz #define can_access_5380() 1
199 1.33.4.2 wiz #define emulated_dma() ((machineid & ATARI_HADES) ? 1 : 0)
200 1.33.4.2 wiz
201 1.33.4.2 wiz #define fair_to_keep_dma() 1
202 1.33.4.2 wiz #define claimed_dma() 1
203 1.33.4.2 wiz #define reconsider_dma()
204 1.33.4.2 wiz
205 1.33.4.2 wiz #endif /* defined(TT_SCSI) && !defined(FALCON_SCSI) */
206 1.33.4.2 wiz
207 1.33.4.2 wiz #if defined(TT_SCSI)
208 1.33.4.2 wiz
209 1.33.4.2 wiz /*
210 1.33.4.2 wiz * Prototype functions defined below
211 1.33.4.2 wiz */
212 1.33.4.2 wiz #ifdef NO_TTRAM_DMA
213 1.33.4.2 wiz static int tt_wrong_dma_range __P((SC_REQ *, struct dma_chain *));
214 1.33.4.2 wiz #endif
215 1.33.4.2 wiz static void scsi_tt_init __P((struct ncr_softc *));
216 1.33.4.2 wiz static u_char get_tt_5380_reg __P((u_short));
217 1.33.4.2 wiz static void set_tt_5380_reg __P((u_short, u_short));
218 1.33.4.2 wiz static void scsi_tt_dmasetup __P((SC_REQ *, u_int, u_char));
219 1.33.4.2 wiz static int tt_poll_edma __P((SC_REQ *));
220 1.33.4.2 wiz static u_char *ptov __P((SC_REQ *, u_long*));
221 1.33.4.2 wiz static int tt_get_dma_result __P((SC_REQ *, u_long *));
222 1.33.4.2 wiz void scsi_tt_ienable __P((void));
223 1.33.4.2 wiz void scsi_tt_idisable __P((void));
224 1.33.4.2 wiz void scsi_tt_clr_ipend __P((void));
225 1.33.4.2 wiz
226 1.33.4.2 wiz /*
227 1.33.4.2 wiz * Define these too, so we can use them locally...
228 1.33.4.2 wiz */
229 1.33.4.2 wiz #define GET_TT_REG(rnum) SCSI_5380->scsi_5380[(rnum << 1) | 1]
230 1.33.4.2 wiz #define SET_TT_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val)
231 1.33.4.2 wiz
232 1.33.4.2 wiz #ifdef NO_TTRAM_DMA
233 1.33.4.2 wiz static int
234 1.33.4.2 wiz tt_wrong_dma_range(reqp, dm)
235 1.33.4.2 wiz SC_REQ *reqp;
236 1.33.4.2 wiz struct dma_chain *dm;
237 1.33.4.2 wiz {
238 1.33.4.2 wiz if (dm->dm_addr & 0xff000000) {
239 1.33.4.2 wiz reqp->dr_flag |= DRIVER_BOUNCING;
240 1.33.4.2 wiz return(1);
241 1.33.4.2 wiz }
242 1.33.4.2 wiz return(0);
243 1.33.4.2 wiz }
244 1.33.4.2 wiz #else
245 1.33.4.2 wiz #define tt_wrong_dma_range(reqp, dm) 0
246 1.33.4.2 wiz #endif
247 1.33.4.2 wiz
248 1.33.4.2 wiz static void
249 1.33.4.2 wiz scsi_tt_init(struct ncr_softc *sc)
250 1.33.4.2 wiz {
251 1.33.4.2 wiz /*
252 1.33.4.2 wiz * Enable SCSI-related interrupts
253 1.33.4.2 wiz */
254 1.33.4.2 wiz MFP2->mf_aer |= 0x80; /* SCSI IRQ goes HIGH!!!!! */
255 1.33.4.2 wiz
256 1.33.4.2 wiz if (machineid & ATARI_TT) {
257 1.33.4.2 wiz /* SCSI-dma interrupts */
258 1.33.4.2 wiz MFP2->mf_ierb |= IB_SCDM;
259 1.33.4.2 wiz MFP2->mf_iprb = (u_int8_t)~IB_SCDM;
260 1.33.4.2 wiz MFP2->mf_imrb |= IB_SCDM;
261 1.33.4.2 wiz }
262 1.33.4.2 wiz else if (machineid & ATARI_HADES) {
263 1.33.4.2 wiz SCSI_DMA->s_hdma_ctrl = 0;
264 1.33.4.2 wiz
265 1.33.4.2 wiz if (intr_establish(2, AUTO_VEC, 0,
266 1.33.4.2 wiz (hw_ifun_t)ncr5380_drq_intr,
267 1.33.4.2 wiz NULL) == NULL)
268 1.33.4.2 wiz panic("scsi_tt_init: Can't establish drq-interrupt");
269 1.33.4.2 wiz }
270 1.33.4.2 wiz else panic("scsi_tt_init: should not come here");
271 1.33.4.2 wiz
272 1.33.4.2 wiz MFP2->mf_iera |= IA_SCSI; /* SCSI-5380 interrupts */
273 1.33.4.2 wiz MFP2->mf_ipra = (u_int8_t)~IA_SCSI;
274 1.33.4.2 wiz MFP2->mf_imra |= IA_SCSI;
275 1.33.4.2 wiz
276 1.33.4.2 wiz /*
277 1.33.4.2 wiz * LWP: DMA transfers to TT-ram causes data to be garbeled
278 1.33.4.2 wiz * without notice on some revisons of the TT-mainboard.
279 1.33.4.2 wiz * When program's generate misterious Segmentations faults,
280 1.33.4.2 wiz * try turning on NO_TTRAM_DMA.
281 1.33.4.2 wiz */
282 1.33.4.2 wiz #ifdef NO_TTRAM_DMA
283 1.33.4.2 wiz printf(": DMA to TT-RAM is disabled!");
284 1.33.4.2 wiz #endif
285 1.33.4.2 wiz }
286 1.33.4.2 wiz
287 1.33.4.2 wiz static u_char
288 1.33.4.2 wiz get_tt_5380_reg(u_short rnum)
289 1.33.4.2 wiz {
290 1.33.4.2 wiz return(SCSI_5380->scsi_5380[(rnum << 1) | 1]);
291 1.33.4.2 wiz }
292 1.33.4.2 wiz
293 1.33.4.2 wiz static void
294 1.33.4.2 wiz set_tt_5380_reg(u_short rnum, u_short val)
295 1.33.4.2 wiz {
296 1.33.4.2 wiz SCSI_5380->scsi_5380[(rnum << 1) | 1] = val;
297 1.33.4.2 wiz }
298 1.33.4.2 wiz
299 1.33.4.2 wiz extern __inline__ void
300 1.33.4.2 wiz scsi_tt_ienable(void)
301 1.33.4.2 wiz {
302 1.33.4.2 wiz if (machineid & ATARI_TT)
303 1.33.4.2 wiz single_inst_bset_b(MFP2->mf_imrb, IB_SCDM);
304 1.33.4.2 wiz single_inst_bset_b(MFP2->mf_imra, IA_SCSI);
305 1.33.4.2 wiz }
306 1.33.4.2 wiz
307 1.33.4.2 wiz extern __inline__ void
308 1.33.4.2 wiz scsi_tt_idisable(void)
309 1.33.4.2 wiz {
310 1.33.4.2 wiz if (machineid & ATARI_TT)
311 1.33.4.2 wiz single_inst_bclr_b(MFP2->mf_imrb, IB_SCDM);
312 1.33.4.2 wiz single_inst_bclr_b(MFP2->mf_imra, IA_SCSI);
313 1.33.4.2 wiz }
314 1.33.4.2 wiz
315 1.33.4.2 wiz extern __inline__ void
316 1.33.4.2 wiz scsi_tt_clr_ipend(void)
317 1.33.4.2 wiz {
318 1.33.4.2 wiz int tmp;
319 1.33.4.2 wiz
320 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl = 0;
321 1.33.4.2 wiz tmp = GET_TT_REG(NCR5380_IRCV);
322 1.33.4.2 wiz if (machineid & ATARI_TT)
323 1.33.4.2 wiz MFP2->mf_iprb = (u_int8_t)~IB_SCDM;
324 1.33.4.2 wiz MFP2->mf_ipra = (u_int8_t)~IA_SCSI;
325 1.33.4.2 wiz
326 1.33.4.2 wiz /*
327 1.33.4.2 wiz * Remove interrupts already scheduled.
328 1.33.4.2 wiz */
329 1.33.4.2 wiz rem_sicallback((si_farg)ncr_ctrl_intr);
330 1.33.4.2 wiz rem_sicallback((si_farg)ncr_dma_intr);
331 1.33.4.2 wiz }
332 1.33.4.2 wiz
333 1.33.4.2 wiz static void
334 1.33.4.2 wiz scsi_tt_dmasetup(SC_REQ *reqp, u_int phase, u_char mode)
335 1.33.4.2 wiz {
336 1.33.4.2 wiz if (PH_IN(phase)) {
337 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl = SD_IN;
338 1.33.4.2 wiz if (machineid & ATARI_HADES)
339 1.33.4.2 wiz SCSI_DMA->s_hdma_ctrl &= ~(SDH_BUSERR|SDH_EOP);
340 1.33.4.2 wiz set_scsi_dma(&(SCSI_DMA->s_dma_ptr), reqp->dm_cur->dm_addr);
341 1.33.4.2 wiz set_scsi_dma(&(SCSI_DMA->s_dma_cnt), reqp->dm_cur->dm_count);
342 1.33.4.2 wiz SET_TT_REG(NCR5380_ICOM, 0);
343 1.33.4.2 wiz SET_TT_REG(NCR5380_MODE, mode);
344 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl = SD_ENABLE;
345 1.33.4.2 wiz SET_TT_REG(NCR5380_IRCV, 0);
346 1.33.4.2 wiz }
347 1.33.4.2 wiz else {
348 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl = SD_OUT;
349 1.33.4.2 wiz if (machineid & ATARI_HADES)
350 1.33.4.2 wiz SCSI_DMA->s_hdma_ctrl &= ~(SDH_BUSERR|SDH_EOP);
351 1.33.4.2 wiz set_scsi_dma(&(SCSI_DMA->s_dma_ptr), reqp->dm_cur->dm_addr);
352 1.33.4.2 wiz set_scsi_dma(&(SCSI_DMA->s_dma_cnt), reqp->dm_cur->dm_count);
353 1.33.4.2 wiz SET_TT_REG(NCR5380_MODE, mode);
354 1.33.4.2 wiz SET_TT_REG(NCR5380_ICOM, SC_ADTB);
355 1.33.4.2 wiz SET_TT_REG(NCR5380_DMSTAT, 0);
356 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl = SD_ENABLE|SD_OUT;
357 1.33.4.2 wiz }
358 1.33.4.2 wiz }
359 1.33.4.2 wiz
360 1.33.4.2 wiz static int
361 1.33.4.2 wiz tt_poll_edma(SC_REQ *reqp)
362 1.33.4.2 wiz {
363 1.33.4.2 wiz u_char dmstat, dmastat;
364 1.33.4.2 wiz int timeout = 9000; /* XXX */
365 1.33.4.2 wiz
366 1.33.4.2 wiz /*
367 1.33.4.2 wiz * We wait here until the DMA has finished. This can be
368 1.33.4.2 wiz * achieved by checking the following conditions:
369 1.33.4.2 wiz * - 5380:
370 1.33.4.2 wiz * - End of DMA flag is set
371 1.33.4.2 wiz * - We lost BSY (error!!)
372 1.33.4.2 wiz * - A phase mismatch has occurred (partial transfer)
373 1.33.4.2 wiz * - DMA-controller:
374 1.33.4.2 wiz * - A bus error occurred (Kernel error!!)
375 1.33.4.2 wiz * - All bytes are transferred
376 1.33.4.2 wiz * If one of the terminating conditions was met, we call
377 1.33.4.2 wiz * 'dma_ready' to check errors and perform the bookkeeping.
378 1.33.4.2 wiz */
379 1.33.4.2 wiz
380 1.33.4.2 wiz scsi_tt_idisable();
381 1.33.4.2 wiz for (;;) {
382 1.33.4.2 wiz delay(20);
383 1.33.4.2 wiz if (--timeout <= 0) {
384 1.33.4.2 wiz ncr_tprint(reqp, "timeout on polled transfer\n");
385 1.33.4.2 wiz reqp->xs->error = XS_TIMEOUT;
386 1.33.4.2 wiz scsi_tt_ienable();
387 1.33.4.2 wiz return(0);
388 1.33.4.2 wiz }
389 1.33.4.2 wiz dmstat = GET_TT_REG(NCR5380_DMSTAT);
390 1.33.4.2 wiz
391 1.33.4.2 wiz if ((machineid & ATARI_HADES) && (dmstat & SC_DMA_REQ)) {
392 1.33.4.2 wiz ncr5380_drq_intr(1);
393 1.33.4.2 wiz dmstat = GET_TT_REG(NCR5380_DMSTAT);
394 1.33.4.2 wiz }
395 1.33.4.2 wiz
396 1.33.4.2 wiz dmastat = SCSI_DMA->s_dma_ctrl;
397 1.33.4.2 wiz if (dmstat & (SC_END_DMA|SC_BSY_ERR|SC_IRQ_SET))
398 1.33.4.2 wiz break;
399 1.33.4.2 wiz if (!(dmstat & SC_PHS_MTCH))
400 1.33.4.2 wiz break;
401 1.33.4.2 wiz if (dmastat & (SD_BUSERR|SD_ZERO))
402 1.33.4.2 wiz break;
403 1.33.4.2 wiz }
404 1.33.4.2 wiz scsi_tt_ienable();
405 1.33.4.2 wiz return(1);
406 1.33.4.2 wiz }
407 1.33.4.2 wiz
408 1.33.4.2 wiz /*
409 1.33.4.2 wiz * Convert physical DMA address to a virtual address.
410 1.33.4.2 wiz */
411 1.33.4.2 wiz static u_char *
412 1.33.4.2 wiz ptov(SC_REQ *reqp, u_long *phaddr)
413 1.33.4.2 wiz {
414 1.33.4.2 wiz struct dma_chain *dm;
415 1.33.4.2 wiz u_char *vaddr;
416 1.33.4.2 wiz
417 1.33.4.2 wiz dm = reqp->dm_chain;
418 1.33.4.2 wiz vaddr = reqp->xdata_ptr;
419 1.33.4.2 wiz for(; dm < reqp->dm_cur; dm++)
420 1.33.4.2 wiz vaddr += dm->dm_count;
421 1.33.4.2 wiz vaddr += (u_long)phaddr - dm->dm_addr;
422 1.33.4.2 wiz return(vaddr);
423 1.33.4.2 wiz }
424 1.33.4.2 wiz
425 1.33.4.2 wiz static int
426 1.33.4.2 wiz tt_get_dma_result(SC_REQ *reqp, u_long *bytes_left)
427 1.33.4.2 wiz {
428 1.33.4.2 wiz int dmastat, dmstat;
429 1.33.4.2 wiz u_char *byte_p;
430 1.33.4.2 wiz u_long leftover;
431 1.33.4.2 wiz
432 1.33.4.2 wiz dmastat = SCSI_DMA->s_dma_ctrl;
433 1.33.4.2 wiz dmstat = GET_TT_REG(NCR5380_DMSTAT);
434 1.33.4.2 wiz get_scsi_dma(SCSI_DMA->s_dma_cnt, leftover);
435 1.33.4.2 wiz get_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)byte_p);
436 1.33.4.2 wiz
437 1.33.4.2 wiz if (dmastat & SD_BUSERR) {
438 1.33.4.2 wiz /*
439 1.33.4.2 wiz * The DMA-controller seems to access 8 bytes beyond
440 1.33.4.2 wiz * it's limits on output. Therefore check also the byte
441 1.33.4.2 wiz * count. If it's zero, ignore the bus error.
442 1.33.4.2 wiz */
443 1.33.4.2 wiz if (leftover != 0) {
444 1.33.4.2 wiz ncr_tprint(reqp,
445 1.33.4.2 wiz "SCSI-DMA buserror - accessing 0x%x\n", byte_p);
446 1.33.4.2 wiz reqp->xs->error = XS_DRIVER_STUFFUP;
447 1.33.4.2 wiz }
448 1.33.4.2 wiz }
449 1.33.4.2 wiz
450 1.33.4.2 wiz /*
451 1.33.4.2 wiz * We handle the following special condition below:
452 1.33.4.2 wiz * -- The device disconnects in the middle of a write operation --
453 1.33.4.2 wiz * In this case, the 5380 has already pre-fetched the next byte from
454 1.33.4.2 wiz * the DMA-controller before the phase mismatch occurs. Therefore,
455 1.33.4.2 wiz * leftover is 1 too low.
456 1.33.4.2 wiz * This does not always happen! Therefore, we only do this when
457 1.33.4.2 wiz * leftover is odd. This assumes that DMA transfers are _even_! This
458 1.33.4.2 wiz * is normally the case on disks and types but might not always be.
459 1.33.4.2 wiz * XXX: Check if ACK is consistently high on these occasions LWP
460 1.33.4.2 wiz */
461 1.33.4.2 wiz if ((leftover & 1) && !(dmstat & SC_PHS_MTCH) && PH_OUT(reqp->phase))
462 1.33.4.2 wiz leftover++;
463 1.33.4.2 wiz
464 1.33.4.2 wiz /*
465 1.33.4.2 wiz * Check if there are some 'restbytes' left in the DMA-controller.
466 1.33.4.2 wiz */
467 1.33.4.2 wiz if ((machineid & ATARI_TT) && ((u_long)byte_p & 3)
468 1.33.4.2 wiz && PH_IN(reqp->phase)) {
469 1.33.4.2 wiz u_char *p, *q;
470 1.33.4.2 wiz
471 1.33.4.2 wiz p = ptov(reqp, (u_long *)((u_long)byte_p & ~3));
472 1.33.4.2 wiz q = (u_char*)&(SCSI_DMA->s_dma_res);
473 1.33.4.2 wiz switch ((u_long)byte_p & 3) {
474 1.33.4.2 wiz case 3: *p++ = *q++;
475 1.33.4.2 wiz case 2: *p++ = *q++;
476 1.33.4.2 wiz case 1: *p++ = *q++;
477 1.33.4.2 wiz }
478 1.33.4.2 wiz }
479 1.33.4.2 wiz *bytes_left = leftover;
480 1.33.4.2 wiz return ((dmastat & (SD_BUSERR|SD_ZERO)) ? 1 : 0);
481 1.33.4.2 wiz }
482 1.33.4.2 wiz
483 1.33.4.2 wiz static u_char *dma_ptr;
484 1.33.4.2 wiz void
485 1.33.4.2 wiz ncr5380_drq_intr(poll)
486 1.33.4.2 wiz int poll;
487 1.33.4.2 wiz {
488 1.33.4.2 wiz extern int *nofault;
489 1.33.4.2 wiz label_t faultbuf;
490 1.33.4.2 wiz int write;
491 1.33.4.2 wiz u_long count;
492 1.33.4.2 wiz u_char *data_p = (u_char*)(stio_addr+0x741);
493 1.33.4.2 wiz
494 1.33.4.2 wiz /*
495 1.33.4.2 wiz * Block SCSI interrupts while emulating DMA. They come
496 1.33.4.2 wiz * at a higher priority.
497 1.33.4.2 wiz */
498 1.33.4.2 wiz single_inst_bclr_b(MFP2->mf_imra, IA_SCSI);
499 1.33.4.2 wiz
500 1.33.4.2 wiz /*
501 1.33.4.2 wiz * Setup for a possible bus error caused by SCSI controller
502 1.33.4.2 wiz * switching out of DATA-IN/OUT before we're done with the
503 1.33.4.2 wiz * current transfer.
504 1.33.4.2 wiz */
505 1.33.4.2 wiz nofault = (int *) &faultbuf;
506 1.33.4.2 wiz
507 1.33.4.2 wiz if (setjmp((label_t *) nofault)) {
508 1.33.4.2 wiz u_char *ptr;
509 1.33.4.2 wiz u_long cnt, tmp;
510 1.33.4.2 wiz
511 1.33.4.2 wiz PID("drq berr");
512 1.33.4.2 wiz nofault = (int *) 0;
513 1.33.4.2 wiz
514 1.33.4.2 wiz /*
515 1.33.4.2 wiz * Determine number of bytes transferred
516 1.33.4.2 wiz */
517 1.33.4.2 wiz get_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)ptr);
518 1.33.4.2 wiz cnt = dma_ptr - ptr;
519 1.33.4.2 wiz
520 1.33.4.2 wiz if (cnt != 0) {
521 1.33.4.2 wiz /*
522 1.33.4.2 wiz * Update the dma pointer/count fields
523 1.33.4.2 wiz */
524 1.33.4.2 wiz set_scsi_dma(SCSI_DMA->s_dma_ptr, dma_ptr);
525 1.33.4.2 wiz get_scsi_dma(SCSI_DMA->s_dma_cnt, tmp);
526 1.33.4.2 wiz set_scsi_dma(SCSI_DMA->s_dma_cnt, tmp - cnt);
527 1.33.4.2 wiz
528 1.33.4.2 wiz if (tmp > cnt) {
529 1.33.4.2 wiz /*
530 1.33.4.2 wiz * Still more to transfer
531 1.33.4.2 wiz */
532 1.33.4.2 wiz if (!poll)
533 1.33.4.2 wiz single_inst_bset_b(MFP2->mf_imra, IA_SCSI);
534 1.33.4.2 wiz return;
535 1.33.4.2 wiz }
536 1.33.4.2 wiz
537 1.33.4.2 wiz /*
538 1.33.4.2 wiz * Signal EOP to 5380
539 1.33.4.2 wiz */
540 1.33.4.2 wiz SCSI_DMA->s_hdma_ctrl |= SDH_EOP;
541 1.33.4.2 wiz }
542 1.33.4.2 wiz else {
543 1.33.4.2 wiz nofault = (int *) &faultbuf;
544 1.33.4.2 wiz
545 1.33.4.2 wiz /*
546 1.33.4.2 wiz * Try to figure out if the byte-count was
547 1.33.4.2 wiz * zero because there was no (more) data or
548 1.33.4.2 wiz * because the dma_ptr is bogus.
549 1.33.4.2 wiz */
550 1.33.4.2 wiz if (setjmp((label_t *) nofault)) {
551 1.33.4.2 wiz /*
552 1.33.4.2 wiz * Set the bus-error bit
553 1.33.4.2 wiz */
554 1.33.4.2 wiz SCSI_DMA->s_hdma_ctrl |= SDH_BUSERR;
555 1.33.4.2 wiz }
556 1.33.4.2 wiz __asm __volatile ("tstb %0@(0)": : "a" (dma_ptr));
557 1.33.4.2 wiz nofault = (int *)0;
558 1.33.4.2 wiz }
559 1.33.4.2 wiz
560 1.33.4.2 wiz /*
561 1.33.4.2 wiz * Schedule an interrupt
562 1.33.4.2 wiz */
563 1.33.4.2 wiz if (!poll && (SCSI_DMA->s_dma_ctrl & SD_ENABLE))
564 1.33.4.2 wiz add_sicallback((si_farg)ncr_dma_intr, (void *)cur_softc, 0);
565 1.33.4.2 wiz
566 1.33.4.2 wiz /*
567 1.33.4.2 wiz * Clear DMA-mode
568 1.33.4.2 wiz */
569 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl &= ~SD_ENABLE;
570 1.33.4.2 wiz if (!poll)
571 1.33.4.2 wiz single_inst_bset_b(MFP2->mf_imra, IA_SCSI);
572 1.33.4.2 wiz
573 1.33.4.2 wiz return;
574 1.33.4.2 wiz }
575 1.33.4.2 wiz
576 1.33.4.2 wiz write = (SCSI_DMA->s_dma_ctrl & SD_OUT) ? 1 : 0;
577 1.33.4.2 wiz #if DBG_PID
578 1.33.4.2 wiz if (write) {
579 1.33.4.2 wiz PID("drq (in)");
580 1.33.4.2 wiz } else {
581 1.33.4.2 wiz PID("drq (out)");
582 1.33.4.2 wiz }
583 1.33.4.2 wiz #endif
584 1.33.4.2 wiz
585 1.33.4.2 wiz get_scsi_dma(SCSI_DMA->s_dma_cnt, count);
586 1.33.4.2 wiz get_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)dma_ptr);
587 1.33.4.2 wiz
588 1.33.4.2 wiz /*
589 1.33.4.2 wiz * Keep pushing bytes until we're done or a bus-error
590 1.33.4.2 wiz * signals that the SCSI controller is not ready.
591 1.33.4.2 wiz * NOTE: I tried some optimalizations in these loops,
592 1.33.4.2 wiz * but they had no effect on transfer speed.
593 1.33.4.2 wiz */
594 1.33.4.2 wiz if (write) {
595 1.33.4.2 wiz while(count--) {
596 1.33.4.2 wiz *data_p = *dma_ptr++;
597 1.33.4.2 wiz }
598 1.33.4.2 wiz }
599 1.33.4.2 wiz else {
600 1.33.4.2 wiz while(count--) {
601 1.33.4.2 wiz *dma_ptr++ = *data_p;
602 1.33.4.2 wiz }
603 1.33.4.2 wiz }
604 1.33.4.2 wiz
605 1.33.4.2 wiz /*
606 1.33.4.2 wiz * OK. No bus error occurred above. Clear the nofault flag
607 1.33.4.2 wiz * so we no longer short-circuit bus errors.
608 1.33.4.2 wiz */
609 1.33.4.2 wiz nofault = (int *) 0;
610 1.33.4.2 wiz
611 1.33.4.2 wiz /*
612 1.33.4.2 wiz * Schedule an interrupt
613 1.33.4.2 wiz */
614 1.33.4.2 wiz if (!poll && (SCSI_DMA->s_dma_ctrl & SD_ENABLE))
615 1.33.4.2 wiz add_sicallback((si_farg)ncr_dma_intr, (void *)cur_softc, 0);
616 1.33.4.2 wiz
617 1.33.4.2 wiz /*
618 1.33.4.2 wiz * Clear DMA-mode
619 1.33.4.2 wiz */
620 1.33.4.2 wiz SCSI_DMA->s_dma_ctrl &= ~SD_ENABLE;
621 1.33.4.2 wiz
622 1.33.4.2 wiz /*
623 1.33.4.2 wiz * Update the DMA 'registers' to reflect that all bytes
624 1.33.4.2 wiz * have been transfered and tell this to the 5380 too.
625 1.33.4.2 wiz */
626 1.33.4.2 wiz set_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)dma_ptr);
627 1.33.4.2 wiz set_scsi_dma(SCSI_DMA->s_dma_cnt, 0);
628 1.33.4.2 wiz SCSI_DMA->s_hdma_ctrl |= SDH_EOP;
629 1.33.4.2 wiz
630 1.33.4.2 wiz PID("end drq");
631 1.33.4.2 wiz if (!poll)
632 1.33.4.2 wiz single_inst_bset_b(MFP2->mf_imra, IA_SCSI);
633 1.33.4.2 wiz
634 1.33.4.2 wiz return;
635 1.33.4.2 wiz }
636 1.33.4.2 wiz
637 1.33.4.2 wiz #endif /* defined(TT_SCSI) */
638 1.33.4.2 wiz
639 1.33.4.2 wiz #if defined(FALCON_SCSI) && !defined(TT_SCSI)
640 1.33.4.2 wiz
641 1.33.4.2 wiz #define GET_5380_REG(rnum) get_falcon_5380_reg(rnum)
642 1.33.4.2 wiz #define SET_5380_REG(rnum,val) set_falcon_5380_reg(rnum, val)
643 1.33.4.2 wiz #define scsi_mach_init(sc) scsi_falcon_init(sc)
644 1.33.4.2 wiz #define scsi_ienable() scsi_falcon_ienable()
645 1.33.4.2 wiz #define scsi_idisable() scsi_falcon_idisable()
646 1.33.4.2 wiz #define scsi_clr_ipend() scsi_falcon_clr_ipend()
647 1.33.4.2 wiz #define scsi_ipending() scsi_falcon_ipending()
648 1.33.4.2 wiz #define scsi_dma_setup(r,p,m) scsi_falcon_dmasetup(r, p, m)
649 1.33.4.2 wiz #define wrong_dma_range(r,d) falcon_wrong_dma_range(r, d)
650 1.33.4.2 wiz #define poll_edma(reqp) falcon_poll_edma(reqp)
651 1.33.4.2 wiz #define get_dma_result(r, b) falcon_get_dma_result(r, b)
652 1.33.4.2 wiz #define can_access_5380() falcon_can_access_5380()
653 1.33.4.2 wiz #define emulated_dma() 0
654 1.33.4.2 wiz
655 1.33.4.2 wiz #define fair_to_keep_dma() (!st_dmawanted())
656 1.33.4.2 wiz #define claimed_dma() falcon_claimed_dma()
657 1.33.4.2 wiz #define reconsider_dma() falcon_reconsider_dma()
658 1.33.4.2 wiz
659 1.33.4.2 wiz #endif /* defined(FALCON_SCSI) && !defined(TT_SCSI) */
660 1.33.4.2 wiz
661 1.33.4.2 wiz #if defined(FALCON_SCSI)
662 1.33.4.2 wiz
663 1.33.4.2 wiz /*
664 1.33.4.2 wiz * Prototype functions defined below
665 1.33.4.2 wiz */
666 1.33.4.2 wiz static void scsi_falcon_init __P((struct ncr_softc *));
667 1.33.4.2 wiz static u_char get_falcon_5380_reg __P((u_short));
668 1.33.4.2 wiz static void set_falcon_5380_reg __P((u_short, u_short));
669 1.33.4.2 wiz static int falcon_wrong_dma_range __P((SC_REQ *, struct dma_chain *));
670 1.33.4.2 wiz static void fal1_dma __P((u_int, u_int, SC_REQ *));
671 1.33.4.2 wiz static void scsi_falcon_dmasetup __P((SC_REQ *, u_int, u_char));
672 1.33.4.2 wiz static int falcon_poll_edma __P((SC_REQ *));
673 1.33.4.2 wiz static int falcon_get_dma_result __P((SC_REQ *, u_long *));
674 1.33.4.2 wiz int falcon_can_access_5380 __P((void));
675 1.33.4.2 wiz void scsi_falcon_clr_ipend __P((void));
676 1.33.4.2 wiz void scsi_falcon_idisable __P((void));
677 1.33.4.2 wiz void scsi_falcon_ienable __P((void));
678 1.33.4.2 wiz int scsi_falcon_ipending __P((void));
679 1.33.4.2 wiz int falcon_claimed_dma __P((void));
680 1.33.4.2 wiz void falcon_reconsider_dma __P((void));
681 1.33.4.2 wiz
682 1.33.4.2 wiz static void
683 1.33.4.2 wiz scsi_falcon_init(sc)
684 1.33.4.2 wiz struct ncr_softc *sc;
685 1.33.4.2 wiz {
686 1.33.4.2 wiz /*
687 1.33.4.2 wiz * Enable disk related interrupts
688 1.33.4.2 wiz */
689 1.33.4.2 wiz MFP->mf_ierb |= IB_DINT;
690 1.33.4.2 wiz MFP->mf_iprb = (u_int8_t)~IB_DINT;
691 1.33.4.2 wiz MFP->mf_imrb |= IB_DINT;
692 1.33.4.2 wiz }
693 1.33.4.2 wiz
694 1.33.4.2 wiz static u_char
695 1.33.4.2 wiz get_falcon_5380_reg(rnum)
696 1.33.4.2 wiz u_short rnum;
697 1.33.4.2 wiz {
698 1.33.4.2 wiz DMA->dma_mode = DMA_SCSI + rnum;
699 1.33.4.2 wiz return(DMA->dma_data);
700 1.33.4.2 wiz }
701 1.33.4.2 wiz
702 1.33.4.2 wiz static void
703 1.33.4.2 wiz set_falcon_5380_reg(rnum, val)
704 1.33.4.2 wiz u_short rnum, val;
705 1.33.4.2 wiz {
706 1.33.4.2 wiz DMA->dma_mode = DMA_SCSI + rnum;
707 1.33.4.2 wiz DMA->dma_data = val;
708 1.33.4.2 wiz }
709 1.33.4.2 wiz
710 1.33.4.2 wiz extern __inline__ void
711 1.33.4.2 wiz scsi_falcon_ienable()
712 1.33.4.2 wiz {
713 1.33.4.2 wiz single_inst_bset_b(MFP->mf_imrb, IB_DINT);
714 1.33.4.2 wiz }
715 1.33.4.2 wiz
716 1.33.4.2 wiz extern __inline__ void
717 1.33.4.2 wiz scsi_falcon_idisable()
718 1.33.4.2 wiz {
719 1.33.4.2 wiz single_inst_bclr_b(MFP->mf_imrb, IB_DINT);
720 1.33.4.2 wiz }
721 1.33.4.2 wiz
722 1.33.4.2 wiz extern __inline__ void
723 1.33.4.2 wiz scsi_falcon_clr_ipend()
724 1.33.4.2 wiz {
725 1.33.4.2 wiz int tmp;
726 1.33.4.2 wiz
727 1.33.4.2 wiz tmp = get_falcon_5380_reg(NCR5380_IRCV);
728 1.33.4.2 wiz rem_sicallback((si_farg)ncr_ctrl_intr);
729 1.33.4.2 wiz }
730 1.33.4.2 wiz
731 1.33.4.2 wiz extern __inline__ int
732 1.33.4.2 wiz scsi_falcon_ipending()
733 1.33.4.2 wiz {
734 1.33.4.2 wiz if (connected && (connected->dr_flag & DRIVER_IN_DMA)) {
735 1.33.4.2 wiz /*
736 1.33.4.2 wiz * XXX: When DMA is running, we are only allowed to
737 1.33.4.2 wiz * check the 5380 when DMA _might_ be finished.
738 1.33.4.2 wiz */
739 1.33.4.2 wiz if (MFP->mf_gpip & IO_DINT)
740 1.33.4.2 wiz return (0); /* XXX: Actually: we're not allowed to check */
741 1.33.4.2 wiz
742 1.33.4.2 wiz /* LWP: 28-06, must be a dma interrupt! should the
743 1.33.4.2 wiz * ST-DMA unit be taken out of dma mode?????
744 1.33.4.2 wiz */
745 1.33.4.2 wiz DMA->dma_mode = 0x90;
746 1.33.4.2 wiz
747 1.33.4.2 wiz }
748 1.33.4.2 wiz return(get_falcon_5380_reg(NCR5380_DMSTAT) & SC_IRQ_SET);
749 1.33.4.2 wiz }
750 1.33.4.2 wiz
751 1.33.4.2 wiz static int
752 1.33.4.2 wiz falcon_wrong_dma_range(reqp, dm)
753 1.33.4.2 wiz SC_REQ *reqp;
754 1.33.4.2 wiz struct dma_chain *dm;
755 1.33.4.2 wiz {
756 1.33.4.2 wiz /*
757 1.33.4.2 wiz * Do not allow chains yet! See also comment with
758 1.33.4.2 wiz * falcon_poll_edma() !!!
759 1.33.4.2 wiz */
760 1.33.4.2 wiz if (((dm - reqp->dm_chain) > 0) || (dm->dm_addr & 0xff000000)) {
761 1.33.4.2 wiz reqp->dr_flag |= DRIVER_BOUNCING;
762 1.33.4.2 wiz return(1);
763 1.33.4.2 wiz }
764 1.33.4.2 wiz /*
765 1.33.4.2 wiz * Never allow DMA to happen on a Falcon when the transfer
766 1.33.4.2 wiz * size is no multiple of 512. This is the transfer unit of the
767 1.33.4.2 wiz * ST DMA-controller.
768 1.33.4.2 wiz */
769 1.33.4.2 wiz if(dm->dm_count & 511)
770 1.33.4.2 wiz return(1);
771 1.33.4.2 wiz return(0);
772 1.33.4.2 wiz }
773 1.33.4.2 wiz
774 1.33.4.2 wiz static int falcon_lock = 0;
775 1.33.4.2 wiz
776 1.33.4.2 wiz extern __inline__ int
777 1.33.4.2 wiz falcon_claimed_dma()
778 1.33.4.2 wiz {
779 1.33.4.2 wiz if (falcon_lock != DMA_LOCK_GRANT) {
780 1.33.4.2 wiz if (falcon_lock == DMA_LOCK_REQ) {
781 1.33.4.2 wiz /*
782 1.33.4.2 wiz * DMA access is being claimed.
783 1.33.4.2 wiz */
784 1.33.4.2 wiz return(0);
785 1.33.4.2 wiz }
786 1.33.4.2 wiz if (!st_dmagrab((dma_farg)ncr_ctrl_intr, (dma_farg)run_main,
787 1.33.4.2 wiz cur_softc, &falcon_lock, 1))
788 1.33.4.2 wiz return(0);
789 1.33.4.2 wiz }
790 1.33.4.2 wiz return(1);
791 1.33.4.2 wiz }
792 1.33.4.2 wiz
793 1.33.4.2 wiz extern __inline__ void
794 1.33.4.2 wiz falcon_reconsider_dma()
795 1.33.4.2 wiz {
796 1.33.4.2 wiz if (falcon_lock && (connected == NULL) && (discon_q == NULL)) {
797 1.33.4.2 wiz /*
798 1.33.4.2 wiz * No need to keep DMA locked by us as we are not currently
799 1.33.4.2 wiz * connected and no disconnected jobs are pending.
800 1.33.4.2 wiz */
801 1.33.4.2 wiz rem_sicallback((si_farg)ncr_ctrl_intr);
802 1.33.4.2 wiz st_dmafree(cur_softc, &falcon_lock);
803 1.33.4.2 wiz }
804 1.33.4.2 wiz
805 1.33.4.2 wiz if (!falcon_lock && (issue_q != NULL)) {
806 1.33.4.2 wiz /*
807 1.33.4.2 wiz * We must (re)claim DMA access as there are jobs
808 1.33.4.2 wiz * waiting in the issue queue.
809 1.33.4.2 wiz */
810 1.33.4.2 wiz st_dmagrab((dma_farg)ncr_ctrl_intr, (dma_farg)run_main,
811 1.33.4.2 wiz cur_softc, &falcon_lock, 0);
812 1.33.4.2 wiz }
813 1.33.4.2 wiz }
814 1.33.4.2 wiz
815 1.33.4.2 wiz static void
816 1.33.4.2 wiz fal1_dma(dir, nsects, reqp)
817 1.33.4.2 wiz u_int dir, nsects;
818 1.33.4.2 wiz SC_REQ *reqp;
819 1.33.4.2 wiz {
820 1.33.4.2 wiz dir <<= 8;
821 1.33.4.2 wiz st_dmaaddr_set((caddr_t)reqp->dm_cur->dm_addr);
822 1.33.4.2 wiz DMA->dma_mode = 0x90 | dir;
823 1.33.4.2 wiz DMA->dma_mode = 0x90 | (dir ^ DMA_WRBIT);
824 1.33.4.2 wiz DMA->dma_mode = 0x90 | dir;
825 1.33.4.2 wiz DMA->dma_data = nsects;
826 1.33.4.2 wiz delay(2); /* _really_ needed (Thomas Gerner) */
827 1.33.4.2 wiz DMA->dma_mode = 0x10 | dir;
828 1.33.4.2 wiz }
829 1.33.4.2 wiz
830 1.33.4.2 wiz static void
831 1.33.4.2 wiz scsi_falcon_dmasetup(reqp, phase, mode)
832 1.33.4.2 wiz SC_REQ *reqp;
833 1.33.4.2 wiz u_int phase;
834 1.33.4.2 wiz u_char mode;
835 1.33.4.2 wiz {
836 1.33.4.2 wiz int nsects = reqp->dm_cur->dm_count / 512; /* XXX */
837 1.33.4.2 wiz
838 1.33.4.2 wiz /*
839 1.33.4.2 wiz * XXX: We should probably clear the fifo before putting the
840 1.33.4.2 wiz * 5380 into DMA-mode.
841 1.33.4.2 wiz */
842 1.33.4.2 wiz if (PH_IN(phase)) {
843 1.33.4.2 wiz set_falcon_5380_reg(NCR5380_ICOM, 0);
844 1.33.4.2 wiz set_falcon_5380_reg(NCR5380_MODE, mode);
845 1.33.4.2 wiz set_falcon_5380_reg(NCR5380_IRCV, 0);
846 1.33.4.2 wiz fal1_dma(0, nsects, reqp);
847 1.33.4.2 wiz }
848 1.33.4.2 wiz else {
849 1.33.4.2 wiz set_falcon_5380_reg(NCR5380_MODE, mode);
850 1.33.4.2 wiz set_falcon_5380_reg(NCR5380_ICOM, SC_ADTB);
851 1.33.4.2 wiz set_falcon_5380_reg(NCR5380_DMSTAT, 0);
852 1.33.4.2 wiz fal1_dma(1, nsects, reqp);
853 1.33.4.2 wiz }
854 1.33.4.2 wiz }
855 1.33.4.2 wiz
856 1.33.4.2 wiz static int
857 1.33.4.2 wiz falcon_poll_edma(reqp)
858 1.33.4.2 wiz SC_REQ *reqp;
859 1.33.4.2 wiz {
860 1.33.4.2 wiz int timeout = 9000; /* XXX */
861 1.33.4.2 wiz
862 1.33.4.2 wiz /*
863 1.33.4.2 wiz * Because of the Falcon hardware, it is impossible to reach
864 1.33.4.2 wiz * the 5380 while doing DMA-transfers. So we have to rely on
865 1.33.4.2 wiz * the interrupt line to determine if DMA-has finished. the
866 1.33.4.2 wiz * DMA-controller itself will never fire an interrupt. This means
867 1.33.4.2 wiz * that 'broken-up' DMA transfers are not (yet) possible on the
868 1.33.4.2 wiz * Falcon.
869 1.33.4.2 wiz */
870 1.33.4.2 wiz for (;;) {
871 1.33.4.2 wiz delay(20);
872 1.33.4.2 wiz if (--timeout <= 0) {
873 1.33.4.2 wiz ncr_tprint(reqp, "Timeout on polled transfer\n");
874 1.33.4.2 wiz reqp->xs->error = XS_TIMEOUT;
875 1.33.4.2 wiz return(0);
876 1.33.4.2 wiz }
877 1.33.4.2 wiz if (!(MFP->mf_gpip & IO_DINT))
878 1.33.4.2 wiz break;
879 1.33.4.2 wiz }
880 1.33.4.2 wiz return(1);
881 1.33.4.2 wiz }
882 1.33.4.2 wiz
883 1.33.4.2 wiz static int
884 1.33.4.2 wiz falcon_get_dma_result(reqp, bytes_left)
885 1.33.4.2 wiz SC_REQ *reqp;
886 1.33.4.2 wiz u_long *bytes_left;
887 1.33.4.2 wiz {
888 1.33.4.2 wiz int rv = 0;
889 1.33.4.2 wiz int st_dmastat;
890 1.33.4.2 wiz u_long bytes_done;
891 1.33.4.2 wiz
892 1.33.4.2 wiz /*
893 1.33.4.2 wiz * Select sector counter register first (See Atari docu.)
894 1.33.4.2 wiz */
895 1.33.4.2 wiz DMA->dma_mode = 0x90;
896 1.33.4.2 wiz if (!(st_dmastat = DMA->dma_stat) & 0x01) {
897 1.33.4.2 wiz /*
898 1.33.4.2 wiz * Misc. DMA-error according to Atari...
899 1.33.4.2 wiz */
900 1.33.4.2 wiz ncr_tprint(reqp, "Unknow ST-SCSI error near 0x%x\n",
901 1.33.4.2 wiz st_dmaaddr_get());
902 1.33.4.2 wiz reqp->xs->error = XS_DRIVER_STUFFUP;
903 1.33.4.2 wiz rv = 1;
904 1.33.4.2 wiz }
905 1.33.4.2 wiz /*
906 1.33.4.2 wiz * Because we NEVER start DMA on the Falcon when the data size
907 1.33.4.2 wiz * is not a multiple of 512 bytes, we can safely round down the
908 1.33.4.2 wiz * byte count on writes. We need to because in case of a disconnect,
909 1.33.4.2 wiz * the DMA has already prefetched the next couple of bytes.
910 1.33.4.2 wiz * On read, these byte counts are an error. They are logged and
911 1.33.4.2 wiz * should be handled by the mi-part of the driver.
912 1.33.4.2 wiz * NOTE: We formerly did this by using the 'byte-count-zero' bit
913 1.33.4.2 wiz * of the DMA controller, but this didn't seem to work???
914 1.33.4.2 wiz * [lwp 29/06/96]
915 1.33.4.2 wiz */
916 1.33.4.2 wiz bytes_done = st_dmaaddr_get() - reqp->dm_cur->dm_addr;
917 1.33.4.2 wiz if (bytes_done & 511) {
918 1.33.4.2 wiz if (PH_IN(reqp->phase)) {
919 1.33.4.2 wiz ncr_tprint(reqp, "Byte count on read not a multiple "
920 1.33.4.2 wiz "of 512 (%ld)\n", bytes_done);
921 1.33.4.2 wiz }
922 1.33.4.2 wiz bytes_done &= ~511;
923 1.33.4.2 wiz }
924 1.33.4.2 wiz if ((*bytes_left = reqp->dm_cur->dm_count - bytes_done) == 0)
925 1.33.4.2 wiz rv = 1;
926 1.33.4.2 wiz return(rv);
927 1.33.4.2 wiz }
928 1.33.4.2 wiz
929 1.33.4.2 wiz static int
930 1.33.4.2 wiz falcon_can_access_5380()
931 1.33.4.2 wiz {
932 1.33.4.2 wiz if (connected && (connected->dr_flag & DRIVER_IN_DMA)
933 1.33.4.2 wiz && (MFP->mf_gpip & IO_DINT))
934 1.33.4.2 wiz return(0);
935 1.33.4.2 wiz return(1);
936 1.33.4.2 wiz }
937 1.33.4.2 wiz
938 1.33.4.2 wiz #endif /* defined(FALCON_SCSI) */
939 1.33.4.2 wiz
940 1.33.4.2 wiz #if defined(TT_SCSI) && defined(FALCON_SCSI)
941 1.33.4.2 wiz /*
942 1.33.4.2 wiz * Define some functions to support _both_ TT and Falcon SCSI
943 1.33.4.2 wiz */
944 1.33.4.2 wiz
945 1.33.4.2 wiz /*
946 1.33.4.2 wiz * The prototypes first...
947 1.33.4.2 wiz */
948 1.33.4.2 wiz static void scsi_mach_init __P((struct ncr_softc *));
949 1.33.4.2 wiz void scsi_ienable __P((void));
950 1.33.4.2 wiz void scsi_idisable __P((void));
951 1.33.4.2 wiz void scsi_clr_ipend __P((void));
952 1.33.4.2 wiz int scsi_ipending __P((void));
953 1.33.4.2 wiz void scsi_dma_setup __P((SC_REQ *, u_int, u_char));
954 1.33.4.2 wiz int wrong_dma_range __P((SC_REQ *, struct dma_chain *));
955 1.33.4.2 wiz int poll_edma __P((SC_REQ *));
956 1.33.4.2 wiz int get_dma_result __P((SC_REQ *, u_long *));
957 1.33.4.2 wiz int can_access_5380 __P((void));
958 1.33.4.2 wiz
959 1.33.4.2 wiz /*
960 1.33.4.2 wiz * Register access will be done through the following 2 function pointers.
961 1.33.4.2 wiz */
962 1.33.4.2 wiz static u_char (*get_5380_reg) __P((u_short));
963 1.33.4.2 wiz static void (*set_5380_reg) __P((u_short, u_short));
964 1.33.4.2 wiz
965 1.33.4.2 wiz #define GET_5380_REG (*get_5380_reg)
966 1.33.4.2 wiz #define SET_5380_REG (*set_5380_reg)
967 1.33.4.2 wiz
968 1.33.4.2 wiz static void
969 1.33.4.2 wiz scsi_mach_init(sc)
970 1.33.4.2 wiz struct ncr_softc *sc;
971 1.33.4.2 wiz {
972 1.33.4.2 wiz if (machineid & ATARI_FALCON) {
973 1.33.4.2 wiz get_5380_reg = get_falcon_5380_reg;
974 1.33.4.2 wiz set_5380_reg = set_falcon_5380_reg;
975 1.33.4.2 wiz scsi_falcon_init(sc);
976 1.33.4.2 wiz }
977 1.33.4.2 wiz else {
978 1.33.4.2 wiz get_5380_reg = get_tt_5380_reg;
979 1.33.4.2 wiz set_5380_reg = set_tt_5380_reg;
980 1.33.4.2 wiz scsi_tt_init(sc);
981 1.33.4.2 wiz }
982 1.33.4.2 wiz }
983 1.33.4.2 wiz
984 1.33.4.2 wiz extern __inline__ void
985 1.33.4.2 wiz scsi_ienable()
986 1.33.4.2 wiz {
987 1.33.4.2 wiz if (machineid & ATARI_FALCON)
988 1.33.4.2 wiz scsi_falcon_ienable();
989 1.33.4.2 wiz else scsi_tt_ienable();
990 1.33.4.2 wiz }
991 1.33.4.2 wiz
992 1.33.4.2 wiz extern __inline__ void
993 1.33.4.2 wiz scsi_idisable()
994 1.33.4.2 wiz {
995 1.33.4.2 wiz if (machineid & ATARI_FALCON)
996 1.33.4.2 wiz scsi_falcon_idisable();
997 1.33.4.2 wiz else scsi_tt_idisable();
998 1.33.4.2 wiz }
999 1.33.4.2 wiz
1000 1.33.4.2 wiz extern __inline__ void
1001 1.33.4.2 wiz scsi_clr_ipend()
1002 1.33.4.2 wiz {
1003 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1004 1.33.4.2 wiz scsi_falcon_clr_ipend();
1005 1.33.4.2 wiz else scsi_tt_clr_ipend();
1006 1.33.4.2 wiz }
1007 1.33.4.2 wiz
1008 1.33.4.2 wiz extern __inline__ int
1009 1.33.4.2 wiz scsi_ipending()
1010 1.33.4.2 wiz {
1011 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1012 1.33.4.2 wiz return(scsi_falcon_ipending());
1013 1.33.4.2 wiz else return (GET_TT_REG(NCR5380_DMSTAT) & SC_IRQ_SET);
1014 1.33.4.2 wiz }
1015 1.33.4.2 wiz
1016 1.33.4.2 wiz extern __inline__ void
1017 1.33.4.2 wiz scsi_dma_setup(reqp, phase, mbase)
1018 1.33.4.2 wiz SC_REQ *reqp;
1019 1.33.4.2 wiz u_int phase;
1020 1.33.4.2 wiz u_char mbase;
1021 1.33.4.2 wiz {
1022 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1023 1.33.4.2 wiz scsi_falcon_dmasetup(reqp, phase, mbase);
1024 1.33.4.2 wiz else scsi_tt_dmasetup(reqp, phase, mbase);
1025 1.33.4.2 wiz }
1026 1.33.4.2 wiz
1027 1.33.4.2 wiz extern __inline__ int
1028 1.33.4.2 wiz wrong_dma_range(reqp, dm)
1029 1.33.4.2 wiz SC_REQ *reqp;
1030 1.33.4.2 wiz struct dma_chain *dm;
1031 1.33.4.2 wiz {
1032 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1033 1.33.4.2 wiz return(falcon_wrong_dma_range(reqp, dm));
1034 1.33.4.2 wiz else return(tt_wrong_dma_range(reqp, dm));
1035 1.33.4.2 wiz }
1036 1.33.4.2 wiz
1037 1.33.4.2 wiz extern __inline__ int
1038 1.33.4.2 wiz poll_edma(reqp)
1039 1.33.4.2 wiz SC_REQ *reqp;
1040 1.33.4.2 wiz {
1041 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1042 1.33.4.2 wiz return(falcon_poll_edma(reqp));
1043 1.33.4.2 wiz else return(tt_poll_edma(reqp));
1044 1.33.4.2 wiz }
1045 1.33.4.2 wiz
1046 1.33.4.2 wiz extern __inline__ int
1047 1.33.4.2 wiz get_dma_result(reqp, bytes_left)
1048 1.33.4.2 wiz SC_REQ *reqp;
1049 1.33.4.2 wiz u_long *bytes_left;
1050 1.33.4.2 wiz {
1051 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1052 1.33.4.2 wiz return(falcon_get_dma_result(reqp, bytes_left));
1053 1.33.4.2 wiz else return(tt_get_dma_result(reqp, bytes_left));
1054 1.33.4.2 wiz }
1055 1.33.4.2 wiz
1056 1.33.4.2 wiz extern __inline__ int
1057 1.33.4.2 wiz can_access_5380()
1058 1.33.4.2 wiz {
1059 1.33.4.2 wiz if (machineid & ATARI_FALCON)
1060 1.33.4.2 wiz return(falcon_can_access_5380());
1061 1.33.4.2 wiz return(1);
1062 1.33.4.2 wiz }
1063 1.33.4.2 wiz
1064 1.33.4.2 wiz #define emulated_dma() ((machineid & ATARI_HADES) ? 1 : 0)
1065 1.33.4.2 wiz
1066 1.33.4.2 wiz /*
1067 1.33.4.2 wiz * Locking stuff. All turns into NOP's on the TT.
1068 1.33.4.2 wiz */
1069 1.33.4.2 wiz #define fair_to_keep_dma() ((machineid & ATARI_FALCON) ? \
1070 1.33.4.2 wiz !st_dmawanted() : 1)
1071 1.33.4.2 wiz #define claimed_dma() ((machineid & ATARI_FALCON) ? \
1072 1.33.4.2 wiz falcon_claimed_dma() : 1)
1073 1.33.4.2 wiz #define reconsider_dma() { \
1074 1.33.4.2 wiz if(machineid & ATARI_FALCON) \
1075 1.33.4.2 wiz falcon_reconsider_dma();\
1076 1.33.4.2 wiz }
1077 1.33.4.2 wiz #endif /* defined(TT_SCSI) && defined(FALCON_SCSI) */
1078 1.33.4.2 wiz
1079 1.33.4.2 wiz /**********************************************
1080 1.33.4.2 wiz * Functions present for both TT and Falcon. *
1081 1.33.4.2 wiz **********************************************/
1082 1.33.4.2 wiz /*
1083 1.33.4.2 wiz * Our autoconfig matching function
1084 1.33.4.2 wiz */
1085 1.33.4.2 wiz static int
1086 1.33.4.2 wiz machine_match(struct device *pdp, void *match, void *auxp,
1087 1.33.4.2 wiz struct cfdriver *cd)
1088 1.33.4.2 wiz {
1089 1.33.4.2 wiz static int we_matched = 0; /* Only one unit */
1090 1.33.4.2 wiz
1091 1.33.4.2 wiz if (strcmp(auxp, cd->cd_name) || we_matched)
1092 1.33.4.2 wiz return(0);
1093 1.33.4.2 wiz
1094 1.33.4.2 wiz we_matched = 1;
1095 1.33.4.2 wiz return(1);
1096 1.33.4.2 wiz }
1097 1.33.4.2 wiz
1098 1.33.4.2 wiz /*
1099 1.33.4.2 wiz * Bounce buffer (de)allocation. Those buffers are gotten from the ST-mem
1100 1.33.4.2 wiz * pool. Allocation here is both contiguous and in the lower 16Mb of
1101 1.33.4.2 wiz * the address space. Thus being DMA-able for all controllers.
1102 1.33.4.2 wiz */
1103 1.33.4.2 wiz static u_char *
1104 1.33.4.2 wiz alloc_bounceb(u_long len)
1105 1.33.4.2 wiz {
1106 1.33.4.2 wiz void *tmp;
1107 1.33.4.2 wiz
1108 1.33.4.2 wiz return((u_char *)alloc_stmem(len, &tmp));
1109 1.33.4.2 wiz }
1110 1.33.4.2 wiz
1111 1.33.4.2 wiz static void
1112 1.33.4.2 wiz free_bounceb(u_char *bounceb)
1113 1.33.4.2 wiz {
1114 1.33.4.2 wiz free_stmem(bounceb);
1115 1.33.4.2 wiz }
1116 1.33.4.2 wiz
1117 1.33.4.2 wiz /*
1118 1.33.4.2 wiz * 5380 interrupt.
1119 1.33.4.2 wiz */
1120 1.33.4.2 wiz void
1121 1.33.4.2 wiz scsi_ctrl(int sr)
1122 1.33.4.2 wiz {
1123 1.33.4.2 wiz if (GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET) {
1124 1.33.4.2 wiz scsi_idisable();
1125 1.33.4.2 wiz if (!BASEPRI(sr))
1126 1.33.4.2 wiz add_sicallback((si_farg)ncr_ctrl_intr,
1127 1.33.4.2 wiz (void *)cur_softc, 0);
1128 1.33.4.2 wiz else {
1129 1.33.4.2 wiz spl1();
1130 1.33.4.2 wiz ncr_ctrl_intr(cur_softc);
1131 1.33.4.2 wiz spl0();
1132 1.33.4.2 wiz }
1133 1.33.4.2 wiz }
1134 1.33.4.2 wiz }
1135 1.33.4.2 wiz
1136 1.33.4.2 wiz /*
1137 1.33.4.2 wiz * DMA controller interrupt
1138 1.33.4.2 wiz */
1139 1.33.4.2 wiz void
1140 1.33.4.2 wiz scsi_dma(int sr)
1141 1.33.4.2 wiz {
1142 1.33.4.2 wiz SC_REQ *reqp;
1143 1.33.4.2 wiz
1144 1.33.4.2 wiz if ((reqp = connected) && (reqp->dr_flag & DRIVER_IN_DMA)) {
1145 1.33.4.2 wiz scsi_idisable();
1146 1.33.4.2 wiz if (!BASEPRI(sr))
1147 1.33.4.2 wiz add_sicallback((si_farg)ncr_dma_intr,
1148 1.33.4.2 wiz (void *)cur_softc, 0);
1149 1.33.4.2 wiz else {
1150 1.33.4.2 wiz spl1();
1151 1.33.4.2 wiz ncr_dma_intr(cur_softc);
1152 1.33.4.2 wiz spl0();
1153 1.33.4.2 wiz }
1154 1.33.4.2 wiz }
1155 1.33.4.2 wiz }
1156 1.33.4.2 wiz
1157 1.33.4.2 wiz /*
1158 1.33.4.2 wiz * Last but not least... Include the general driver code
1159 1.33.4.2 wiz */
1160 1.33.4.2 wiz #include <atari/dev/ncr5380.c>
1161