atari5380.c revision 1.25
1 /* $NetBSD: atari5380.c,v 1.25 1997/04/06 12:42:44 leo Exp $ */ 2 3 /* 4 * Copyright (c) 1995 Leo Weppelman. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Leo Weppelman. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/kernel.h> 36 #include <sys/device.h> 37 #include <sys/buf.h> 38 #include <scsi/scsi_all.h> 39 #include <scsi/scsi_message.h> 40 #include <scsi/scsiconf.h> 41 42 #include <m68k/asm_single.h> 43 44 #include <atari/atari/stalloc.h> 45 46 /* 47 * Include the driver definitions 48 */ 49 #include <atari/dev/ncr5380reg.h> 50 51 #include <machine/stdarg.h> 52 #include <machine/iomap.h> 53 #include <machine/mfp.h> 54 55 #include <atari/atari/intr.h> 56 57 #if defined(FALCON_SCSI) 58 #include <machine/dma.h> 59 #endif 60 61 /* 62 * Set the various driver options 63 */ 64 #define NREQ 18 /* Size of issue queue */ 65 #define AUTO_SENSE 1 /* Automatically issue a request-sense */ 66 67 #define DRNAME ncrscsi /* used in various prints */ 68 #undef DBG_SEL /* Show the selection process */ 69 #undef DBG_REQ /* Show enqueued/ready requests */ 70 #undef DBG_ERR_RET /* Show requests with != 0 return code */ 71 #undef DBG_NOWRITE /* Do not allow writes to the targets */ 72 #undef DBG_PIO /* Show the polled-I/O process */ 73 #undef DBG_INF /* Show information transfer process */ 74 #define DBG_NOSTATIC /* No static functions, all in DDB trace*/ 75 #define DBG_PID 15 /* Keep track of driver */ 76 #define REAL_DMA /* Use DMA if sensible */ 77 #if defined(FALCON_SCSI) 78 #define REAL_DMA_POLL 1 /* 1: Poll for end of DMA-transfer */ 79 #else 80 #define REAL_DMA_POLL 0 /* 1: Poll for end of DMA-transfer */ 81 #endif 82 #undef USE_PDMA /* Use special pdma-transfer function */ 83 #define MIN_PHYS 65536 /*BARF!!!!*/ 84 85 /* 86 * Include more driver definitions 87 */ 88 #include <atari/dev/ncr5380var.h> 89 90 /* 91 * The atari specific driver options 92 */ 93 #undef NO_TTRAM_DMA /* Do not use DMA to TT-ram. This */ 94 /* fails on older atari's */ 95 #define ENABLE_NCR5380(sc) cur_softc = sc; 96 97 static u_char *alloc_bounceb __P((u_long)); 98 static void free_bounceb __P((u_char *)); 99 static int machine_match __P((struct device *, void *, void *, 100 struct cfdriver *)); 101 void scsi_ctrl __P((int)); 102 void scsi_dma __P((int)); 103 104 /* 105 * Functions that do nothing on the atari 106 */ 107 #define pdma_ready() 0 108 109 #if defined(TT_SCSI) 110 111 void ncr5380_drq_intr __P((void)); 112 113 /* 114 * Define all the things we need of the DMA-controller 115 */ 116 #define SCSI_DMA ((struct scsi_dma *)AD_SCSI_DMA) 117 #define SCSI_5380 ((struct scsi_5380 *)AD_NCR5380) 118 119 struct scsi_dma { 120 volatile u_char s_dma_ptr[8]; /* use only the odd bytes */ 121 volatile u_char s_dma_cnt[8]; /* use only the odd bytes */ 122 volatile u_char s_dma_res[4]; /* data residue register */ 123 volatile u_char s_dma_gap; /* not used */ 124 volatile u_char s_dma_ctrl; /* control register */ 125 volatile u_char s_dma_gap2; /* not used */ 126 volatile u_char s_hdma_ctrl; /* Hades control register */ 127 }; 128 129 #define set_scsi_dma(addr, val) (void)( \ 130 { \ 131 u_char *address = (u_char*)addr+1; \ 132 u_long nval = (u_long)val; \ 133 __asm("movepl %0, %1@(0)": :"d" (nval), "a" (address)); \ 134 }) 135 136 #define get_scsi_dma(addr, res) ( \ 137 { \ 138 u_char *address = (u_char*)addr+1; \ 139 u_long nval; \ 140 __asm("movepl %1@(0), %0": "=d" (nval) : "a" (address)); \ 141 res = (u_long)nval; \ 142 }) 143 144 /* 145 * Defines for TT-DMA control register 146 */ 147 #define SD_BUSERR 0x80 /* 1 = transfer caused bus error*/ 148 #define SD_ZERO 0x40 /* 1 = byte counter is zero */ 149 #define SD_ENABLE 0x02 /* 1 = Enable DMA */ 150 #define SD_OUT 0x01 /* Direction: memory to SCSI */ 151 #define SD_IN 0x00 /* Direction: SCSI to memory */ 152 153 /* 154 * Defines for Hades-DMA control register 155 */ 156 #define SDH_BUSERR 0x02 /* 1 = Bus error */ 157 #define SDH_EOP 0x01 /* 1 = Signal EOP on 5380 */ 158 #define SDH_ZERO 0x40 /* 1 = Byte counter is zero */ 159 160 /* 161 * Define the 5380 register set 162 */ 163 struct scsi_5380 { 164 volatile u_char scsi_5380[16]; /* use only the odd bytes */ 165 }; 166 #endif /* TT_SCSI */ 167 168 /********************************************** 169 * Variables present for both TT and Falcon. * 170 **********************************************/ 171 172 /* 173 * Softc of currently active controller (a bit of fake; we only have one) 174 */ 175 static struct ncr_softc *cur_softc; 176 177 #if defined(TT_SCSI) && !defined(FALCON_SCSI) 178 /* 179 * We can be more efficient for some functions when only TT_SCSI is selected 180 */ 181 #define GET_5380_REG(rnum) SCSI_5380->scsi_5380[(rnum << 1) | 1] 182 #define SET_5380_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val) 183 184 #define scsi_mach_init(sc) scsi_tt_init(sc) 185 #define scsi_ienable() scsi_tt_ienable() 186 #define scsi_idisable() scsi_tt_idisable() 187 #define scsi_clr_ipend() scsi_tt_clr_ipend() 188 #define scsi_ipending() (GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET) 189 #define scsi_dma_setup(r,p,m) scsi_tt_dmasetup(r, p, m) 190 #define wrong_dma_range(r,d) tt_wrong_dma_range(r, d) 191 #define poll_edma(reqp) tt_poll_edma(reqp) 192 #define get_dma_result(r, b) tt_get_dma_result(r, b) 193 #define can_access_5380() 1 194 #define emulated_dma() ((machineid & ATARI_HADES) ? 1 : 0) 195 196 #define fair_to_keep_dma() 1 197 #define claimed_dma() 1 198 #define reconsider_dma() 199 200 #endif /* defined(TT_SCSI) && !defined(FALCON_SCSI) */ 201 202 #if defined(TT_SCSI) 203 204 /* 205 * Prototype functions defined below 206 */ 207 #ifdef NO_TTRAM_DMA 208 static int tt_wrong_dma_range __P((SC_REQ *, struct dma_chain *)); 209 #endif 210 static void scsi_tt_init __P((struct ncr_softc *)); 211 static u_char get_tt_5380_reg __P((u_short)); 212 static void set_tt_5380_reg __P((u_short, u_short)); 213 static void scsi_tt_dmasetup __P((SC_REQ *, u_int, u_char)); 214 static int tt_poll_edma __P((SC_REQ *)); 215 static u_char *ptov __P((SC_REQ *, u_long*)); 216 static int tt_get_dma_result __P((SC_REQ *, u_long *)); 217 void scsi_tt_ienable __P((void)); 218 void scsi_tt_idisable __P((void)); 219 void scsi_tt_clr_ipend __P((void)); 220 221 /* 222 * Define these too, so we can use them locally... 223 */ 224 #define GET_TT_REG(rnum) SCSI_5380->scsi_5380[(rnum << 1) | 1] 225 #define SET_TT_REG(rnum,val) (SCSI_5380->scsi_5380[(rnum << 1) | 1] = val) 226 227 #ifdef NO_TTRAM_DMA 228 static int 229 tt_wrong_dma_range(reqp, dm) 230 SC_REQ *reqp; 231 struct dma_chain *dm; 232 { 233 if (dm->dm_addr & 0xff000000) { 234 reqp->dr_flag |= DRIVER_BOUNCING; 235 return(1); 236 } 237 return(0); 238 } 239 #else 240 #define tt_wrong_dma_range(reqp, dm) 0 241 #endif 242 243 static void 244 scsi_tt_init(struct ncr_softc *sc) 245 { 246 /* 247 * Enable SCSI-related interrupts 248 */ 249 MFP2->mf_aer |= 0x80; /* SCSI IRQ goes HIGH!!!!! */ 250 251 if (machineid & ATARI_TT) { 252 /* SCSI-dma interrupts */ 253 MFP2->mf_ierb |= IB_SCDM; 254 MFP2->mf_iprb &= ~IB_SCDM; 255 MFP2->mf_imrb |= IB_SCDM; 256 } 257 else if (machineid & ATARI_HADES) { 258 SCSI_DMA->s_hdma_ctrl = 0; 259 260 if (intr_establish(2, AUTO_VEC, 0, 261 (hw_ifun_t)ncr5380_drq_intr, 262 NULL) == NULL) 263 panic("scsi_tt_init: Can't establish drq-interrupt"); 264 } 265 else panic("scsi_tt_init: should not come here"); 266 267 MFP2->mf_iera |= IA_SCSI; /* SCSI-5380 interrupts */ 268 MFP2->mf_ipra &= ~IA_SCSI; 269 MFP2->mf_imra |= IA_SCSI; 270 271 /* 272 * LWP: DMA transfers to TT-ram causes data to be garbeled 273 * without notice on some revisons of the TT-mainboard. 274 * When program's generate misterious Segmentations faults, 275 * try turning on NO_TTRAM_DMA. 276 */ 277 #ifdef NO_TTRAM_DMA 278 printf(": DMA to TT-RAM is disabled!"); 279 #endif 280 } 281 282 static u_char 283 get_tt_5380_reg(u_short rnum) 284 { 285 return(SCSI_5380->scsi_5380[(rnum << 1) | 1]); 286 } 287 288 static void 289 set_tt_5380_reg(u_short rnum, u_short val) 290 { 291 SCSI_5380->scsi_5380[(rnum << 1) | 1] = val; 292 } 293 294 extern __inline__ void 295 scsi_tt_ienable(void) 296 { 297 if (machineid & ATARI_TT) 298 single_inst_bset_b(MFP2->mf_imrb, IB_SCDM); 299 single_inst_bset_b(MFP2->mf_imra, IA_SCSI); 300 } 301 302 extern __inline__ void 303 scsi_tt_idisable(void) 304 { 305 if (machineid & ATARI_TT) 306 single_inst_bclr_b(MFP2->mf_imrb, IB_SCDM); 307 single_inst_bclr_b(MFP2->mf_imra, IA_SCSI); 308 } 309 310 extern __inline__ void 311 scsi_tt_clr_ipend(void) 312 { 313 int tmp; 314 315 SCSI_DMA->s_dma_ctrl = 0; 316 tmp = GET_TT_REG(NCR5380_IRCV); 317 if (machineid & ATARI_TT) 318 single_inst_bclr_b(MFP2->mf_iprb, IB_SCDM); 319 single_inst_bclr_b(MFP2->mf_ipra, IA_SCSI); 320 321 /* 322 * Remove interrupts already scheduled. 323 */ 324 rem_sicallback((si_farg)ncr_ctrl_intr); 325 rem_sicallback((si_farg)ncr_dma_intr); 326 } 327 328 static void 329 scsi_tt_dmasetup(SC_REQ *reqp, u_int phase, u_char mode) 330 { 331 if (PH_IN(phase)) { 332 SCSI_DMA->s_dma_ctrl = SD_IN; 333 if (machineid & ATARI_HADES) 334 SCSI_DMA->s_hdma_ctrl &= ~(SDH_BUSERR|SDH_EOP); 335 set_scsi_dma(&(SCSI_DMA->s_dma_ptr), reqp->dm_cur->dm_addr); 336 set_scsi_dma(&(SCSI_DMA->s_dma_cnt), reqp->dm_cur->dm_count); 337 SET_TT_REG(NCR5380_ICOM, 0); 338 SET_TT_REG(NCR5380_MODE, mode); 339 SCSI_DMA->s_dma_ctrl = SD_ENABLE; 340 SET_TT_REG(NCR5380_IRCV, 0); 341 } 342 else { 343 SCSI_DMA->s_dma_ctrl = SD_OUT; 344 if (machineid & ATARI_HADES) 345 SCSI_DMA->s_hdma_ctrl &= ~(SDH_BUSERR|SDH_EOP); 346 set_scsi_dma(&(SCSI_DMA->s_dma_ptr), reqp->dm_cur->dm_addr); 347 set_scsi_dma(&(SCSI_DMA->s_dma_cnt), reqp->dm_cur->dm_count); 348 SET_TT_REG(NCR5380_MODE, mode); 349 SET_TT_REG(NCR5380_ICOM, SC_ADTB); 350 SET_TT_REG(NCR5380_DMSTAT, 0); 351 SCSI_DMA->s_dma_ctrl = SD_ENABLE|SD_OUT; 352 } 353 } 354 355 static int 356 tt_poll_edma(SC_REQ *reqp) 357 { 358 u_char dmstat, dmastat; 359 int timeout = 9000; /* XXX */ 360 361 /* 362 * We wait here until the DMA has finished. This can be 363 * achieved by checking the following conditions: 364 * - 5380: 365 * - End of DMA flag is set 366 * - We lost BSY (error!!) 367 * - A phase mismatch has occured (partial transfer) 368 * - DMA-controller: 369 * - A bus error occurred (Kernel error!!) 370 * - All bytes are transferred 371 * If one of the terminating conditions was met, we call 372 * 'dma_ready' to check errors and perform the bookkeeping. 373 */ 374 375 for (;;) { 376 delay(20); 377 if (--timeout <= 0) { 378 ncr_tprint(reqp, "timeout on polled transfer\n"); 379 reqp->xs->error = XS_TIMEOUT; 380 return(0); 381 } 382 dmstat = GET_TT_REG(NCR5380_DMSTAT); 383 384 if ((machineid & ATARI_HADES) && (dmstat & SC_DMA_REQ)) { 385 ncr5380_drq_intr(); 386 dmstat = GET_TT_REG(NCR5380_DMSTAT); 387 } 388 389 dmastat = SCSI_DMA->s_dma_ctrl; 390 if (dmstat & (SC_END_DMA|SC_BSY_ERR|SC_IRQ_SET)) 391 break; 392 if (!(dmstat & SC_PHS_MTCH)) 393 break; 394 if (dmastat & (SD_BUSERR|SD_ZERO)) 395 break; 396 } 397 return(1); 398 } 399 400 /* 401 * Convert physical DMA address to a virtual address. 402 */ 403 static u_char * 404 ptov(SC_REQ *reqp, u_long *phaddr) 405 { 406 struct dma_chain *dm; 407 u_char *vaddr; 408 409 dm = reqp->dm_chain; 410 vaddr = reqp->xdata_ptr; 411 for(; dm < reqp->dm_cur; dm++) 412 vaddr += dm->dm_count; 413 vaddr += (u_long)phaddr - dm->dm_addr; 414 return(vaddr); 415 } 416 417 static int 418 tt_get_dma_result(SC_REQ *reqp, u_long *bytes_left) 419 { 420 int dmastat, dmstat; 421 u_char *byte_p; 422 u_long leftover; 423 424 dmastat = SCSI_DMA->s_dma_ctrl; 425 dmstat = GET_TT_REG(NCR5380_DMSTAT); 426 get_scsi_dma(SCSI_DMA->s_dma_cnt, leftover); 427 get_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)byte_p); 428 429 if (dmastat & SD_BUSERR) { 430 /* 431 * The DMA-controller seems to access 8 bytes beyond 432 * it's limits on output. Therefore check also the byte 433 * count. If it's zero, ignore the bus error. 434 */ 435 if (leftover != 0) { 436 ncr_tprint(reqp, 437 "SCSI-DMA buserror - accessing 0x%x\n", byte_p); 438 reqp->xs->error = XS_DRIVER_STUFFUP; 439 } 440 } 441 442 /* 443 * We handle the following special condition below: 444 * -- The device disconnects in the middle of a write operation -- 445 * In this case, the 5380 has already pre-fetched the next byte from 446 * the DMA-controller before the phase mismatch occurs. Therefore, 447 * leftover is 1 too low. 448 * This does not always happen! Therefore, we only do this when 449 * leftover is odd. This assumes that DMA transfers are _even_! This 450 * is normally the case on disks and types but might not always be. 451 * XXX: Check if ACK is consistently high on these occasions LWP 452 */ 453 if ((leftover & 1) && !(dmstat & SC_PHS_MTCH) && PH_OUT(reqp->phase)) 454 leftover++; 455 456 /* 457 * Check if there are some 'restbytes' left in the DMA-controller. 458 */ 459 if ((machineid & ATARI_TT) && ((u_long)byte_p & 3) 460 && PH_IN(reqp->phase)) { 461 u_char *p, *q; 462 463 p = ptov(reqp, (u_long *)((u_long)byte_p & ~3)); 464 q = (u_char*)&(SCSI_DMA->s_dma_res); 465 switch ((u_long)byte_p & 3) { 466 case 3: *p++ = *q++; 467 case 2: *p++ = *q++; 468 case 1: *p++ = *q++; 469 } 470 } 471 *bytes_left = leftover; 472 return ((dmastat & (SD_BUSERR|SD_ZERO)) ? 1 : 0); 473 } 474 475 static u_char *dma_ptr; 476 void 477 ncr5380_drq_intr() 478 { 479 extern int *nofault; 480 label_t faultbuf; 481 int write; 482 u_long count; 483 u_char *data_p = (u_char*)(stio_addr+0x741); 484 485 /* 486 * Block SCSI interrupts while emulating DMA. They come 487 * at a higher priority. 488 */ 489 single_inst_bclr_b(MFP2->mf_imra, IA_SCSI); 490 491 /* 492 * Setup for a possible bus error caused by SCSI controller 493 * switching out of DATA-IN/OUT before we're done with the 494 * current transfer. 495 */ 496 nofault = (int *) &faultbuf; 497 498 if (setjmp((label_t *) nofault)) { 499 u_char *ptr; 500 u_long cnt, tmp; 501 502 PID("drq berr"); 503 nofault = (int *) 0; 504 505 /* 506 * Determine number of bytes transferred 507 */ 508 get_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)ptr); 509 cnt = dma_ptr - ptr; 510 511 if (cnt != 0) { 512 /* 513 * Update the dma pointer/count fields 514 */ 515 set_scsi_dma(SCSI_DMA->s_dma_ptr, dma_ptr); 516 get_scsi_dma(SCSI_DMA->s_dma_cnt, tmp); 517 set_scsi_dma(SCSI_DMA->s_dma_cnt, tmp - cnt); 518 519 if (tmp > cnt) { 520 /* 521 * Still more to transfer 522 */ 523 single_inst_bset_b(MFP2->mf_imra, IA_SCSI); 524 return; 525 } 526 527 /* 528 * Signal EOP to 5380 529 */ 530 SCSI_DMA->s_hdma_ctrl |= SDH_EOP; 531 } 532 else { 533 nofault = (int *) &faultbuf; 534 535 /* 536 * Try to figure out if the byte-count was 537 * zero because there was no (more) data or 538 * because the dma_ptr is bogus. 539 */ 540 if (setjmp((label_t *) nofault)) { 541 /* 542 * Set the bus-error bit 543 */ 544 SCSI_DMA->s_hdma_ctrl |= SDH_BUSERR; 545 } 546 __asm __volatile ("tstb %0@(0)": : "a" (dma_ptr)); 547 nofault = (int *)0; 548 } 549 550 /* 551 * Schedule an interrupt 552 */ 553 if (SCSI_DMA->s_dma_ctrl & SD_ENABLE) 554 add_sicallback((si_farg)ncr_dma_intr, (void *)cur_softc, 0); 555 556 /* 557 * Clear DMA-mode 558 */ 559 SCSI_DMA->s_dma_ctrl &= ~SD_ENABLE; 560 single_inst_bset_b(MFP2->mf_imra, IA_SCSI); 561 562 return; 563 } 564 565 write = (SCSI_DMA->s_dma_ctrl & SD_OUT) ? 1 : 0; 566 #if DBG_PID 567 if (write) { 568 PID("drq (in)"); 569 } else { 570 PID("drq (out)"); 571 } 572 #endif 573 574 get_scsi_dma(SCSI_DMA->s_dma_cnt, count); 575 get_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)dma_ptr); 576 577 /* 578 * Keep pushing bytes until we're done or a bus-error 579 * signals that the SCSI controller is not ready. 580 * NOTE: I tried some optimalizations in these loops, 581 * but they had no effect on transfer speed. 582 */ 583 if (write) { 584 while(count--) { 585 *data_p = *dma_ptr++; 586 } 587 } 588 else { 589 while(count--) { 590 *dma_ptr++ = *data_p; 591 } 592 } 593 594 /* 595 * Schedule an interrupt 596 */ 597 if (SCSI_DMA->s_dma_ctrl & SD_ENABLE) 598 add_sicallback((si_farg)ncr_dma_intr, (void *)cur_softc, 0); 599 600 /* 601 * Clear DMA-mode 602 */ 603 SCSI_DMA->s_dma_ctrl &= ~SD_ENABLE; 604 605 /* 606 * OK. No bus error occurred above. Clear the nofault flag 607 * so we no longer short-circuit bus errors. 608 */ 609 nofault = (int *) 0; 610 611 /* 612 * Update the DMA 'registers' to reflect that all bytes 613 * have been transfered and tell this to the 5380 too. 614 */ 615 set_scsi_dma(SCSI_DMA->s_dma_ptr, (u_long)dma_ptr); 616 set_scsi_dma(SCSI_DMA->s_dma_cnt, 0); 617 SCSI_DMA->s_hdma_ctrl |= SDH_EOP; 618 619 PID("end drq"); 620 single_inst_bset_b(MFP2->mf_imra, IA_SCSI); 621 622 return; 623 } 624 625 #endif /* defined(TT_SCSI) */ 626 627 #if defined(FALCON_SCSI) && !defined(TT_SCSI) 628 629 #define GET_5380_REG(rnum) get_falcon_5380_reg(rnum) 630 #define SET_5380_REG(rnum,val) set_falcon_5380_reg(rnum, val) 631 #define scsi_mach_init(sc) scsi_falcon_init(sc) 632 #define scsi_ienable() scsi_falcon_ienable() 633 #define scsi_idisable() scsi_falcon_idisable() 634 #define scsi_clr_ipend() scsi_falcon_clr_ipend() 635 #define scsi_ipending() scsi_falcon_ipending() 636 #define scsi_dma_setup(r,p,m) scsi_falcon_dmasetup(r, p, m) 637 #define wrong_dma_range(r,d) falcon_wrong_dma_range(r, d) 638 #define poll_edma(reqp) falcon_poll_edma(reqp) 639 #define get_dma_result(r, b) falcon_get_dma_result(r, b) 640 #define can_access_5380() falcon_can_access_5380() 641 #define emulated_dma() 0 642 643 #define fair_to_keep_dma() (!st_dmawanted()) 644 #define claimed_dma() falcon_claimed_dma() 645 #define reconsider_dma() falcon_reconsider_dma() 646 647 #endif /* defined(FALCON_SCSI) && !defined(TT_SCSI) */ 648 649 #if defined(FALCON_SCSI) 650 651 /* 652 * Prototype functions defined below 653 */ 654 static void scsi_falcon_init __P((struct ncr_softc *)); 655 static u_char get_falcon_5380_reg __P((u_short)); 656 static void set_falcon_5380_reg __P((u_short, u_short)); 657 static int falcon_wrong_dma_range __P((SC_REQ *, struct dma_chain *)); 658 static void fal1_dma __P((u_int, u_int, SC_REQ *)); 659 static void scsi_falcon_dmasetup __P((SC_REQ *, u_int, u_char)); 660 static int falcon_poll_edma __P((SC_REQ *)); 661 static int falcon_get_dma_result __P((SC_REQ *, u_long *)); 662 int falcon_can_access_5380 __P((void)); 663 void scsi_falcon_clr_ipend __P((void)); 664 void scsi_falcon_idisable __P((void)); 665 void scsi_falcon_ienable __P((void)); 666 int scsi_falcon_ipending __P((void)); 667 int falcon_claimed_dma __P((void)); 668 void falcon_reconsider_dma __P((void)); 669 670 static void 671 scsi_falcon_init(sc) 672 struct ncr_softc *sc; 673 { 674 /* 675 * Enable disk related interrupts 676 */ 677 MFP->mf_ierb |= IB_DINT; 678 MFP->mf_iprb &= ~IB_DINT; 679 MFP->mf_imrb |= IB_DINT; 680 } 681 682 static u_char 683 get_falcon_5380_reg(rnum) 684 u_short rnum; 685 { 686 DMA->dma_mode = DMA_SCSI + rnum; 687 return(DMA->dma_data); 688 } 689 690 static void 691 set_falcon_5380_reg(rnum, val) 692 u_short rnum, val; 693 { 694 DMA->dma_mode = DMA_SCSI + rnum; 695 DMA->dma_data = val; 696 } 697 698 extern __inline__ void 699 scsi_falcon_ienable() 700 { 701 single_inst_bset_b(MFP->mf_imrb, IB_DINT); 702 } 703 704 extern __inline__ void 705 scsi_falcon_idisable() 706 { 707 single_inst_bclr_b(MFP->mf_imrb, IB_DINT); 708 } 709 710 extern __inline__ void 711 scsi_falcon_clr_ipend() 712 { 713 int tmp; 714 715 tmp = get_falcon_5380_reg(NCR5380_IRCV); 716 rem_sicallback((si_farg)ncr_ctrl_intr); 717 } 718 719 extern __inline__ int 720 scsi_falcon_ipending() 721 { 722 if (connected && (connected->dr_flag & DRIVER_IN_DMA)) { 723 /* 724 * XXX: When DMA is running, we are only allowed to 725 * check the 5380 when DMA _might_ be finished. 726 */ 727 if (MFP->mf_gpip & IO_DINT) 728 return (0); /* XXX: Actually: we're not allowed to check */ 729 730 /* LWP: 28-06, must be a dma interrupt! should the 731 * ST-DMA unit be taken out of dma mode????? 732 */ 733 DMA->dma_mode = 0x90; 734 735 } 736 return(get_falcon_5380_reg(NCR5380_DMSTAT) & SC_IRQ_SET); 737 } 738 739 static int 740 falcon_wrong_dma_range(reqp, dm) 741 SC_REQ *reqp; 742 struct dma_chain *dm; 743 { 744 /* 745 * Do not allow chains yet! See also comment with 746 * falcon_poll_edma() !!! 747 */ 748 if (((dm - reqp->dm_chain) > 0) || (dm->dm_addr & 0xff000000)) { 749 reqp->dr_flag |= DRIVER_BOUNCING; 750 return(1); 751 } 752 /* 753 * Never allow DMA to happen on a Falcon when the transfer 754 * size is no multiple of 512. This is the transfer unit of the 755 * ST DMA-controller. 756 */ 757 if(dm->dm_count & 511) 758 return(1); 759 return(0); 760 } 761 762 static int falcon_lock = 0; 763 764 extern __inline__ int 765 falcon_claimed_dma() 766 { 767 if (falcon_lock != DMA_LOCK_GRANT) { 768 if (falcon_lock == DMA_LOCK_REQ) { 769 /* 770 * DMA access is being claimed. 771 */ 772 return(0); 773 } 774 if (!st_dmagrab((dma_farg)ncr_ctrl_intr, (dma_farg)run_main, 775 cur_softc, &falcon_lock, 1)) 776 return(0); 777 } 778 return(1); 779 } 780 781 extern __inline__ void 782 falcon_reconsider_dma() 783 { 784 if (falcon_lock && (connected == NULL) && (discon_q == NULL)) { 785 /* 786 * No need to keep DMA locked by us as we are not currently 787 * connected and no disconnected jobs are pending. 788 */ 789 rem_sicallback((si_farg)ncr_ctrl_intr); 790 st_dmafree(cur_softc, &falcon_lock); 791 } 792 793 if (!falcon_lock && (issue_q != NULL)) { 794 /* 795 * We must (re)claim DMA access as there are jobs 796 * waiting in the issue queue. 797 */ 798 st_dmagrab((dma_farg)ncr_ctrl_intr, (dma_farg)run_main, 799 cur_softc, &falcon_lock, 0); 800 } 801 } 802 803 static void 804 fal1_dma(dir, nsects, reqp) 805 u_int dir, nsects; 806 SC_REQ *reqp; 807 { 808 dir <<= 8; 809 st_dmaaddr_set((caddr_t)reqp->dm_cur->dm_addr); 810 DMA->dma_mode = 0x90 | dir; 811 DMA->dma_mode = 0x90 | (dir ^ DMA_WRBIT); 812 DMA->dma_mode = 0x90 | dir; 813 DMA->dma_data = nsects; 814 delay(2); /* _really_ needed (Thomas Gerner) */ 815 DMA->dma_mode = 0x10 | dir; 816 } 817 818 static void 819 scsi_falcon_dmasetup(reqp, phase, mode) 820 SC_REQ *reqp; 821 u_int phase; 822 u_char mode; 823 { 824 int nsects = reqp->dm_cur->dm_count / 512; /* XXX */ 825 826 /* 827 * XXX: We should probably clear the fifo before putting the 828 * 5380 into DMA-mode. 829 */ 830 if (PH_IN(phase)) { 831 set_falcon_5380_reg(NCR5380_ICOM, 0); 832 set_falcon_5380_reg(NCR5380_MODE, mode); 833 set_falcon_5380_reg(NCR5380_IRCV, 0); 834 fal1_dma(0, nsects, reqp); 835 } 836 else { 837 set_falcon_5380_reg(NCR5380_MODE, mode); 838 set_falcon_5380_reg(NCR5380_ICOM, SC_ADTB); 839 set_falcon_5380_reg(NCR5380_DMSTAT, 0); 840 fal1_dma(1, nsects, reqp); 841 } 842 } 843 844 static int 845 falcon_poll_edma(reqp) 846 SC_REQ *reqp; 847 { 848 int timeout = 9000; /* XXX */ 849 850 /* 851 * Because of the Falcon hardware, it is impossible to reach 852 * the 5380 while doing DMA-transfers. So we have to rely on 853 * the interrupt line to determine if DMA-has finished. the 854 * DMA-controller itself will never fire an interrupt. This means 855 * that 'broken-up' DMA transfers are not (yet) possible on the 856 * Falcon. 857 */ 858 for (;;) { 859 delay(20); 860 if (--timeout <= 0) { 861 ncr_tprint(reqp, "Timeout on polled transfer\n"); 862 reqp->xs->error = XS_TIMEOUT; 863 return(0); 864 } 865 if (!(MFP->mf_gpip & IO_DINT)) 866 break; 867 } 868 return(1); 869 } 870 871 static int 872 falcon_get_dma_result(reqp, bytes_left) 873 SC_REQ *reqp; 874 u_long *bytes_left; 875 { 876 int rv = 0; 877 int st_dmastat; 878 u_long bytes_done; 879 880 /* 881 * Select sector counter register first (See Atari docu.) 882 */ 883 DMA->dma_mode = 0x90; 884 if (!(st_dmastat = DMA->dma_stat) & 0x01) { 885 /* 886 * Misc. DMA-error according to Atari... 887 */ 888 ncr_tprint(reqp, "Unknow ST-SCSI error near 0x%x\n", 889 st_dmaaddr_get()); 890 reqp->xs->error = XS_DRIVER_STUFFUP; 891 rv = 1; 892 } 893 /* 894 * Because we NEVER start DMA on the Falcon when the data size 895 * is not a multiple of 512 bytes, we can safely round down the 896 * byte count on writes. We need to because in case of a disconnect, 897 * the DMA has already prefetched the next couple of bytes. 898 * On read, these byte counts are an error. They are logged and 899 * should be handled by the mi-part of the driver. 900 * NOTE: We formerly did this by using the 'byte-count-zero' bit 901 * of the DMA controller, but this didn't seem to work??? 902 * [lwp 29/06/96] 903 */ 904 bytes_done = st_dmaaddr_get() - reqp->dm_cur->dm_addr; 905 if (bytes_done & 511) { 906 if (PH_IN(reqp->phase)) { 907 ncr_tprint(reqp, "Byte count on read not a multiple " 908 "of 512 (%ld)\n", bytes_done); 909 } 910 bytes_done &= ~511; 911 } 912 if ((*bytes_left = reqp->dm_cur->dm_count - bytes_done) == 0) 913 rv = 1; 914 return(rv); 915 } 916 917 static int 918 falcon_can_access_5380() 919 { 920 if (connected && (connected->dr_flag & DRIVER_IN_DMA) 921 && (MFP->mf_gpip & IO_DINT)) 922 return(0); 923 return(1); 924 } 925 926 #endif /* defined(FALCON_SCSI) */ 927 928 #if defined(TT_SCSI) && defined(FALCON_SCSI) 929 /* 930 * Define some functions to support _both_ TT and Falcon SCSI 931 */ 932 933 /* 934 * The prototypes first... 935 */ 936 static void scsi_mach_init __P((struct ncr_softc *)); 937 void scsi_ienable __P((void)); 938 void scsi_idisable __P((void)); 939 void scsi_clr_ipend __P((void)); 940 int scsi_ipending __P((void)); 941 void scsi_dma_setup __P((SC_REQ *, u_int, u_char)); 942 int wrong_dma_range __P((SC_REQ *, struct dma_chain *)); 943 int poll_edma __P((SC_REQ *)); 944 int get_dma_result __P((SC_REQ *, u_long *)); 945 int can_access_5380 __P((void)); 946 947 /* 948 * Register access will be done through the following 2 function pointers. 949 */ 950 static u_char (*get_5380_reg) __P((u_short)); 951 static void (*set_5380_reg) __P((u_short, u_short)); 952 953 #define GET_5380_REG (*get_5380_reg) 954 #define SET_5380_REG (*set_5380_reg) 955 956 static void 957 scsi_mach_init(sc) 958 struct ncr_softc *sc; 959 { 960 if (machineid & ATARI_FALCON) { 961 get_5380_reg = get_falcon_5380_reg; 962 set_5380_reg = set_falcon_5380_reg; 963 scsi_falcon_init(sc); 964 } 965 else { 966 get_5380_reg = get_tt_5380_reg; 967 set_5380_reg = set_tt_5380_reg; 968 scsi_tt_init(sc); 969 } 970 } 971 972 extern __inline__ void 973 scsi_ienable() 974 { 975 if (machineid & ATARI_FALCON) 976 scsi_falcon_ienable(); 977 else scsi_tt_ienable(); 978 } 979 980 extern __inline__ void 981 scsi_idisable() 982 { 983 if (machineid & ATARI_FALCON) 984 scsi_falcon_idisable(); 985 else scsi_tt_idisable(); 986 } 987 988 extern __inline__ void 989 scsi_clr_ipend() 990 { 991 if (machineid & ATARI_FALCON) 992 scsi_falcon_clr_ipend(); 993 else scsi_tt_clr_ipend(); 994 } 995 996 extern __inline__ int 997 scsi_ipending() 998 { 999 if (machineid & ATARI_FALCON) 1000 return(scsi_falcon_ipending()); 1001 else return (GET_TT_REG(NCR5380_DMSTAT) & SC_IRQ_SET); 1002 } 1003 1004 extern __inline__ void 1005 scsi_dma_setup(reqp, phase, mbase) 1006 SC_REQ *reqp; 1007 u_int phase; 1008 u_char mbase; 1009 { 1010 if (machineid & ATARI_FALCON) 1011 scsi_falcon_dmasetup(reqp, phase, mbase); 1012 else scsi_tt_dmasetup(reqp, phase, mbase); 1013 } 1014 1015 extern __inline__ int 1016 wrong_dma_range(reqp, dm) 1017 SC_REQ *reqp; 1018 struct dma_chain *dm; 1019 { 1020 if (machineid & ATARI_FALCON) 1021 return(falcon_wrong_dma_range(reqp, dm)); 1022 else return(tt_wrong_dma_range(reqp, dm)); 1023 } 1024 1025 extern __inline__ int 1026 poll_edma(reqp) 1027 SC_REQ *reqp; 1028 { 1029 if (machineid & ATARI_FALCON) 1030 return(falcon_poll_edma(reqp)); 1031 else return(tt_poll_edma(reqp)); 1032 } 1033 1034 extern __inline__ int 1035 get_dma_result(reqp, bytes_left) 1036 SC_REQ *reqp; 1037 u_long *bytes_left; 1038 { 1039 if (machineid & ATARI_FALCON) 1040 return(falcon_get_dma_result(reqp, bytes_left)); 1041 else return(tt_get_dma_result(reqp, bytes_left)); 1042 } 1043 1044 extern __inline__ int 1045 can_access_5380() 1046 { 1047 if (machineid & ATARI_FALCON) 1048 return(falcon_can_access_5380()); 1049 return(1); 1050 } 1051 1052 #define emulated_dma() ((machineid & ATARI_HADES) ? 1 : 0) 1053 1054 /* 1055 * Locking stuff. All turns into NOP's on the TT. 1056 */ 1057 #define fair_to_keep_dma() ((machineid & ATARI_FALCON) ? \ 1058 !st_dmawanted() : 1) 1059 #define claimed_dma() ((machineid & ATARI_FALCON) ? \ 1060 falcon_claimed_dma() : 1) 1061 #define reconsider_dma() { \ 1062 if(machineid & ATARI_FALCON) \ 1063 falcon_reconsider_dma();\ 1064 } 1065 #endif /* defined(TT_SCSI) && defined(FALCON_SCSI) */ 1066 1067 /********************************************** 1068 * Functions present for both TT and Falcon. * 1069 **********************************************/ 1070 /* 1071 * Our autoconfig matching function 1072 */ 1073 static int 1074 machine_match(struct device *pdp, void *match, void *auxp, 1075 struct cfdriver *cd) 1076 { 1077 struct cfdata *cdp = match; 1078 1079 if (strcmp(auxp, cd->cd_name)) 1080 return(0); 1081 if (cdp->cf_unit != 0) /* Only one unit */ 1082 return(0); 1083 return(1); 1084 } 1085 1086 /* 1087 * Bounce buffer (de)allocation. Those buffers are gotten from the ST-mem 1088 * pool. Allocation here is both contiguous and in the lower 16Mb of 1089 * the address space. Thus being DMA-able for all controllers. 1090 */ 1091 static u_char * 1092 alloc_bounceb(u_long len) 1093 { 1094 void *tmp; 1095 1096 return((u_char *)alloc_stmem(len, &tmp)); 1097 } 1098 1099 static void 1100 free_bounceb(u_char *bounceb) 1101 { 1102 free_stmem(bounceb); 1103 } 1104 1105 /* 1106 * 5380 interrupt. 1107 */ 1108 void 1109 scsi_ctrl(int sr) 1110 { 1111 if (GET_5380_REG(NCR5380_DMSTAT) & SC_IRQ_SET) { 1112 scsi_idisable(); 1113 if (!BASEPRI(sr)) 1114 add_sicallback((si_farg)ncr_ctrl_intr, 1115 (void *)cur_softc, 0); 1116 else { 1117 spl1(); 1118 ncr_ctrl_intr(cur_softc); 1119 spl0(); 1120 } 1121 } 1122 } 1123 1124 /* 1125 * DMA controller interrupt 1126 */ 1127 void 1128 scsi_dma(int sr) 1129 { 1130 SC_REQ *reqp; 1131 1132 if ((reqp = connected) && (reqp->dr_flag & DRIVER_IN_DMA)) { 1133 scsi_idisable(); 1134 if (!BASEPRI(sr)) 1135 add_sicallback((si_farg)ncr_dma_intr, 1136 (void *)cur_softc, 0); 1137 else { 1138 spl1(); 1139 ncr_dma_intr(cur_softc); 1140 spl0(); 1141 } 1142 } 1143 } 1144 1145 /* 1146 * Last but not least... Include the general driver code 1147 */ 1148 #include <atari/dev/ncr5380.c> 1149
Indexes created Wed Sep 24 05:09:52 GMT 2025