clock.c revision 1.27.6.6 1 1.27.6.6 nathanw /* $NetBSD: clock.c,v 1.27.6.6 2002/10/18 02:35:50 nathanw Exp $ */
2 1.27.6.2 scw
3 1.27.6.2 scw /*
4 1.27.6.2 scw * Copyright (c) 1988 University of Utah.
5 1.27.6.2 scw * Copyright (c) 1982, 1990 The Regents of the University of California.
6 1.27.6.2 scw * All rights reserved.
7 1.27.6.2 scw *
8 1.27.6.2 scw * This code is derived from software contributed to Berkeley by
9 1.27.6.2 scw * the Systems Programming Group of the University of Utah Computer
10 1.27.6.2 scw * Science Department.
11 1.27.6.2 scw *
12 1.27.6.2 scw * Redistribution and use in source and binary forms, with or without
13 1.27.6.2 scw * modification, are permitted provided that the following conditions
14 1.27.6.2 scw * are met:
15 1.27.6.2 scw * 1. Redistributions of source code must retain the above copyright
16 1.27.6.2 scw * notice, this list of conditions and the following disclaimer.
17 1.27.6.2 scw * 2. Redistributions in binary form must reproduce the above copyright
18 1.27.6.2 scw * notice, this list of conditions and the following disclaimer in the
19 1.27.6.2 scw * documentation and/or other materials provided with the distribution.
20 1.27.6.2 scw * 3. All advertising materials mentioning features or use of this software
21 1.27.6.2 scw * must display the following acknowledgement:
22 1.27.6.2 scw * This product includes software developed by the University of
23 1.27.6.2 scw * California, Berkeley and its contributors.
24 1.27.6.2 scw * 4. Neither the name of the University nor the names of its contributors
25 1.27.6.2 scw * may be used to endorse or promote products derived from this software
26 1.27.6.2 scw * without specific prior written permission.
27 1.27.6.2 scw *
28 1.27.6.2 scw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
29 1.27.6.2 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
30 1.27.6.2 scw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
31 1.27.6.2 scw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
32 1.27.6.2 scw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
33 1.27.6.2 scw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
34 1.27.6.2 scw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
35 1.27.6.2 scw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 1.27.6.2 scw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
37 1.27.6.2 scw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
38 1.27.6.2 scw * SUCH DAMAGE.
39 1.27.6.2 scw *
40 1.27.6.2 scw * from: Utah $Hdr: clock.c 1.18 91/01/21$
41 1.27.6.2 scw *
42 1.27.6.2 scw * @(#)clock.c 7.6 (Berkeley) 5/7/91
43 1.27.6.2 scw */
44 1.27.6.2 scw
45 1.27.6.2 scw #include <sys/param.h>
46 1.27.6.2 scw #include <sys/kernel.h>
47 1.27.6.2 scw #include <sys/systm.h>
48 1.27.6.2 scw #include <sys/device.h>
49 1.27.6.2 scw #include <sys/uio.h>
50 1.27.6.2 scw #include <sys/conf.h>
51 1.27.6.2 scw #include <sys/proc.h>
52 1.27.6.2 scw
53 1.27.6.2 scw #include <dev/clock_subr.h>
54 1.27.6.2 scw
55 1.27.6.2 scw #include <machine/psl.h>
56 1.27.6.2 scw #include <machine/cpu.h>
57 1.27.6.2 scw #include <machine/iomap.h>
58 1.27.6.2 scw #include <machine/mfp.h>
59 1.27.6.2 scw #include <atari/dev/clockreg.h>
60 1.27.6.2 scw #include <atari/atari/device.h>
61 1.27.6.2 scw
62 1.27.6.2 scw #if defined(GPROF) && defined(PROFTIMER)
63 1.27.6.2 scw #include <machine/profile.h>
64 1.27.6.2 scw #endif
65 1.27.6.2 scw
66 1.27.6.2 scw /*
67 1.27.6.2 scw * The MFP clock runs at 2457600Hz. We use a {system,stat,prof}clock divider
68 1.27.6.2 scw * of 200. Therefore the timer runs at an effective rate of:
69 1.27.6.2 scw * 2457600/200 = 12288Hz.
70 1.27.6.2 scw */
71 1.27.6.2 scw #define CLOCK_HZ 12288
72 1.27.6.2 scw
73 1.27.6.2 scw /*
74 1.27.6.2 scw * Machine-dependent clock routines.
75 1.27.6.2 scw *
76 1.27.6.2 scw * Inittodr initializes the time of day hardware which provides
77 1.27.6.2 scw * date functions.
78 1.27.6.2 scw *
79 1.27.6.2 scw * Resettodr restores the time of day hardware after a time change.
80 1.27.6.2 scw */
81 1.27.6.2 scw
82 1.27.6.2 scw struct clock_softc {
83 1.27.6.2 scw struct device sc_dev;
84 1.27.6.2 scw int sc_flags;
85 1.27.6.2 scw };
86 1.27.6.2 scw
87 1.27.6.2 scw /*
88 1.27.6.2 scw * 'sc_flags' state info. Only used by the rtc-device functions.
89 1.27.6.2 scw */
90 1.27.6.2 scw #define RTC_OPEN 1
91 1.27.6.2 scw
92 1.27.6.2 scw dev_type_open(rtcopen);
93 1.27.6.2 scw dev_type_close(rtcclose);
94 1.27.6.2 scw dev_type_read(rtcread);
95 1.27.6.2 scw dev_type_write(rtcwrite);
96 1.27.6.2 scw
97 1.27.6.2 scw static void clockattach __P((struct device *, struct device *, void *));
98 1.27.6.2 scw static int clockmatch __P((struct device *, struct cfdata *, void *));
99 1.27.6.2 scw
100 1.27.6.6 nathanw CFATTACH_DECL(clock, sizeof(struct clock_softc),
101 1.27.6.6 nathanw clockmatch, clockattach, NULL, NULL);
102 1.27.6.2 scw
103 1.27.6.2 scw extern struct cfdriver clock_cd;
104 1.27.6.2 scw
105 1.27.6.5 nathanw const struct cdevsw rtc_cdevsw = {
106 1.27.6.5 nathanw rtcopen, rtcclose, rtcread, rtcwrite, noioctl,
107 1.27.6.5 nathanw nostop, notty, nopoll, nommap,
108 1.27.6.5 nathanw };
109 1.27.6.5 nathanw
110 1.27.6.2 scw void statintr __P((struct clockframe));
111 1.27.6.2 scw
112 1.27.6.2 scw static u_long gettod __P((void));
113 1.27.6.2 scw static int twodigits __P((char *, int));
114 1.27.6.2 scw
115 1.27.6.2 scw static int divisor; /* Systemclock divisor */
116 1.27.6.2 scw
117 1.27.6.2 scw /*
118 1.27.6.2 scw * Statistics and profile clock intervals and variances. Variance must
119 1.27.6.2 scw * be a power of 2. Since this gives us an even number, not an odd number,
120 1.27.6.2 scw * we discard one case and compensate. That is, a variance of 64 would
121 1.27.6.2 scw * give us offsets in [0..63]. Instead, we take offsets in [1..63].
122 1.27.6.2 scw * This is symmetric around the point 32, or statvar/2, and thus averages
123 1.27.6.2 scw * to that value (assuming uniform random numbers).
124 1.27.6.2 scw */
125 1.27.6.2 scw #ifdef STATCLOCK
126 1.27.6.2 scw static int statvar = 32; /* {stat,prof}clock variance */
127 1.27.6.2 scw static int statmin; /* statclock divisor - variance/2 */
128 1.27.6.2 scw static int profmin; /* profclock divisor - variance/2 */
129 1.27.6.2 scw static int clk2min; /* current, from above choices */
130 1.27.6.2 scw #endif
131 1.27.6.2 scw
132 1.27.6.2 scw int
133 1.27.6.2 scw clockmatch(pdp, cfp, auxp)
134 1.27.6.2 scw struct device *pdp;
135 1.27.6.2 scw struct cfdata *cfp;
136 1.27.6.2 scw void *auxp;
137 1.27.6.2 scw {
138 1.27.6.2 scw if (!atari_realconfig) {
139 1.27.6.2 scw /*
140 1.27.6.2 scw * Initialize Timer-B in the ST-MFP. This timer is used by
141 1.27.6.2 scw * the 'delay' function below. This timer is setup to be
142 1.27.6.2 scw * continueously counting from 255 back to zero at a
143 1.27.6.2 scw * frequency of 614400Hz. We do this *early* in the
144 1.27.6.2 scw * initialisation process.
145 1.27.6.2 scw */
146 1.27.6.2 scw MFP->mf_tbcr = 0; /* Stop timer */
147 1.27.6.2 scw MFP->mf_iera &= ~IA_TIMB; /* Disable timer interrupts */
148 1.27.6.2 scw MFP->mf_tbdr = 0;
149 1.27.6.2 scw MFP->mf_tbcr = T_Q004; /* Start timer */
150 1.27.6.2 scw
151 1.27.6.2 scw /*
152 1.27.6.2 scw * Initialize the time structure
153 1.27.6.2 scw */
154 1.27.6.2 scw time.tv_sec = 0;
155 1.27.6.2 scw time.tv_usec = 0;
156 1.27.6.2 scw
157 1.27.6.2 scw return 0;
158 1.27.6.2 scw }
159 1.27.6.2 scw if(!strcmp("clock", auxp))
160 1.27.6.2 scw return(1);
161 1.27.6.2 scw return(0);
162 1.27.6.2 scw }
163 1.27.6.2 scw
164 1.27.6.2 scw /*
165 1.27.6.2 scw * Start the real-time clock.
166 1.27.6.2 scw */
167 1.27.6.2 scw void clockattach(pdp, dp, auxp)
168 1.27.6.2 scw struct device *pdp, *dp;
169 1.27.6.2 scw void *auxp;
170 1.27.6.2 scw {
171 1.27.6.2 scw struct clock_softc *sc = (void *)dp;
172 1.27.6.2 scw
173 1.27.6.2 scw sc->sc_flags = 0;
174 1.27.6.2 scw
175 1.27.6.2 scw /*
176 1.27.6.2 scw * Initialize Timer-A in the ST-MFP. We use a divisor of 200.
177 1.27.6.2 scw * The MFP clock runs at 2457600Hz. Therefore the timer runs
178 1.27.6.2 scw * at an effective rate of: 2457600/200 = 12288Hz. The
179 1.27.6.2 scw * following expression works for 48, 64 or 96 hz.
180 1.27.6.2 scw */
181 1.27.6.2 scw divisor = CLOCK_HZ/hz;
182 1.27.6.2 scw MFP->mf_tacr = 0; /* Stop timer */
183 1.27.6.2 scw MFP->mf_iera &= ~IA_TIMA; /* Disable timer interrupts */
184 1.27.6.2 scw MFP->mf_tadr = divisor; /* Set divisor */
185 1.27.6.2 scw
186 1.27.6.2 scw if (hz != 48 && hz != 64 && hz != 96) { /* XXX */
187 1.27.6.2 scw printf (": illegal value %d for systemclock, reset to %d\n\t",
188 1.27.6.2 scw hz, 64);
189 1.27.6.2 scw hz = 64;
190 1.27.6.2 scw }
191 1.27.6.2 scw printf(": system hz %d timer-A divisor 200/%d\n", hz, divisor);
192 1.27.6.2 scw
193 1.27.6.2 scw #ifdef STATCLOCK
194 1.27.6.2 scw if ((stathz == 0) || (stathz > hz) || (CLOCK_HZ % stathz))
195 1.27.6.2 scw stathz = hz;
196 1.27.6.2 scw if ((profhz == 0) || (profhz > (hz << 1)) || (CLOCK_HZ % profhz))
197 1.27.6.2 scw profhz = hz << 1;
198 1.27.6.2 scw
199 1.27.6.2 scw MFP->mf_tcdcr &= 0x7; /* Stop timer */
200 1.27.6.2 scw MFP->mf_ierb &= ~IB_TIMC; /* Disable timer inter. */
201 1.27.6.2 scw MFP->mf_tcdr = CLOCK_HZ/stathz; /* Set divisor */
202 1.27.6.2 scw
203 1.27.6.2 scw statmin = (CLOCK_HZ/stathz) - (statvar >> 1);
204 1.27.6.2 scw profmin = (CLOCK_HZ/profhz) - (statvar >> 1);
205 1.27.6.2 scw clk2min = statmin;
206 1.27.6.2 scw #endif /* STATCLOCK */
207 1.27.6.2 scw
208 1.27.6.2 scw }
209 1.27.6.2 scw
210 1.27.6.2 scw void cpu_initclocks()
211 1.27.6.2 scw {
212 1.27.6.2 scw MFP->mf_tacr = T_Q200; /* Start timer */
213 1.27.6.2 scw MFP->mf_ipra = (u_int8_t)~IA_TIMA;/* Clear pending interrupts */
214 1.27.6.2 scw MFP->mf_iera |= IA_TIMA; /* Enable timer interrupts */
215 1.27.6.2 scw MFP->mf_imra |= IA_TIMA; /* ..... */
216 1.27.6.2 scw
217 1.27.6.2 scw #ifdef STATCLOCK
218 1.27.6.2 scw MFP->mf_tcdcr = (MFP->mf_tcdcr & 0x7) | (T_Q200<<4); /* Start */
219 1.27.6.2 scw MFP->mf_iprb = (u_int8_t)~IB_TIMC;/* Clear pending interrupts */
220 1.27.6.2 scw MFP->mf_ierb |= IB_TIMC; /* Enable timer interrupts */
221 1.27.6.2 scw MFP->mf_imrb |= IB_TIMC; /* ..... */
222 1.27.6.2 scw #endif /* STATCLOCK */
223 1.27.6.2 scw }
224 1.27.6.2 scw
225 1.27.6.2 scw void
226 1.27.6.2 scw setstatclockrate(newhz)
227 1.27.6.2 scw int newhz;
228 1.27.6.2 scw {
229 1.27.6.2 scw #ifdef STATCLOCK
230 1.27.6.2 scw if (newhz == stathz)
231 1.27.6.2 scw clk2min = statmin;
232 1.27.6.2 scw else clk2min = profmin;
233 1.27.6.2 scw #endif /* STATCLOCK */
234 1.27.6.2 scw }
235 1.27.6.2 scw
236 1.27.6.2 scw #ifdef STATCLOCK
237 1.27.6.2 scw void
238 1.27.6.2 scw statintr(frame)
239 1.27.6.2 scw struct clockframe frame;
240 1.27.6.2 scw {
241 1.27.6.2 scw register int var, r;
242 1.27.6.2 scw
243 1.27.6.2 scw var = statvar - 1;
244 1.27.6.2 scw do {
245 1.27.6.2 scw r = random() & var;
246 1.27.6.2 scw } while(r == 0);
247 1.27.6.2 scw
248 1.27.6.2 scw /*
249 1.27.6.2 scw * Note that we are always lagging behind as the new divisor
250 1.27.6.2 scw * value will not be loaded until the next interrupt. This
251 1.27.6.2 scw * shouldn't disturb the median frequency (I think ;-) ) as
252 1.27.6.2 scw * only the value used when switching frequencies is used
253 1.27.6.2 scw * twice. This shouldn't happen very often.
254 1.27.6.2 scw */
255 1.27.6.2 scw MFP->mf_tcdr = clk2min + r;
256 1.27.6.2 scw
257 1.27.6.2 scw statclock(&frame);
258 1.27.6.2 scw }
259 1.27.6.2 scw #endif /* STATCLOCK */
260 1.27.6.2 scw
261 1.27.6.2 scw /*
262 1.27.6.2 scw * Returns number of usec since last recorded clock "tick"
263 1.27.6.2 scw * (i.e. clock interrupt).
264 1.27.6.2 scw */
265 1.27.6.2 scw long
266 1.27.6.2 scw clkread()
267 1.27.6.2 scw {
268 1.27.6.2 scw u_int delta;
269 1.27.6.2 scw u_char ipra, tadr;
270 1.27.6.2 scw
271 1.27.6.2 scw /*
272 1.27.6.2 scw * Note: Order is important!
273 1.27.6.2 scw * By reading 'ipra' before 'tadr' and caching the data, I try to avoid
274 1.27.6.2 scw * the situation that very low value in 'tadr' is read (== a big delta)
275 1.27.6.2 scw * while also acccounting for a full 'tick' because the counter went
276 1.27.6.2 scw * through zero during the calculations.
277 1.27.6.2 scw */
278 1.27.6.2 scw ipra = MFP->mf_ipra; tadr = MFP->mf_tadr;
279 1.27.6.2 scw
280 1.27.6.2 scw delta = ((divisor - tadr) * tick) / divisor;
281 1.27.6.2 scw /*
282 1.27.6.2 scw * Account for pending clock interrupts
283 1.27.6.2 scw */
284 1.27.6.2 scw if(ipra & IA_TIMA)
285 1.27.6.2 scw return(delta + tick);
286 1.27.6.2 scw return(delta);
287 1.27.6.2 scw }
288 1.27.6.2 scw
289 1.27.6.2 scw #define TIMB_FREQ 614400
290 1.27.6.2 scw #define TIMB_LIMIT 256
291 1.27.6.2 scw
292 1.27.6.2 scw /*
293 1.27.6.2 scw * Wait "n" microseconds.
294 1.27.6.2 scw * Relies on MFP-Timer B counting down from TIMB_LIMIT at TIMB_FREQ Hz.
295 1.27.6.2 scw * Note: timer had better have been programmed before this is first used!
296 1.27.6.2 scw */
297 1.27.6.2 scw void
298 1.27.6.2 scw delay(n)
299 1.27.6.2 scw int n;
300 1.27.6.2 scw {
301 1.27.6.2 scw int tick, otick;
302 1.27.6.2 scw
303 1.27.6.2 scw /*
304 1.27.6.2 scw * Read the counter first, so that the rest of the setup overhead is
305 1.27.6.2 scw * counted.
306 1.27.6.2 scw */
307 1.27.6.2 scw otick = MFP->mf_tbdr;
308 1.27.6.2 scw
309 1.27.6.2 scw /*
310 1.27.6.2 scw * Calculate ((n * TIMER_FREQ) / 1e6) using explicit assembler code so
311 1.27.6.2 scw * we can take advantage of the intermediate 64-bit quantity to prevent
312 1.27.6.2 scw * loss of significance.
313 1.27.6.2 scw */
314 1.27.6.2 scw n -= 5;
315 1.27.6.2 scw if(n < 0)
316 1.27.6.2 scw return;
317 1.27.6.2 scw {
318 1.27.6.2 scw u_int temp;
319 1.27.6.2 scw
320 1.27.6.2 scw __asm __volatile ("mulul %2,%1:%0" : "=d" (n), "=d" (temp)
321 1.27.6.2 scw : "d" (TIMB_FREQ), "d" (n));
322 1.27.6.2 scw __asm __volatile ("divul %1,%2:%0" : "=d" (n)
323 1.27.6.2 scw : "d"(1000000),"d"(temp),"0"(n));
324 1.27.6.2 scw }
325 1.27.6.2 scw
326 1.27.6.2 scw while(n > 0) {
327 1.27.6.2 scw tick = MFP->mf_tbdr;
328 1.27.6.2 scw if(tick > otick)
329 1.27.6.2 scw n -= TIMB_LIMIT - (tick - otick);
330 1.27.6.2 scw else n -= otick - tick;
331 1.27.6.2 scw otick = tick;
332 1.27.6.2 scw }
333 1.27.6.2 scw }
334 1.27.6.2 scw
335 1.27.6.2 scw #ifdef GPROF
336 1.27.6.2 scw /*
337 1.27.6.2 scw * profclock() is expanded in line in lev6intr() unless profiling kernel.
338 1.27.6.2 scw * Assumes it is called with clock interrupts blocked.
339 1.27.6.2 scw */
340 1.27.6.2 scw profclock(pc, ps)
341 1.27.6.2 scw caddr_t pc;
342 1.27.6.2 scw int ps;
343 1.27.6.2 scw {
344 1.27.6.2 scw /*
345 1.27.6.2 scw * Came from user mode.
346 1.27.6.2 scw * If this process is being profiled record the tick.
347 1.27.6.2 scw */
348 1.27.6.2 scw if (USERMODE(ps)) {
349 1.27.6.2 scw if (p->p_stats.p_prof.pr_scale)
350 1.27.6.3 nathanw addupc(pc, &curproc->p_stats.p_prof, 1);
351 1.27.6.2 scw }
352 1.27.6.2 scw /*
353 1.27.6.2 scw * Came from kernel (supervisor) mode.
354 1.27.6.2 scw * If we are profiling the kernel, record the tick.
355 1.27.6.2 scw */
356 1.27.6.2 scw else if (profiling < 2) {
357 1.27.6.2 scw register int s = pc - s_lowpc;
358 1.27.6.2 scw
359 1.27.6.2 scw if (s < s_textsize)
360 1.27.6.2 scw kcount[s / (HISTFRACTION * sizeof (*kcount))]++;
361 1.27.6.2 scw }
362 1.27.6.2 scw /*
363 1.27.6.2 scw * Kernel profiling was on but has been disabled.
364 1.27.6.2 scw * Mark as no longer profiling kernel and if all profiling done,
365 1.27.6.2 scw * disable the clock.
366 1.27.6.2 scw */
367 1.27.6.2 scw if (profiling && (profon & PRF_KERNEL)) {
368 1.27.6.2 scw profon &= ~PRF_KERNEL;
369 1.27.6.2 scw if (profon == PRF_NONE)
370 1.27.6.2 scw stopprofclock();
371 1.27.6.2 scw }
372 1.27.6.2 scw }
373 1.27.6.2 scw #endif
374 1.27.6.2 scw
375 1.27.6.2 scw /***********************************************************************
376 1.27.6.2 scw * Real Time Clock support *
377 1.27.6.2 scw ***********************************************************************/
378 1.27.6.2 scw
379 1.27.6.2 scw u_int mc146818_read(rtc, regno)
380 1.27.6.2 scw void *rtc;
381 1.27.6.2 scw u_int regno;
382 1.27.6.2 scw {
383 1.27.6.2 scw ((struct rtc *)rtc)->rtc_regno = regno;
384 1.27.6.2 scw return(((struct rtc *)rtc)->rtc_data & 0377);
385 1.27.6.2 scw }
386 1.27.6.2 scw
387 1.27.6.2 scw void mc146818_write(rtc, regno, value)
388 1.27.6.2 scw void *rtc;
389 1.27.6.2 scw u_int regno, value;
390 1.27.6.2 scw {
391 1.27.6.2 scw ((struct rtc *)rtc)->rtc_regno = regno;
392 1.27.6.2 scw ((struct rtc *)rtc)->rtc_data = value;
393 1.27.6.2 scw }
394 1.27.6.2 scw
395 1.27.6.2 scw /*
396 1.27.6.2 scw * Initialize the time of day register, assuming the RTC runs in UTC.
397 1.27.6.2 scw * Since we've got the 'rtc' device, this functionality should be removed
398 1.27.6.2 scw * from the kernel. The only problem to be solved before that can happen
399 1.27.6.2 scw * is the possibility of init(1) providing a way (rc.boot?) to set
400 1.27.6.2 scw * the RTC before single-user mode is entered.
401 1.27.6.2 scw */
402 1.27.6.2 scw void
403 1.27.6.2 scw inittodr(base)
404 1.27.6.2 scw time_t base;
405 1.27.6.2 scw {
406 1.27.6.2 scw /* Battery clock does not store usec's, so forget about it. */
407 1.27.6.2 scw time.tv_sec = gettod();
408 1.27.6.2 scw time.tv_usec = 0;
409 1.27.6.2 scw }
410 1.27.6.2 scw
411 1.27.6.2 scw /*
412 1.27.6.2 scw * Function turned into a No-op. Use /dev/rtc to update the RTC.
413 1.27.6.2 scw */
414 1.27.6.2 scw void
415 1.27.6.2 scw resettodr()
416 1.27.6.2 scw {
417 1.27.6.2 scw return;
418 1.27.6.2 scw }
419 1.27.6.2 scw
420 1.27.6.2 scw static u_long
421 1.27.6.2 scw gettod()
422 1.27.6.2 scw {
423 1.27.6.2 scw int sps;
424 1.27.6.2 scw mc_todregs clkregs;
425 1.27.6.2 scw u_int regb;
426 1.27.6.2 scw struct clock_ymdhms dt;
427 1.27.6.2 scw
428 1.27.6.2 scw sps = splhigh();
429 1.27.6.2 scw regb = mc146818_read(RTC, MC_REGB);
430 1.27.6.2 scw MC146818_GETTOD(RTC, &clkregs);
431 1.27.6.2 scw splx(sps);
432 1.27.6.2 scw
433 1.27.6.2 scw regb &= MC_REGB_24HR|MC_REGB_BINARY;
434 1.27.6.2 scw if (regb != (MC_REGB_24HR|MC_REGB_BINARY)) {
435 1.27.6.2 scw printf("Error: Nonstandard RealTimeClock Configuration -"
436 1.27.6.2 scw " value ignored\n"
437 1.27.6.2 scw " A write to /dev/rtc will correct this.\n");
438 1.27.6.2 scw return(0);
439 1.27.6.2 scw }
440 1.27.6.2 scw if(clkregs[MC_SEC] > 59)
441 1.27.6.2 scw return(0);
442 1.27.6.2 scw if(clkregs[MC_MIN] > 59)
443 1.27.6.2 scw return(0);
444 1.27.6.2 scw if(clkregs[MC_HOUR] > 23)
445 1.27.6.2 scw return(0);
446 1.27.6.2 scw if(range_test(clkregs[MC_DOM], 1, 31))
447 1.27.6.2 scw return(0);
448 1.27.6.2 scw if (range_test(clkregs[MC_MONTH], 1, 12))
449 1.27.6.2 scw return(0);
450 1.27.6.2 scw if(clkregs[MC_YEAR] > 99)
451 1.27.6.2 scw return(0);
452 1.27.6.2 scw
453 1.27.6.2 scw dt.dt_year = clkregs[MC_YEAR] + GEMSTARTOFTIME;
454 1.27.6.2 scw dt.dt_mon = clkregs[MC_MONTH];
455 1.27.6.2 scw dt.dt_day = clkregs[MC_DOM];
456 1.27.6.2 scw dt.dt_hour = clkregs[MC_HOUR];
457 1.27.6.2 scw dt.dt_min = clkregs[MC_MIN];
458 1.27.6.2 scw dt.dt_sec = clkregs[MC_SEC];
459 1.27.6.2 scw
460 1.27.6.2 scw return(clock_ymdhms_to_secs(&dt));
461 1.27.6.2 scw }
462 1.27.6.2 scw /***********************************************************************
463 1.27.6.2 scw * RTC-device support *
464 1.27.6.2 scw ***********************************************************************/
465 1.27.6.2 scw int
466 1.27.6.2 scw rtcopen(dev, flag, mode, p)
467 1.27.6.2 scw dev_t dev;
468 1.27.6.2 scw int flag, mode;
469 1.27.6.2 scw struct proc *p;
470 1.27.6.2 scw {
471 1.27.6.2 scw int unit = minor(dev);
472 1.27.6.2 scw struct clock_softc *sc;
473 1.27.6.2 scw
474 1.27.6.2 scw if (unit >= clock_cd.cd_ndevs)
475 1.27.6.2 scw return ENXIO;
476 1.27.6.2 scw sc = clock_cd.cd_devs[unit];
477 1.27.6.2 scw if (!sc)
478 1.27.6.2 scw return ENXIO;
479 1.27.6.2 scw if (sc->sc_flags & RTC_OPEN)
480 1.27.6.2 scw return EBUSY;
481 1.27.6.2 scw
482 1.27.6.2 scw sc->sc_flags = RTC_OPEN;
483 1.27.6.2 scw return 0;
484 1.27.6.2 scw }
485 1.27.6.2 scw
486 1.27.6.2 scw int
487 1.27.6.2 scw rtcclose(dev, flag, mode, p)
488 1.27.6.2 scw dev_t dev;
489 1.27.6.2 scw int flag;
490 1.27.6.2 scw int mode;
491 1.27.6.2 scw struct proc *p;
492 1.27.6.2 scw {
493 1.27.6.2 scw int unit = minor(dev);
494 1.27.6.2 scw struct clock_softc *sc = clock_cd.cd_devs[unit];
495 1.27.6.2 scw
496 1.27.6.2 scw sc->sc_flags = 0;
497 1.27.6.2 scw return 0;
498 1.27.6.2 scw }
499 1.27.6.2 scw
500 1.27.6.2 scw int
501 1.27.6.2 scw rtcread(dev, uio, flags)
502 1.27.6.2 scw dev_t dev;
503 1.27.6.2 scw struct uio *uio;
504 1.27.6.2 scw int flags;
505 1.27.6.2 scw {
506 1.27.6.2 scw struct clock_softc *sc;
507 1.27.6.2 scw mc_todregs clkregs;
508 1.27.6.2 scw int s, length;
509 1.27.6.2 scw char buffer[16];
510 1.27.6.2 scw
511 1.27.6.2 scw sc = clock_cd.cd_devs[minor(dev)];
512 1.27.6.2 scw
513 1.27.6.2 scw s = splhigh();
514 1.27.6.2 scw MC146818_GETTOD(RTC, &clkregs);
515 1.27.6.2 scw splx(s);
516 1.27.6.2 scw
517 1.27.6.2 scw sprintf(buffer, "%4d%02d%02d%02d%02d.%02d\n",
518 1.27.6.2 scw clkregs[MC_YEAR] + GEMSTARTOFTIME,
519 1.27.6.2 scw clkregs[MC_MONTH], clkregs[MC_DOM],
520 1.27.6.2 scw clkregs[MC_HOUR], clkregs[MC_MIN], clkregs[MC_SEC]);
521 1.27.6.2 scw
522 1.27.6.2 scw if (uio->uio_offset > strlen(buffer))
523 1.27.6.2 scw return 0;
524 1.27.6.2 scw
525 1.27.6.2 scw length = strlen(buffer) - uio->uio_offset;
526 1.27.6.2 scw if (length > uio->uio_resid)
527 1.27.6.2 scw length = uio->uio_resid;
528 1.27.6.2 scw
529 1.27.6.2 scw return(uiomove((caddr_t)buffer, length, uio));
530 1.27.6.2 scw }
531 1.27.6.2 scw
532 1.27.6.2 scw static int
533 1.27.6.2 scw twodigits(buffer, pos)
534 1.27.6.2 scw char *buffer;
535 1.27.6.2 scw int pos;
536 1.27.6.2 scw {
537 1.27.6.2 scw int result = 0;
538 1.27.6.2 scw
539 1.27.6.2 scw if (buffer[pos] >= '0' && buffer[pos] <= '9')
540 1.27.6.2 scw result = (buffer[pos] - '0') * 10;
541 1.27.6.2 scw if (buffer[pos+1] >= '0' && buffer[pos+1] <= '9')
542 1.27.6.2 scw result += (buffer[pos+1] - '0');
543 1.27.6.2 scw return(result);
544 1.27.6.2 scw }
545 1.27.6.2 scw
546 1.27.6.2 scw int
547 1.27.6.2 scw rtcwrite(dev, uio, flags)
548 1.27.6.2 scw dev_t dev;
549 1.27.6.2 scw struct uio *uio;
550 1.27.6.2 scw int flags;
551 1.27.6.2 scw {
552 1.27.6.2 scw mc_todregs clkregs;
553 1.27.6.2 scw int s, length, error;
554 1.27.6.2 scw char buffer[16];
555 1.27.6.2 scw
556 1.27.6.2 scw /*
557 1.27.6.2 scw * We require atomic updates!
558 1.27.6.2 scw */
559 1.27.6.2 scw length = uio->uio_resid;
560 1.27.6.2 scw if (uio->uio_offset || (length != sizeof(buffer)
561 1.27.6.2 scw && length != sizeof(buffer - 1)))
562 1.27.6.2 scw return(EINVAL);
563 1.27.6.2 scw
564 1.27.6.2 scw if ((error = uiomove((caddr_t)buffer, sizeof(buffer), uio)))
565 1.27.6.2 scw return(error);
566 1.27.6.2 scw
567 1.27.6.2 scw if (length == sizeof(buffer) && buffer[sizeof(buffer) - 1] != '\n')
568 1.27.6.2 scw return(EINVAL);
569 1.27.6.2 scw
570 1.27.6.2 scw s = splclock();
571 1.27.6.2 scw mc146818_write(RTC, MC_REGB,
572 1.27.6.2 scw mc146818_read(RTC, MC_REGB) | MC_REGB_24HR | MC_REGB_BINARY);
573 1.27.6.2 scw MC146818_GETTOD(RTC, &clkregs);
574 1.27.6.2 scw splx(s);
575 1.27.6.2 scw
576 1.27.6.2 scw clkregs[MC_SEC] = twodigits(buffer, 13);
577 1.27.6.2 scw clkregs[MC_MIN] = twodigits(buffer, 10);
578 1.27.6.2 scw clkregs[MC_HOUR] = twodigits(buffer, 8);
579 1.27.6.2 scw clkregs[MC_DOM] = twodigits(buffer, 6);
580 1.27.6.2 scw clkregs[MC_MONTH] = twodigits(buffer, 4);
581 1.27.6.2 scw s = twodigits(buffer, 0) * 100 + twodigits(buffer, 2);
582 1.27.6.2 scw clkregs[MC_YEAR] = s - GEMSTARTOFTIME;
583 1.27.6.2 scw
584 1.27.6.2 scw s = splclock();
585 1.27.6.2 scw MC146818_PUTTOD(RTC, &clkregs);
586 1.27.6.2 scw splx(s);
587 1.27.6.2 scw
588 1.27.6.2 scw return(0);
589 1.27.6.2 scw }
590