clock.c revision 1.27.6.7
1 /* $NetBSD: clock.c,v 1.27.6.7 2002/11/11 21:57:14 nathanw Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: Utah $Hdr: clock.c 1.18 91/01/21$ 41 * 42 * @(#)clock.c 7.6 (Berkeley) 5/7/91 43 */ 44 45 #include <sys/param.h> 46 #include <sys/kernel.h> 47 #include <sys/systm.h> 48 #include <sys/device.h> 49 #include <sys/uio.h> 50 #include <sys/conf.h> 51 #include <sys/proc.h> 52 #include <sys/event.h> 53 54 #include <dev/clock_subr.h> 55 56 #include <machine/psl.h> 57 #include <machine/cpu.h> 58 #include <machine/iomap.h> 59 #include <machine/mfp.h> 60 #include <atari/dev/clockreg.h> 61 #include <atari/atari/device.h> 62 63 #if defined(GPROF) && defined(PROFTIMER) 64 #include <machine/profile.h> 65 #endif 66 67 /* 68 * The MFP clock runs at 2457600Hz. We use a {system,stat,prof}clock divider 69 * of 200. Therefore the timer runs at an effective rate of: 70 * 2457600/200 = 12288Hz. 71 */ 72 #define CLOCK_HZ 12288 73 74 /* 75 * Machine-dependent clock routines. 76 * 77 * Inittodr initializes the time of day hardware which provides 78 * date functions. 79 * 80 * Resettodr restores the time of day hardware after a time change. 81 */ 82 83 struct clock_softc { 84 struct device sc_dev; 85 int sc_flags; 86 }; 87 88 /* 89 * 'sc_flags' state info. Only used by the rtc-device functions. 90 */ 91 #define RTC_OPEN 1 92 93 dev_type_open(rtcopen); 94 dev_type_close(rtcclose); 95 dev_type_read(rtcread); 96 dev_type_write(rtcwrite); 97 98 static void clockattach __P((struct device *, struct device *, void *)); 99 static int clockmatch __P((struct device *, struct cfdata *, void *)); 100 101 CFATTACH_DECL(clock, sizeof(struct clock_softc), 102 clockmatch, clockattach, NULL, NULL); 103 104 extern struct cfdriver clock_cd; 105 106 const struct cdevsw rtc_cdevsw = { 107 rtcopen, rtcclose, rtcread, rtcwrite, noioctl, 108 nostop, notty, nopoll, nommap, nokqfilter, 109 }; 110 111 void statintr __P((struct clockframe)); 112 113 static u_long gettod __P((void)); 114 static int twodigits __P((char *, int)); 115 116 static int divisor; /* Systemclock divisor */ 117 118 /* 119 * Statistics and profile clock intervals and variances. Variance must 120 * be a power of 2. Since this gives us an even number, not an odd number, 121 * we discard one case and compensate. That is, a variance of 64 would 122 * give us offsets in [0..63]. Instead, we take offsets in [1..63]. 123 * This is symmetric around the point 32, or statvar/2, and thus averages 124 * to that value (assuming uniform random numbers). 125 */ 126 #ifdef STATCLOCK 127 static int statvar = 32; /* {stat,prof}clock variance */ 128 static int statmin; /* statclock divisor - variance/2 */ 129 static int profmin; /* profclock divisor - variance/2 */ 130 static int clk2min; /* current, from above choices */ 131 #endif 132 133 int 134 clockmatch(pdp, cfp, auxp) 135 struct device *pdp; 136 struct cfdata *cfp; 137 void *auxp; 138 { 139 if (!atari_realconfig) { 140 /* 141 * Initialize Timer-B in the ST-MFP. This timer is used by 142 * the 'delay' function below. This timer is setup to be 143 * continueously counting from 255 back to zero at a 144 * frequency of 614400Hz. We do this *early* in the 145 * initialisation process. 146 */ 147 MFP->mf_tbcr = 0; /* Stop timer */ 148 MFP->mf_iera &= ~IA_TIMB; /* Disable timer interrupts */ 149 MFP->mf_tbdr = 0; 150 MFP->mf_tbcr = T_Q004; /* Start timer */ 151 152 /* 153 * Initialize the time structure 154 */ 155 time.tv_sec = 0; 156 time.tv_usec = 0; 157 158 return 0; 159 } 160 if(!strcmp("clock", auxp)) 161 return(1); 162 return(0); 163 } 164 165 /* 166 * Start the real-time clock. 167 */ 168 void clockattach(pdp, dp, auxp) 169 struct device *pdp, *dp; 170 void *auxp; 171 { 172 struct clock_softc *sc = (void *)dp; 173 174 sc->sc_flags = 0; 175 176 /* 177 * Initialize Timer-A in the ST-MFP. We use a divisor of 200. 178 * The MFP clock runs at 2457600Hz. Therefore the timer runs 179 * at an effective rate of: 2457600/200 = 12288Hz. The 180 * following expression works for 48, 64 or 96 hz. 181 */ 182 divisor = CLOCK_HZ/hz; 183 MFP->mf_tacr = 0; /* Stop timer */ 184 MFP->mf_iera &= ~IA_TIMA; /* Disable timer interrupts */ 185 MFP->mf_tadr = divisor; /* Set divisor */ 186 187 if (hz != 48 && hz != 64 && hz != 96) { /* XXX */ 188 printf (": illegal value %d for systemclock, reset to %d\n\t", 189 hz, 64); 190 hz = 64; 191 } 192 printf(": system hz %d timer-A divisor 200/%d\n", hz, divisor); 193 194 #ifdef STATCLOCK 195 if ((stathz == 0) || (stathz > hz) || (CLOCK_HZ % stathz)) 196 stathz = hz; 197 if ((profhz == 0) || (profhz > (hz << 1)) || (CLOCK_HZ % profhz)) 198 profhz = hz << 1; 199 200 MFP->mf_tcdcr &= 0x7; /* Stop timer */ 201 MFP->mf_ierb &= ~IB_TIMC; /* Disable timer inter. */ 202 MFP->mf_tcdr = CLOCK_HZ/stathz; /* Set divisor */ 203 204 statmin = (CLOCK_HZ/stathz) - (statvar >> 1); 205 profmin = (CLOCK_HZ/profhz) - (statvar >> 1); 206 clk2min = statmin; 207 #endif /* STATCLOCK */ 208 209 } 210 211 void cpu_initclocks() 212 { 213 MFP->mf_tacr = T_Q200; /* Start timer */ 214 MFP->mf_ipra = (u_int8_t)~IA_TIMA;/* Clear pending interrupts */ 215 MFP->mf_iera |= IA_TIMA; /* Enable timer interrupts */ 216 MFP->mf_imra |= IA_TIMA; /* ..... */ 217 218 #ifdef STATCLOCK 219 MFP->mf_tcdcr = (MFP->mf_tcdcr & 0x7) | (T_Q200<<4); /* Start */ 220 MFP->mf_iprb = (u_int8_t)~IB_TIMC;/* Clear pending interrupts */ 221 MFP->mf_ierb |= IB_TIMC; /* Enable timer interrupts */ 222 MFP->mf_imrb |= IB_TIMC; /* ..... */ 223 #endif /* STATCLOCK */ 224 } 225 226 void 227 setstatclockrate(newhz) 228 int newhz; 229 { 230 #ifdef STATCLOCK 231 if (newhz == stathz) 232 clk2min = statmin; 233 else clk2min = profmin; 234 #endif /* STATCLOCK */ 235 } 236 237 #ifdef STATCLOCK 238 void 239 statintr(frame) 240 struct clockframe frame; 241 { 242 register int var, r; 243 244 var = statvar - 1; 245 do { 246 r = random() & var; 247 } while(r == 0); 248 249 /* 250 * Note that we are always lagging behind as the new divisor 251 * value will not be loaded until the next interrupt. This 252 * shouldn't disturb the median frequency (I think ;-) ) as 253 * only the value used when switching frequencies is used 254 * twice. This shouldn't happen very often. 255 */ 256 MFP->mf_tcdr = clk2min + r; 257 258 statclock(&frame); 259 } 260 #endif /* STATCLOCK */ 261 262 /* 263 * Returns number of usec since last recorded clock "tick" 264 * (i.e. clock interrupt). 265 */ 266 long 267 clkread() 268 { 269 u_int delta; 270 u_char ipra, tadr; 271 272 /* 273 * Note: Order is important! 274 * By reading 'ipra' before 'tadr' and caching the data, I try to avoid 275 * the situation that very low value in 'tadr' is read (== a big delta) 276 * while also acccounting for a full 'tick' because the counter went 277 * through zero during the calculations. 278 */ 279 ipra = MFP->mf_ipra; tadr = MFP->mf_tadr; 280 281 delta = ((divisor - tadr) * tick) / divisor; 282 /* 283 * Account for pending clock interrupts 284 */ 285 if(ipra & IA_TIMA) 286 return(delta + tick); 287 return(delta); 288 } 289 290 #define TIMB_FREQ 614400 291 #define TIMB_LIMIT 256 292 293 /* 294 * Wait "n" microseconds. 295 * Relies on MFP-Timer B counting down from TIMB_LIMIT at TIMB_FREQ Hz. 296 * Note: timer had better have been programmed before this is first used! 297 */ 298 void 299 delay(n) 300 int n; 301 { 302 int tick, otick; 303 304 /* 305 * Read the counter first, so that the rest of the setup overhead is 306 * counted. 307 */ 308 otick = MFP->mf_tbdr; 309 310 /* 311 * Calculate ((n * TIMER_FREQ) / 1e6) using explicit assembler code so 312 * we can take advantage of the intermediate 64-bit quantity to prevent 313 * loss of significance. 314 */ 315 n -= 5; 316 if(n < 0) 317 return; 318 { 319 u_int temp; 320 321 __asm __volatile ("mulul %2,%1:%0" : "=d" (n), "=d" (temp) 322 : "d" (TIMB_FREQ), "d" (n)); 323 __asm __volatile ("divul %1,%2:%0" : "=d" (n) 324 : "d"(1000000),"d"(temp),"0"(n)); 325 } 326 327 while(n > 0) { 328 tick = MFP->mf_tbdr; 329 if(tick > otick) 330 n -= TIMB_LIMIT - (tick - otick); 331 else n -= otick - tick; 332 otick = tick; 333 } 334 } 335 336 #ifdef GPROF 337 /* 338 * profclock() is expanded in line in lev6intr() unless profiling kernel. 339 * Assumes it is called with clock interrupts blocked. 340 */ 341 profclock(pc, ps) 342 caddr_t pc; 343 int ps; 344 { 345 /* 346 * Came from user mode. 347 * If this process is being profiled record the tick. 348 */ 349 if (USERMODE(ps)) { 350 if (p->p_stats.p_prof.pr_scale) 351 addupc(pc, &curproc->p_stats.p_prof, 1); 352 } 353 /* 354 * Came from kernel (supervisor) mode. 355 * If we are profiling the kernel, record the tick. 356 */ 357 else if (profiling < 2) { 358 register int s = pc - s_lowpc; 359 360 if (s < s_textsize) 361 kcount[s / (HISTFRACTION * sizeof (*kcount))]++; 362 } 363 /* 364 * Kernel profiling was on but has been disabled. 365 * Mark as no longer profiling kernel and if all profiling done, 366 * disable the clock. 367 */ 368 if (profiling && (profon & PRF_KERNEL)) { 369 profon &= ~PRF_KERNEL; 370 if (profon == PRF_NONE) 371 stopprofclock(); 372 } 373 } 374 #endif 375 376 /*********************************************************************** 377 * Real Time Clock support * 378 ***********************************************************************/ 379 380 u_int mc146818_read(rtc, regno) 381 void *rtc; 382 u_int regno; 383 { 384 ((struct rtc *)rtc)->rtc_regno = regno; 385 return(((struct rtc *)rtc)->rtc_data & 0377); 386 } 387 388 void mc146818_write(rtc, regno, value) 389 void *rtc; 390 u_int regno, value; 391 { 392 ((struct rtc *)rtc)->rtc_regno = regno; 393 ((struct rtc *)rtc)->rtc_data = value; 394 } 395 396 /* 397 * Initialize the time of day register, assuming the RTC runs in UTC. 398 * Since we've got the 'rtc' device, this functionality should be removed 399 * from the kernel. The only problem to be solved before that can happen 400 * is the possibility of init(1) providing a way (rc.boot?) to set 401 * the RTC before single-user mode is entered. 402 */ 403 void 404 inittodr(base) 405 time_t base; 406 { 407 /* Battery clock does not store usec's, so forget about it. */ 408 time.tv_sec = gettod(); 409 time.tv_usec = 0; 410 } 411 412 /* 413 * Function turned into a No-op. Use /dev/rtc to update the RTC. 414 */ 415 void 416 resettodr() 417 { 418 return; 419 } 420 421 static u_long 422 gettod() 423 { 424 int sps; 425 mc_todregs clkregs; 426 u_int regb; 427 struct clock_ymdhms dt; 428 429 sps = splhigh(); 430 regb = mc146818_read(RTC, MC_REGB); 431 MC146818_GETTOD(RTC, &clkregs); 432 splx(sps); 433 434 regb &= MC_REGB_24HR|MC_REGB_BINARY; 435 if (regb != (MC_REGB_24HR|MC_REGB_BINARY)) { 436 printf("Error: Nonstandard RealTimeClock Configuration -" 437 " value ignored\n" 438 " A write to /dev/rtc will correct this.\n"); 439 return(0); 440 } 441 if(clkregs[MC_SEC] > 59) 442 return(0); 443 if(clkregs[MC_MIN] > 59) 444 return(0); 445 if(clkregs[MC_HOUR] > 23) 446 return(0); 447 if(range_test(clkregs[MC_DOM], 1, 31)) 448 return(0); 449 if (range_test(clkregs[MC_MONTH], 1, 12)) 450 return(0); 451 if(clkregs[MC_YEAR] > 99) 452 return(0); 453 454 dt.dt_year = clkregs[MC_YEAR] + GEMSTARTOFTIME; 455 dt.dt_mon = clkregs[MC_MONTH]; 456 dt.dt_day = clkregs[MC_DOM]; 457 dt.dt_hour = clkregs[MC_HOUR]; 458 dt.dt_min = clkregs[MC_MIN]; 459 dt.dt_sec = clkregs[MC_SEC]; 460 461 return(clock_ymdhms_to_secs(&dt)); 462 } 463 /*********************************************************************** 464 * RTC-device support * 465 ***********************************************************************/ 466 int 467 rtcopen(dev, flag, mode, p) 468 dev_t dev; 469 int flag, mode; 470 struct proc *p; 471 { 472 int unit = minor(dev); 473 struct clock_softc *sc; 474 475 if (unit >= clock_cd.cd_ndevs) 476 return ENXIO; 477 sc = clock_cd.cd_devs[unit]; 478 if (!sc) 479 return ENXIO; 480 if (sc->sc_flags & RTC_OPEN) 481 return EBUSY; 482 483 sc->sc_flags = RTC_OPEN; 484 return 0; 485 } 486 487 int 488 rtcclose(dev, flag, mode, p) 489 dev_t dev; 490 int flag; 491 int mode; 492 struct proc *p; 493 { 494 int unit = minor(dev); 495 struct clock_softc *sc = clock_cd.cd_devs[unit]; 496 497 sc->sc_flags = 0; 498 return 0; 499 } 500 501 int 502 rtcread(dev, uio, flags) 503 dev_t dev; 504 struct uio *uio; 505 int flags; 506 { 507 struct clock_softc *sc; 508 mc_todregs clkregs; 509 int s, length; 510 char buffer[16]; 511 512 sc = clock_cd.cd_devs[minor(dev)]; 513 514 s = splhigh(); 515 MC146818_GETTOD(RTC, &clkregs); 516 splx(s); 517 518 sprintf(buffer, "%4d%02d%02d%02d%02d.%02d\n", 519 clkregs[MC_YEAR] + GEMSTARTOFTIME, 520 clkregs[MC_MONTH], clkregs[MC_DOM], 521 clkregs[MC_HOUR], clkregs[MC_MIN], clkregs[MC_SEC]); 522 523 if (uio->uio_offset > strlen(buffer)) 524 return 0; 525 526 length = strlen(buffer) - uio->uio_offset; 527 if (length > uio->uio_resid) 528 length = uio->uio_resid; 529 530 return(uiomove((caddr_t)buffer, length, uio)); 531 } 532 533 static int 534 twodigits(buffer, pos) 535 char *buffer; 536 int pos; 537 { 538 int result = 0; 539 540 if (buffer[pos] >= '0' && buffer[pos] <= '9') 541 result = (buffer[pos] - '0') * 10; 542 if (buffer[pos+1] >= '0' && buffer[pos+1] <= '9') 543 result += (buffer[pos+1] - '0'); 544 return(result); 545 } 546 547 int 548 rtcwrite(dev, uio, flags) 549 dev_t dev; 550 struct uio *uio; 551 int flags; 552 { 553 mc_todregs clkregs; 554 int s, length, error; 555 char buffer[16]; 556 557 /* 558 * We require atomic updates! 559 */ 560 length = uio->uio_resid; 561 if (uio->uio_offset || (length != sizeof(buffer) 562 && length != sizeof(buffer - 1))) 563 return(EINVAL); 564 565 if ((error = uiomove((caddr_t)buffer, sizeof(buffer), uio))) 566 return(error); 567 568 if (length == sizeof(buffer) && buffer[sizeof(buffer) - 1] != '\n') 569 return(EINVAL); 570 571 s = splclock(); 572 mc146818_write(RTC, MC_REGB, 573 mc146818_read(RTC, MC_REGB) | MC_REGB_24HR | MC_REGB_BINARY); 574 MC146818_GETTOD(RTC, &clkregs); 575 splx(s); 576 577 clkregs[MC_SEC] = twodigits(buffer, 13); 578 clkregs[MC_MIN] = twodigits(buffer, 10); 579 clkregs[MC_HOUR] = twodigits(buffer, 8); 580 clkregs[MC_DOM] = twodigits(buffer, 6); 581 clkregs[MC_MONTH] = twodigits(buffer, 4); 582 s = twodigits(buffer, 0) * 100 + twodigits(buffer, 2); 583 clkregs[MC_YEAR] = s - GEMSTARTOFTIME; 584 585 s = splclock(); 586 MC146818_PUTTOD(RTC, &clkregs); 587 splx(s); 588 589 return(0); 590 } 591
Indexes created Tue Sep 30 17:09:57 GMT 2025