clock.c revision 1.33
1 /* $NetBSD: clock.c,v 1.33 2003/07/15 01:19:48 lukem Exp $ */ 2 3 /* 4 * Copyright (c) 1988 University of Utah. 5 * Copyright (c) 1982, 1990 The Regents of the University of California. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * the Systems Programming Group of the University of Utah Computer 10 * Science Department. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. All advertising materials mentioning features or use of this software 21 * must display the following acknowledgement: 22 * This product includes software developed by the University of 23 * California, Berkeley and its contributors. 24 * 4. Neither the name of the University nor the names of its contributors 25 * may be used to endorse or promote products derived from this software 26 * without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 29 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 30 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 31 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 32 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 33 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 34 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 35 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 37 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 38 * SUCH DAMAGE. 39 * 40 * from: Utah $Hdr: clock.c 1.18 91/01/21$ 41 * 42 * @(#)clock.c 7.6 (Berkeley) 5/7/91 43 */ 44 45 #include <sys/cdefs.h> 46 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.33 2003/07/15 01:19:48 lukem Exp $"); 47 48 #include <sys/param.h> 49 #include <sys/kernel.h> 50 #include <sys/systm.h> 51 #include <sys/device.h> 52 #include <sys/uio.h> 53 #include <sys/conf.h> 54 #include <sys/proc.h> 55 #include <sys/event.h> 56 57 #include <dev/clock_subr.h> 58 59 #include <machine/psl.h> 60 #include <machine/cpu.h> 61 #include <machine/iomap.h> 62 #include <machine/mfp.h> 63 #include <atari/dev/clockreg.h> 64 #include <atari/atari/device.h> 65 66 #if defined(GPROF) && defined(PROFTIMER) 67 #include <machine/profile.h> 68 #endif 69 70 /* 71 * The MFP clock runs at 2457600Hz. We use a {system,stat,prof}clock divider 72 * of 200. Therefore the timer runs at an effective rate of: 73 * 2457600/200 = 12288Hz. 74 */ 75 #define CLOCK_HZ 12288 76 77 /* 78 * Machine-dependent clock routines. 79 * 80 * Inittodr initializes the time of day hardware which provides 81 * date functions. 82 * 83 * Resettodr restores the time of day hardware after a time change. 84 */ 85 86 struct clock_softc { 87 struct device sc_dev; 88 int sc_flags; 89 }; 90 91 /* 92 * 'sc_flags' state info. Only used by the rtc-device functions. 93 */ 94 #define RTC_OPEN 1 95 96 dev_type_open(rtcopen); 97 dev_type_close(rtcclose); 98 dev_type_read(rtcread); 99 dev_type_write(rtcwrite); 100 101 static void clockattach __P((struct device *, struct device *, void *)); 102 static int clockmatch __P((struct device *, struct cfdata *, void *)); 103 104 CFATTACH_DECL(clock, sizeof(struct clock_softc), 105 clockmatch, clockattach, NULL, NULL); 106 107 extern struct cfdriver clock_cd; 108 109 const struct cdevsw rtc_cdevsw = { 110 rtcopen, rtcclose, rtcread, rtcwrite, noioctl, 111 nostop, notty, nopoll, nommap, nokqfilter, 112 }; 113 114 void statintr __P((struct clockframe)); 115 116 static u_long gettod __P((void)); 117 static int twodigits __P((char *, int)); 118 119 static int divisor; /* Systemclock divisor */ 120 121 /* 122 * Statistics and profile clock intervals and variances. Variance must 123 * be a power of 2. Since this gives us an even number, not an odd number, 124 * we discard one case and compensate. That is, a variance of 64 would 125 * give us offsets in [0..63]. Instead, we take offsets in [1..63]. 126 * This is symmetric around the point 32, or statvar/2, and thus averages 127 * to that value (assuming uniform random numbers). 128 */ 129 #ifdef STATCLOCK 130 static int statvar = 32; /* {stat,prof}clock variance */ 131 static int statmin; /* statclock divisor - variance/2 */ 132 static int profmin; /* profclock divisor - variance/2 */ 133 static int clk2min; /* current, from above choices */ 134 #endif 135 136 int 137 clockmatch(pdp, cfp, auxp) 138 struct device *pdp; 139 struct cfdata *cfp; 140 void *auxp; 141 { 142 if (!atari_realconfig) { 143 /* 144 * Initialize Timer-B in the ST-MFP. This timer is used by 145 * the 'delay' function below. This timer is setup to be 146 * continueously counting from 255 back to zero at a 147 * frequency of 614400Hz. We do this *early* in the 148 * initialisation process. 149 */ 150 MFP->mf_tbcr = 0; /* Stop timer */ 151 MFP->mf_iera &= ~IA_TIMB; /* Disable timer interrupts */ 152 MFP->mf_tbdr = 0; 153 MFP->mf_tbcr = T_Q004; /* Start timer */ 154 155 /* 156 * Initialize the time structure 157 */ 158 time.tv_sec = 0; 159 time.tv_usec = 0; 160 161 return 0; 162 } 163 if(!strcmp("clock", auxp)) 164 return(1); 165 return(0); 166 } 167 168 /* 169 * Start the real-time clock. 170 */ 171 void clockattach(pdp, dp, auxp) 172 struct device *pdp, *dp; 173 void *auxp; 174 { 175 struct clock_softc *sc = (void *)dp; 176 177 sc->sc_flags = 0; 178 179 /* 180 * Initialize Timer-A in the ST-MFP. We use a divisor of 200. 181 * The MFP clock runs at 2457600Hz. Therefore the timer runs 182 * at an effective rate of: 2457600/200 = 12288Hz. The 183 * following expression works for 48, 64 or 96 hz. 184 */ 185 divisor = CLOCK_HZ/hz; 186 MFP->mf_tacr = 0; /* Stop timer */ 187 MFP->mf_iera &= ~IA_TIMA; /* Disable timer interrupts */ 188 MFP->mf_tadr = divisor; /* Set divisor */ 189 190 if (hz != 48 && hz != 64 && hz != 96) { /* XXX */ 191 printf (": illegal value %d for systemclock, reset to %d\n\t", 192 hz, 64); 193 hz = 64; 194 } 195 printf(": system hz %d timer-A divisor 200/%d\n", hz, divisor); 196 197 #ifdef STATCLOCK 198 if ((stathz == 0) || (stathz > hz) || (CLOCK_HZ % stathz)) 199 stathz = hz; 200 if ((profhz == 0) || (profhz > (hz << 1)) || (CLOCK_HZ % profhz)) 201 profhz = hz << 1; 202 203 MFP->mf_tcdcr &= 0x7; /* Stop timer */ 204 MFP->mf_ierb &= ~IB_TIMC; /* Disable timer inter. */ 205 MFP->mf_tcdr = CLOCK_HZ/stathz; /* Set divisor */ 206 207 statmin = (CLOCK_HZ/stathz) - (statvar >> 1); 208 profmin = (CLOCK_HZ/profhz) - (statvar >> 1); 209 clk2min = statmin; 210 #endif /* STATCLOCK */ 211 212 } 213 214 void cpu_initclocks() 215 { 216 MFP->mf_tacr = T_Q200; /* Start timer */ 217 MFP->mf_ipra = (u_int8_t)~IA_TIMA;/* Clear pending interrupts */ 218 MFP->mf_iera |= IA_TIMA; /* Enable timer interrupts */ 219 MFP->mf_imra |= IA_TIMA; /* ..... */ 220 221 #ifdef STATCLOCK 222 MFP->mf_tcdcr = (MFP->mf_tcdcr & 0x7) | (T_Q200<<4); /* Start */ 223 MFP->mf_iprb = (u_int8_t)~IB_TIMC;/* Clear pending interrupts */ 224 MFP->mf_ierb |= IB_TIMC; /* Enable timer interrupts */ 225 MFP->mf_imrb |= IB_TIMC; /* ..... */ 226 #endif /* STATCLOCK */ 227 } 228 229 void 230 setstatclockrate(newhz) 231 int newhz; 232 { 233 #ifdef STATCLOCK 234 if (newhz == stathz) 235 clk2min = statmin; 236 else clk2min = profmin; 237 #endif /* STATCLOCK */ 238 } 239 240 #ifdef STATCLOCK 241 void 242 statintr(frame) 243 struct clockframe frame; 244 { 245 register int var, r; 246 247 var = statvar - 1; 248 do { 249 r = random() & var; 250 } while(r == 0); 251 252 /* 253 * Note that we are always lagging behind as the new divisor 254 * value will not be loaded until the next interrupt. This 255 * shouldn't disturb the median frequency (I think ;-) ) as 256 * only the value used when switching frequencies is used 257 * twice. This shouldn't happen very often. 258 */ 259 MFP->mf_tcdr = clk2min + r; 260 261 statclock(&frame); 262 } 263 #endif /* STATCLOCK */ 264 265 /* 266 * Returns number of usec since last recorded clock "tick" 267 * (i.e. clock interrupt). 268 */ 269 long 270 clkread() 271 { 272 u_int delta; 273 u_char ipra, tadr; 274 275 /* 276 * Note: Order is important! 277 * By reading 'ipra' before 'tadr' and caching the data, I try to avoid 278 * the situation that very low value in 'tadr' is read (== a big delta) 279 * while also acccounting for a full 'tick' because the counter went 280 * through zero during the calculations. 281 */ 282 ipra = MFP->mf_ipra; tadr = MFP->mf_tadr; 283 284 delta = ((divisor - tadr) * tick) / divisor; 285 /* 286 * Account for pending clock interrupts 287 */ 288 if(ipra & IA_TIMA) 289 return(delta + tick); 290 return(delta); 291 } 292 293 #define TIMB_FREQ 614400 294 #define TIMB_LIMIT 256 295 296 /* 297 * Wait "n" microseconds. 298 * Relies on MFP-Timer B counting down from TIMB_LIMIT at TIMB_FREQ Hz. 299 * Note: timer had better have been programmed before this is first used! 300 */ 301 void 302 delay(n) 303 int n; 304 { 305 int tick, otick; 306 307 /* 308 * Read the counter first, so that the rest of the setup overhead is 309 * counted. 310 */ 311 otick = MFP->mf_tbdr; 312 313 /* 314 * Calculate ((n * TIMER_FREQ) / 1e6) using explicit assembler code so 315 * we can take advantage of the intermediate 64-bit quantity to prevent 316 * loss of significance. 317 */ 318 n -= 5; 319 if(n < 0) 320 return; 321 { 322 u_int temp; 323 324 __asm __volatile ("mulul %2,%1:%0" : "=d" (n), "=d" (temp) 325 : "d" (TIMB_FREQ), "d" (n)); 326 __asm __volatile ("divul %1,%2:%0" : "=d" (n) 327 : "d"(1000000),"d"(temp),"0"(n)); 328 } 329 330 while(n > 0) { 331 tick = MFP->mf_tbdr; 332 if(tick > otick) 333 n -= TIMB_LIMIT - (tick - otick); 334 else n -= otick - tick; 335 otick = tick; 336 } 337 } 338 339 #ifdef GPROF 340 /* 341 * profclock() is expanded in line in lev6intr() unless profiling kernel. 342 * Assumes it is called with clock interrupts blocked. 343 */ 344 profclock(pc, ps) 345 caddr_t pc; 346 int ps; 347 { 348 /* 349 * Came from user mode. 350 * If this process is being profiled record the tick. 351 */ 352 if (USERMODE(ps)) { 353 if (p->p_stats.p_prof.pr_scale) 354 addupc(pc, &curproc->p_stats.p_prof, 1); 355 } 356 /* 357 * Came from kernel (supervisor) mode. 358 * If we are profiling the kernel, record the tick. 359 */ 360 else if (profiling < 2) { 361 register int s = pc - s_lowpc; 362 363 if (s < s_textsize) 364 kcount[s / (HISTFRACTION * sizeof (*kcount))]++; 365 } 366 /* 367 * Kernel profiling was on but has been disabled. 368 * Mark as no longer profiling kernel and if all profiling done, 369 * disable the clock. 370 */ 371 if (profiling && (profon & PRF_KERNEL)) { 372 profon &= ~PRF_KERNEL; 373 if (profon == PRF_NONE) 374 stopprofclock(); 375 } 376 } 377 #endif 378 379 /*********************************************************************** 380 * Real Time Clock support * 381 ***********************************************************************/ 382 383 u_int mc146818_read(rtc, regno) 384 void *rtc; 385 u_int regno; 386 { 387 ((struct rtc *)rtc)->rtc_regno = regno; 388 return(((struct rtc *)rtc)->rtc_data & 0377); 389 } 390 391 void mc146818_write(rtc, regno, value) 392 void *rtc; 393 u_int regno, value; 394 { 395 ((struct rtc *)rtc)->rtc_regno = regno; 396 ((struct rtc *)rtc)->rtc_data = value; 397 } 398 399 /* 400 * Initialize the time of day register, assuming the RTC runs in UTC. 401 * Since we've got the 'rtc' device, this functionality should be removed 402 * from the kernel. The only problem to be solved before that can happen 403 * is the possibility of init(1) providing a way (rc.boot?) to set 404 * the RTC before single-user mode is entered. 405 */ 406 void 407 inittodr(base) 408 time_t base; 409 { 410 /* Battery clock does not store usec's, so forget about it. */ 411 time.tv_sec = gettod(); 412 time.tv_usec = 0; 413 } 414 415 /* 416 * Function turned into a No-op. Use /dev/rtc to update the RTC. 417 */ 418 void 419 resettodr() 420 { 421 return; 422 } 423 424 static u_long 425 gettod() 426 { 427 int sps; 428 mc_todregs clkregs; 429 u_int regb; 430 struct clock_ymdhms dt; 431 432 sps = splhigh(); 433 regb = mc146818_read(RTC, MC_REGB); 434 MC146818_GETTOD(RTC, &clkregs); 435 splx(sps); 436 437 regb &= MC_REGB_24HR|MC_REGB_BINARY; 438 if (regb != (MC_REGB_24HR|MC_REGB_BINARY)) { 439 printf("Error: Nonstandard RealTimeClock Configuration -" 440 " value ignored\n" 441 " A write to /dev/rtc will correct this.\n"); 442 return(0); 443 } 444 if(clkregs[MC_SEC] > 59) 445 return(0); 446 if(clkregs[MC_MIN] > 59) 447 return(0); 448 if(clkregs[MC_HOUR] > 23) 449 return(0); 450 if(range_test(clkregs[MC_DOM], 1, 31)) 451 return(0); 452 if (range_test(clkregs[MC_MONTH], 1, 12)) 453 return(0); 454 if(clkregs[MC_YEAR] > 99) 455 return(0); 456 457 dt.dt_year = clkregs[MC_YEAR] + GEMSTARTOFTIME; 458 dt.dt_mon = clkregs[MC_MONTH]; 459 dt.dt_day = clkregs[MC_DOM]; 460 dt.dt_hour = clkregs[MC_HOUR]; 461 dt.dt_min = clkregs[MC_MIN]; 462 dt.dt_sec = clkregs[MC_SEC]; 463 464 return(clock_ymdhms_to_secs(&dt)); 465 } 466 /*********************************************************************** 467 * RTC-device support * 468 ***********************************************************************/ 469 int 470 rtcopen(dev, flag, mode, p) 471 dev_t dev; 472 int flag, mode; 473 struct proc *p; 474 { 475 int unit = minor(dev); 476 struct clock_softc *sc; 477 478 if (unit >= clock_cd.cd_ndevs) 479 return ENXIO; 480 sc = clock_cd.cd_devs[unit]; 481 if (!sc) 482 return ENXIO; 483 if (sc->sc_flags & RTC_OPEN) 484 return EBUSY; 485 486 sc->sc_flags = RTC_OPEN; 487 return 0; 488 } 489 490 int 491 rtcclose(dev, flag, mode, p) 492 dev_t dev; 493 int flag; 494 int mode; 495 struct proc *p; 496 { 497 int unit = minor(dev); 498 struct clock_softc *sc = clock_cd.cd_devs[unit]; 499 500 sc->sc_flags = 0; 501 return 0; 502 } 503 504 int 505 rtcread(dev, uio, flags) 506 dev_t dev; 507 struct uio *uio; 508 int flags; 509 { 510 struct clock_softc *sc; 511 mc_todregs clkregs; 512 int s, length; 513 char buffer[16]; 514 515 sc = clock_cd.cd_devs[minor(dev)]; 516 517 s = splhigh(); 518 MC146818_GETTOD(RTC, &clkregs); 519 splx(s); 520 521 sprintf(buffer, "%4d%02d%02d%02d%02d.%02d\n", 522 clkregs[MC_YEAR] + GEMSTARTOFTIME, 523 clkregs[MC_MONTH], clkregs[MC_DOM], 524 clkregs[MC_HOUR], clkregs[MC_MIN], clkregs[MC_SEC]); 525 526 if (uio->uio_offset > strlen(buffer)) 527 return 0; 528 529 length = strlen(buffer) - uio->uio_offset; 530 if (length > uio->uio_resid) 531 length = uio->uio_resid; 532 533 return(uiomove((caddr_t)buffer, length, uio)); 534 } 535 536 static int 537 twodigits(buffer, pos) 538 char *buffer; 539 int pos; 540 { 541 int result = 0; 542 543 if (buffer[pos] >= '0' && buffer[pos] <= '9') 544 result = (buffer[pos] - '0') * 10; 545 if (buffer[pos+1] >= '0' && buffer[pos+1] <= '9') 546 result += (buffer[pos+1] - '0'); 547 return(result); 548 } 549 550 int 551 rtcwrite(dev, uio, flags) 552 dev_t dev; 553 struct uio *uio; 554 int flags; 555 { 556 mc_todregs clkregs; 557 int s, length, error; 558 char buffer[16]; 559 560 /* 561 * We require atomic updates! 562 */ 563 length = uio->uio_resid; 564 if (uio->uio_offset || (length != sizeof(buffer) 565 && length != sizeof(buffer - 1))) 566 return(EINVAL); 567 568 if ((error = uiomove((caddr_t)buffer, sizeof(buffer), uio))) 569 return(error); 570 571 if (length == sizeof(buffer) && buffer[sizeof(buffer) - 1] != '\n') 572 return(EINVAL); 573 574 s = splclock(); 575 mc146818_write(RTC, MC_REGB, 576 mc146818_read(RTC, MC_REGB) | MC_REGB_24HR | MC_REGB_BINARY); 577 MC146818_GETTOD(RTC, &clkregs); 578 splx(s); 579 580 clkregs[MC_SEC] = twodigits(buffer, 13); 581 clkregs[MC_MIN] = twodigits(buffer, 10); 582 clkregs[MC_HOUR] = twodigits(buffer, 8); 583 clkregs[MC_DOM] = twodigits(buffer, 6); 584 clkregs[MC_MONTH] = twodigits(buffer, 4); 585 s = twodigits(buffer, 0) * 100 + twodigits(buffer, 2); 586 clkregs[MC_YEAR] = s - GEMSTARTOFTIME; 587 588 s = splclock(); 589 MC146818_PUTTOD(RTC, &clkregs); 590 splx(s); 591 592 return(0); 593 } 594
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