clockreg.h revision 1.1 1 /* $NetBSD: clockreg.h,v 1.1 1995/03/26 07:12:15 leo Exp $ */
2
3 /*
4 * Copyright (c) 1995 Leo Weppelman.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Leo Weppelman.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _CLOCKREG_H
34 #define _CLOCKREG_H
35 /*
36 * Atari TT hardware:
37 * Motorola MC146818A RealTimeClock
38 */
39
40 #define RTC ((struct rtc *)AD_RTC)
41
42 struct rtc {
43 volatile u_char rtc_dat[4];
44 };
45
46 #define rtc_regno rtc_dat[1] /* register nr. select */
47 #define rtc_data rtc_dat[3] /* data register */
48
49 /*
50 * Register number definitions
51 */
52 #define RTC_SEC 0
53 #define RTC_ASEC 1
54 #define RTC_MIN 2
55 #define RTC_A_MIN 3
56 #define RTC_HOUR 4
57 #define RTC_A_HOUR 5
58 #define RTC_WDAY 6
59 #define RTC_DAY 7
60 #define RTC_MONTH 8
61 #define RTC_YEAR 9
62 #define RTC_REGA 10
63 #define RTC_REGB 11
64 #define RTC_REGC 12
65 #define RTC_REGD 13
66 #define RTC_RAMBOT 14 /* Reg. offset of nv-RAM */
67 #define RTC_RAMSIZ 50 /* #bytes of nv-RAM available */
68
69 /*
70 * Define fields for register A
71 */
72 #define RTC_A_UIP 0x80 /* Update In Progress */
73 #define RTC_A_DV2 0x40 /* Divider select */
74 #define RTC_A_DV1 0x20 /* Divider select */
75 #define RTC_A_DV0 0x10 /* Divider select */
76 #define RTC_A_RS3 0x08 /* Rate Select */
77 #define RTC_A_RS2 0x04 /* Rate Select */
78 #define RTC_A_RS1 0x02 /* Rate Select */
79 #define RTC_A_RS0 0x01 /* Rate Select */
80
81 /*
82 * Define fields for register B
83 */
84 #define RTC_B_SET 0x80 /* SET date/time */
85 #define RTC_B_PIE 0x40 /* Periodic Int. Enable */
86 #define RTC_B_AIE 0x20 /* Alarm Int. Enable */
87 #define RTC_B_UIE 0x10 /* Update Ended Int. Enable */
88 #define RTC_B_SQWE 0x08 /* Square Wave Output Enable */
89 #define RTC_B_DM 0x04 /* Binary Data mode */
90 #define RTC_B_24_12 0x02 /* 24 Hour mode */
91 #define RTC_B_DSE 0x01 /* DST Enable */
92
93 /*
94 * Define fields for register C
95 */
96 #define RTC_C_IRQF 0x80 /* IRQ flag */
97 #define RTC_C_PF 0x40 /* Periodic Int. flag */
98 #define RTC_C_AF 0x20 /* Alarm Int. flag */
99 #define RTC_C_UF 0x10 /* Update Ended Int. flag */
100
101 /*
102 * Define fields for register D
103 */
104 #define RTC_D_VRT 0x80 /* Valid Ram and Time */
105
106 /*
107 * Some useful constants/macros
108 */
109 #define is_leap(x) (!(x % 4) && ((x % 100) || !(x % 1000)))
110 #define range_test(n, l, h) ((n) < (l) || (n) > (h))
111 #define SECS_DAY 86400L
112 #define SECS_HOUR 3600L
113 #define STARTOFTIME 1970
114 #endif /* _CLOCKREG_H */
115