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dma.c revision 1.12
      1 /*	$NetBSD: dma.c,v 1.12 1997/01/01 21:14:47 leo Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 Leo Weppelman.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *      This product includes software developed by Leo Weppelman.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * This file contains special code dealing with the DMA interface
     35  * on the Atari ST.
     36  *
     37  * The DMA circuitry requires some special treatment for the peripheral
     38  * devices which make use of the ST's DMA feature (the hard disk and the
     39  * floppy drive).
     40  * All devices using DMA need mutually exclusive access and can follow some
     41  * standard pattern which will be provided in this file.
     42  *
     43  * The file contains the following entry points:
     44  *
     45  *	st_dmagrab:	ensure exclusive access to the DMA circuitry
     46  *	st_dmafree:	free exclusive access to the DMA circuitry
     47  *	st_dmawanted:	somebody is queued waiting for DMA-access
     48  *	dmaint:		DMA interrupt routine, switches to the current driver
     49  *	st_dmaaddr_set:	specify 24 bit RAM address
     50  *	st_dmaaddr_get:	get address of last DMA-op
     51  *	st_dmacomm:	program DMA, flush FIFO first
     52  */
     53 
     54 #include <sys/param.h>
     55 #include <sys/systm.h>
     56 #include <sys/kernel.h>
     57 #include <sys/queue.h>
     58 
     59 #include <machine/cpu.h>
     60 #include <machine/iomap.h>
     61 #include <machine/dma.h>
     62 
     63 #include <atari/atari/intr.h>
     64 
     65 #define	NDMA_DEV	10	/* Max 2 floppy's, 8 hard-disks		*/
     66 typedef struct dma_entry {
     67 	TAILQ_ENTRY(dma_entry)	entries;	/* List pointers	   */
     68 	void		(*call_func)(void *);	/* Call when lock granted  */
     69 	void		(*int_func)(void *);	/* Call on DMA interrupt   */
     70 	void		*softc;			/* Arg. to int_func	   */
     71 	int		*lock_stat;		/* status of DMA lock	   */
     72 } DMA_ENTRY;
     73 
     74 /*
     75  * Preallocated entries. An allocator seem an overkill here.
     76  */
     77 static	DMA_ENTRY dmatable[NDMA_DEV];	/* preallocated entries		*/
     78 
     79 /*
     80  * Heads of free and active lists:
     81  */
     82 static  TAILQ_HEAD(freehead, dma_entry)	dma_free;
     83 static  TAILQ_HEAD(acthead, dma_entry)	dma_active;
     84 
     85 static	int	must_init = 1;		/* Must initialize		*/
     86 
     87 void	cdmaint __P((void *, int));
     88 
     89 static	void	st_dma_init __P((void));
     90 
     91 static void
     92 st_dma_init()
     93 {
     94 	int	i;
     95 
     96 	TAILQ_INIT(&dma_free);
     97 	TAILQ_INIT(&dma_active);
     98 
     99 	for(i = 0; i < NDMA_DEV; i++)
    100 		TAILQ_INSERT_HEAD(&dma_free, &dmatable[i], entries);
    101 
    102 	if (intr_establish(7, USER_VEC, 0, (hw_ifun_t)cdmaint, NULL) == NULL)
    103 		panic("st_dma_init: Can't establish interrupt\n");
    104 }
    105 
    106 int
    107 st_dmagrab(int_func, call_func, softc, lock_stat, rcaller)
    108 dma_farg	int_func;
    109 dma_farg 	call_func;
    110 void		*softc;
    111 int		*lock_stat;
    112 int		rcaller;
    113 {
    114 	int		sps;
    115 	DMA_ENTRY	*req;
    116 
    117 	if(must_init) {
    118 		st_dma_init();
    119 		must_init = 0;
    120 	}
    121 	*lock_stat = DMA_LOCK_REQ;
    122 
    123 	sps = splhigh();
    124 
    125 	/*
    126 	 * Create a request...
    127 	 */
    128 	if(dma_free.tqh_first == NULL)
    129 		panic("st_dmagrab: Too many outstanding requests\n");
    130 	req = dma_free.tqh_first;
    131 	TAILQ_REMOVE(&dma_free, dma_free.tqh_first, entries);
    132 	req->call_func = call_func;
    133 	req->int_func  = int_func;
    134 	req->softc     = softc;
    135 	req->lock_stat = lock_stat;
    136 	TAILQ_INSERT_TAIL(&dma_active, req, entries);
    137 
    138 	if(dma_active.tqh_first != req) {
    139 		splx(sps);
    140 		return(0);
    141 	}
    142 	splx(sps);
    143 
    144 	/*
    145 	 * We're at the head of the queue, ergo: we got the lock.
    146 	 */
    147 	*lock_stat = DMA_LOCK_GRANT;
    148 
    149 	if(rcaller) {
    150 		/*
    151 		 * Just return to caller immediately without going
    152 		 * through 'call_func' first.
    153 		 */
    154 		return(1);
    155 	}
    156 
    157 	(*call_func)(softc);	/* Call followup function		*/
    158 	return(0);
    159 }
    160 
    161 void
    162 st_dmafree(softc, lock_stat)
    163 void	*softc;
    164 int	*lock_stat;
    165 {
    166 	int		sps;
    167 	DMA_ENTRY	*req;
    168 
    169 	sps = splhigh();
    170 
    171 	/*
    172 	 * Some validity checks first.
    173 	 */
    174 	if((req = dma_active.tqh_first) == NULL)
    175 		panic("st_dmafree: empty active queue\n");
    176 	if(req->softc != softc)
    177 		printf("Caller of st_dmafree is not lock-owner!\n");
    178 
    179 	/*
    180 	 * Clear lock status, move request from active to free queue.
    181 	 */
    182 	*lock_stat = 0;
    183 	TAILQ_REMOVE(&dma_active, req, entries);
    184 	TAILQ_INSERT_HEAD(&dma_free, req, entries);
    185 
    186 	if((req = dma_active.tqh_first) != NULL) {
    187 		/*
    188 		 * Call next request through softint handler. This avoids
    189 		 * spl-conflicts.
    190 		 */
    191 		*req->lock_stat = DMA_LOCK_GRANT;
    192 		add_sicallback((si_farg)req->call_func, req->softc, 0);
    193 	}
    194 	splx(sps);
    195 	return;
    196 }
    197 
    198 int
    199 st_dmawanted()
    200 {
    201 	return(dma_active.tqh_first->entries.tqe_next != NULL);
    202 }
    203 
    204 void
    205 cdmaint(unused, sr)
    206 void	*unused;
    207 int	sr;	/* sr at time of interrupt */
    208 {
    209 	dma_farg	int_func;
    210 	void		*softc;
    211 
    212 	if(dma_active.tqh_first != NULL) {
    213 		int_func = dma_active.tqh_first->int_func;
    214 		softc    = dma_active.tqh_first->softc;
    215 
    216 		if(!BASEPRI(sr))
    217 			add_sicallback((si_farg)int_func, softc, 0);
    218 		else {
    219 			spl1();
    220 			(*int_func)(softc);
    221 			spl0();
    222 		}
    223 	}
    224 	else printf("DMA interrupt discarded\n");
    225 }
    226 
    227 /*
    228  * Setup address for DMA-transfer.
    229  * Note: The order _is_ important!
    230  */
    231 void
    232 st_dmaaddr_set(address)
    233 caddr_t	address;
    234 {
    235 	register u_long ad = (u_long)address;
    236 
    237 	DMA->dma_addr[AD_LOW ] = (ad     ) & 0xff;
    238 	DMA->dma_addr[AD_MID ] = (ad >> 8) & 0xff;
    239 	DMA->dma_addr[AD_HIGH] = (ad >>16) & 0xff;
    240 }
    241 
    242 /*
    243  * Get address from DMA unit.
    244  */
    245 u_long
    246 st_dmaaddr_get()
    247 {
    248 	register u_long ad = 0;
    249 
    250 	ad  = (DMA->dma_addr[AD_LOW ] & 0xff);
    251 	ad |= (DMA->dma_addr[AD_MID ] & 0xff) << 8;
    252 	ad |= (DMA->dma_addr[AD_HIGH] & 0xff) <<16;
    253 	return(ad);
    254 }
    255 
    256 /*
    257  * Program the DMA-controller to transfer 'nblk' blocks of 512 bytes.
    258  * The DMA_WRBIT trick flushes the FIFO before doing DMA.
    259  */
    260 void
    261 st_dmacomm(mode, nblk)
    262 int	mode, nblk;
    263 {
    264 	DMA->dma_mode = mode;
    265 	DMA->dma_mode = mode ^ DMA_WRBIT;
    266 	DMA->dma_mode = mode;
    267 	DMA->dma_data = nblk;
    268 	delay(2);	/* Needed for Falcon */
    269 	DMA->dma_mode = DMA_SCREG | (mode & DMA_WRBIT);
    270 }
    271