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dma.c revision 1.24
      1 /*	$NetBSD: dma.c,v 1.24 2009/10/20 19:10:10 snj Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1995 Leo Weppelman.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * This file contains special code dealing with the DMA interface
     30  * on the Atari ST.
     31  *
     32  * The DMA circuitry requires some special treatment for the peripheral
     33  * devices which make use of the ST's DMA feature (the hard disk and the
     34  * floppy drive).
     35  * All devices using DMA need mutually exclusive access and can follow some
     36  * standard pattern which will be provided in this file.
     37  *
     38  * The file contains the following entry points:
     39  *
     40  *	st_dmagrab:	ensure exclusive access to the DMA circuitry
     41  *	st_dmafree:	free exclusive access to the DMA circuitry
     42  *	st_dmawanted:	somebody is queued waiting for DMA-access
     43  *	dmaint:		DMA interrupt routine, switches to the current driver
     44  *	st_dmaaddr_set:	specify 24 bit RAM address
     45  *	st_dmaaddr_get:	get address of last DMA-op
     46  *	st_dmacomm:	program DMA, flush FIFO first
     47  */
     48 
     49 #include <sys/cdefs.h>
     50 __KERNEL_RCSID(0, "$NetBSD: dma.c,v 1.24 2009/10/20 19:10:10 snj Exp $");
     51 
     52 #include <sys/param.h>
     53 #include <sys/systm.h>
     54 #include <sys/kernel.h>
     55 #include <sys/proc.h>
     56 #include <sys/queue.h>
     57 
     58 #include <machine/cpu.h>
     59 #include <machine/iomap.h>
     60 #include <machine/dma.h>
     61 #include <machine/intr.h>
     62 
     63 #define	NDMA_DEV	10	/* Max 2 floppy's, 8 hard-disks		*/
     64 typedef struct dma_entry {
     65 	TAILQ_ENTRY(dma_entry)	entries;	/* List pointers	   */
     66 	void		(*call_func)(void *);	/* Call when lock granted  */
     67 	void		(*int_func)(void *);	/* Call on DMA interrupt   */
     68 	void		*softc;			/* Arg. to int_func	   */
     69 	int		*lock_stat;		/* status of DMA lock	   */
     70 } DMA_ENTRY;
     71 
     72 /*
     73  * Preallocated entries. An allocator seem an overkill here.
     74  */
     75 static	DMA_ENTRY dmatable[NDMA_DEV];	/* preallocated entries		*/
     76 
     77 /*
     78  * Heads of free and active lists:
     79  */
     80 static  TAILQ_HEAD(freehead, dma_entry)	dma_free;
     81 static  TAILQ_HEAD(acthead, dma_entry)	dma_active;
     82 
     83 static	int	must_init = 1;		/* Must initialize		*/
     84 
     85 int	cdmaint(void *, int);
     86 
     87 static	void	st_dma_init(void);
     88 
     89 static void
     90 st_dma_init(void)
     91 {
     92 	int	i;
     93 
     94 	TAILQ_INIT(&dma_free);
     95 	TAILQ_INIT(&dma_active);
     96 
     97 	for(i = 0; i < NDMA_DEV; i++)
     98 		TAILQ_INSERT_HEAD(&dma_free, &dmatable[i], entries);
     99 
    100 	if (intr_establish(7, USER_VEC, 0, cdmaint, NULL) == NULL)
    101 		panic("st_dma_init: Can't establish interrupt");
    102 }
    103 
    104 int
    105 st_dmagrab(dma_farg int_func, dma_farg call_func, void *softc, int *lock_stat, int rcaller)
    106 {
    107 	int		sps;
    108 	DMA_ENTRY	*req;
    109 
    110 	if(must_init) {
    111 		st_dma_init();
    112 		must_init = 0;
    113 	}
    114 	*lock_stat = DMA_LOCK_REQ;
    115 
    116 	sps = splhigh();
    117 
    118 	/*
    119 	 * Create a request...
    120 	 */
    121 	if(dma_free.tqh_first == NULL)
    122 		panic("st_dmagrab: Too many outstanding requests");
    123 	req = dma_free.tqh_first;
    124 	TAILQ_REMOVE(&dma_free, dma_free.tqh_first, entries);
    125 	req->call_func = call_func;
    126 	req->int_func  = int_func;
    127 	req->softc     = softc;
    128 	req->lock_stat = lock_stat;
    129 	TAILQ_INSERT_TAIL(&dma_active, req, entries);
    130 
    131 	if(dma_active.tqh_first != req) {
    132 		if (call_func == NULL) {
    133 			do {
    134 				tsleep(&dma_active, PRIBIO, "dmalck", 0);
    135 			} while (*req->lock_stat != DMA_LOCK_GRANT);
    136 			splx(sps);
    137 			return(1);
    138 		}
    139 		splx(sps);
    140 		return(0);
    141 	}
    142 	splx(sps);
    143 
    144 	/*
    145 	 * We're at the head of the queue, ergo: we got the lock.
    146 	 */
    147 	*lock_stat = DMA_LOCK_GRANT;
    148 
    149 	if(rcaller || (call_func == NULL)) {
    150 		/*
    151 		 * Just return to caller immediately without going
    152 		 * through 'call_func' first.
    153 		 */
    154 		return(1);
    155 	}
    156 
    157 	(*call_func)(softc);	/* Call followup function		*/
    158 	return(0);
    159 }
    160 
    161 void
    162 st_dmafree(void *softc, int *lock_stat)
    163 {
    164 	int		sps;
    165 	DMA_ENTRY	*req;
    166 
    167 	sps = splhigh();
    168 
    169 	/*
    170 	 * Some validity checks first.
    171 	 */
    172 	if((req = dma_active.tqh_first) == NULL)
    173 		panic("st_dmafree: empty active queue");
    174 	if(req->softc != softc)
    175 		printf("Caller of st_dmafree is not lock-owner!\n");
    176 
    177 	/*
    178 	 * Clear lock status, move request from active to free queue.
    179 	 */
    180 	*lock_stat = 0;
    181 	TAILQ_REMOVE(&dma_active, req, entries);
    182 	TAILQ_INSERT_HEAD(&dma_free, req, entries);
    183 
    184 	if((req = dma_active.tqh_first) != NULL) {
    185 		*req->lock_stat = DMA_LOCK_GRANT;
    186 
    187 		if (req->call_func == NULL)
    188 			wakeup((void *)&dma_active);
    189 		else {
    190 		    /*
    191 		     * Call next request through softint handler. This avoids
    192 		     * spl-conflicts.
    193 		     */
    194 		    add_sicallback((si_farg)req->call_func, req->softc, 0);
    195 		}
    196 	}
    197 	splx(sps);
    198 	return;
    199 }
    200 
    201 int
    202 st_dmawanted(void)
    203 {
    204 	return(dma_active.tqh_first->entries.tqe_next != NULL);
    205 }
    206 
    207 int
    208 cdmaint(void *unused, int sr)
    209 	/* sr:	 sr at time of interrupt */
    210 {
    211 	dma_farg	int_func;
    212 	void		*softc;
    213 
    214 	if(dma_active.tqh_first != NULL) {
    215 		/*
    216 		 * Due to the logic of the ST-DMA chip, it is not possible to
    217 		 * check for stray interrupts here...
    218 		 */
    219 		int_func = dma_active.tqh_first->int_func;
    220 		softc    = dma_active.tqh_first->softc;
    221 
    222 		if(!BASEPRI(sr))
    223 			add_sicallback((si_farg)int_func, softc, 0);
    224 		else {
    225 			spl1();
    226 			(*int_func)(softc);
    227 			spl0();
    228 		}
    229 		return 1;
    230 	}
    231 	return 0;
    232 }
    233 
    234 /*
    235  * Setup address for DMA-transfer.
    236  * Note: The order _is_ important!
    237  */
    238 void
    239 st_dmaaddr_set(void * address)
    240 {
    241 	register u_long ad = (u_long)address;
    242 
    243 	DMA->dma_addr[AD_LOW ] = (ad     ) & 0xff;
    244 	DMA->dma_addr[AD_MID ] = (ad >> 8) & 0xff;
    245 	DMA->dma_addr[AD_HIGH] = (ad >>16) & 0xff;
    246 }
    247 
    248 /*
    249  * Get address from DMA unit.
    250  */
    251 u_long
    252 st_dmaaddr_get(void)
    253 {
    254 	register u_long ad = 0;
    255 
    256 	ad  = (DMA->dma_addr[AD_LOW ] & 0xff);
    257 	ad |= (DMA->dma_addr[AD_MID ] & 0xff) << 8;
    258 	ad |= (DMA->dma_addr[AD_HIGH] & 0xff) <<16;
    259 	return(ad);
    260 }
    261 
    262 /*
    263  * Program the DMA-controller to transfer 'nblk' blocks of 512 bytes.
    264  * The DMA_WRBIT trick flushes the FIFO before doing DMA.
    265  */
    266 void
    267 st_dmacomm(int mode, int nblk)
    268 {
    269 	DMA->dma_mode = mode;
    270 	DMA->dma_mode = mode ^ DMA_WRBIT;
    271 	DMA->dma_mode = mode;
    272 	DMA->dma_data = nblk;
    273 	delay(2);	/* Needed for Falcon */
    274 	DMA->dma_mode = DMA_SCREG | (mode & DMA_WRBIT);
    275 }
    276