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ncr5380.c revision 1.40.8.2
      1  1.40.8.2  nathanw /*	$NetBSD: ncr5380.c,v 1.40.8.2 2002/10/18 02:35:55 nathanw Exp $	*/
      2  1.40.8.2  nathanw 
      3  1.40.8.2  nathanw /*
      4  1.40.8.2  nathanw  * Copyright (c) 1995 Leo Weppelman.
      5  1.40.8.2  nathanw  * All rights reserved.
      6  1.40.8.2  nathanw  *
      7  1.40.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
      8  1.40.8.2  nathanw  * modification, are permitted provided that the following conditions
      9  1.40.8.2  nathanw  * are met:
     10  1.40.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     11  1.40.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     12  1.40.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     13  1.40.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     14  1.40.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     15  1.40.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     16  1.40.8.2  nathanw  *    must display the following acknowledgement:
     17  1.40.8.2  nathanw  *      This product includes software developed by Leo Weppelman.
     18  1.40.8.2  nathanw  * 4. The name of the author may not be used to endorse or promote products
     19  1.40.8.2  nathanw  *    derived from this software without specific prior written permission
     20  1.40.8.2  nathanw  *
     21  1.40.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  1.40.8.2  nathanw  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  1.40.8.2  nathanw  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  1.40.8.2  nathanw  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  1.40.8.2  nathanw  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  1.40.8.2  nathanw  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  1.40.8.2  nathanw  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  1.40.8.2  nathanw  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  1.40.8.2  nathanw  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  1.40.8.2  nathanw  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  1.40.8.2  nathanw  */
     32  1.40.8.2  nathanw 
     33  1.40.8.2  nathanw /*
     34  1.40.8.2  nathanw  * Bit mask of targets you want debugging to be shown
     35  1.40.8.2  nathanw  */
     36  1.40.8.2  nathanw u_char	dbg_target_mask = 0x7f;
     37  1.40.8.2  nathanw 
     38  1.40.8.2  nathanw /*
     39  1.40.8.2  nathanw  * Set bit for target when parity checking must be disabled.
     40  1.40.8.2  nathanw  * My (LWP) Maxtor 7245S  seems to generate parity errors on about 50%
     41  1.40.8.2  nathanw  * of all transfers while the data is correct!?
     42  1.40.8.2  nathanw  */
     43  1.40.8.2  nathanw u_char	ncr5380_no_parchk = 0xff;
     44  1.40.8.2  nathanw 
     45  1.40.8.2  nathanw #ifdef	AUTO_SENSE
     46  1.40.8.2  nathanw 
     47  1.40.8.2  nathanw /*
     48  1.40.8.2  nathanw  * Bit masks of targets that accept linked commands, and those
     49  1.40.8.2  nathanw  * that we've already checked out.  Some devices will report
     50  1.40.8.2  nathanw  * that they support linked commands when they have problems with
     51  1.40.8.2  nathanw  * them.  By default, don't try them on any devices.  Allow an
     52  1.40.8.2  nathanw  * option to override.
     53  1.40.8.2  nathanw  */
     54  1.40.8.2  nathanw #ifdef	TRY_SCSI_LINKED_COMMANDS
     55  1.40.8.2  nathanw u_char	ncr_test_link = ((~TRY_SCSI_LINKED_COMMANDS) & 0x7f);
     56  1.40.8.2  nathanw #else
     57  1.40.8.2  nathanw u_char	ncr_test_link = 0x7f;
     58  1.40.8.2  nathanw #endif
     59  1.40.8.2  nathanw u_char	ncr_will_link = 0x00;
     60  1.40.8.2  nathanw 
     61  1.40.8.2  nathanw #endif	/* AUTO_SENSE */
     62  1.40.8.2  nathanw 
     63  1.40.8.2  nathanw /*
     64  1.40.8.2  nathanw  * This is the default sense-command we send.
     65  1.40.8.2  nathanw  */
     66  1.40.8.2  nathanw static	u_char	sense_cmd[] = {
     67  1.40.8.2  nathanw 		REQUEST_SENSE, 0, 0, 0, sizeof(struct scsipi_sense_data), 0
     68  1.40.8.2  nathanw };
     69  1.40.8.2  nathanw 
     70  1.40.8.2  nathanw /*
     71  1.40.8.2  nathanw  * True if the main co-routine is running
     72  1.40.8.2  nathanw  */
     73  1.40.8.2  nathanw static volatile int	main_running = 0;
     74  1.40.8.2  nathanw 
     75  1.40.8.2  nathanw /*
     76  1.40.8.2  nathanw  * Mask of targets selected
     77  1.40.8.2  nathanw  */
     78  1.40.8.2  nathanw static u_char	busy;
     79  1.40.8.2  nathanw 
     80  1.40.8.2  nathanw static void	ncr5380_minphys __P((struct buf *bp));
     81  1.40.8.2  nathanw static void	ncr5380_scsi_request __P((struct scsipi_channel *,
     82  1.40.8.2  nathanw 					scsipi_adapter_req_t, void *));
     83  1.40.8.2  nathanw static void	ncr5380_show_scsi_cmd __P((struct scsipi_xfer *xs));
     84  1.40.8.2  nathanw 
     85  1.40.8.2  nathanw static SC_REQ	req_queue[NREQ];
     86  1.40.8.2  nathanw static SC_REQ	*free_head = NULL;	/* Free request structures	*/
     87  1.40.8.2  nathanw 
     88  1.40.8.2  nathanw 
     89  1.40.8.2  nathanw /*
     90  1.40.8.2  nathanw  * Inline functions:
     91  1.40.8.2  nathanw  */
     92  1.40.8.2  nathanw 
     93  1.40.8.2  nathanw /*
     94  1.40.8.2  nathanw  * Determine the size of a SCSI command.
     95  1.40.8.2  nathanw  */
     96  1.40.8.2  nathanw extern __inline__ int command_size(opcode)
     97  1.40.8.2  nathanw u_char	opcode;
     98  1.40.8.2  nathanw {
     99  1.40.8.2  nathanw 	switch ((opcode >> 4) & 0xf) {
    100  1.40.8.2  nathanw 		case 0:
    101  1.40.8.2  nathanw 		case 1:
    102  1.40.8.2  nathanw 			return (6);
    103  1.40.8.2  nathanw 		case 2:
    104  1.40.8.2  nathanw 		case 3:
    105  1.40.8.2  nathanw 			return (10);
    106  1.40.8.2  nathanw 	}
    107  1.40.8.2  nathanw 	return (12);
    108  1.40.8.2  nathanw }
    109  1.40.8.2  nathanw 
    110  1.40.8.2  nathanw 
    111  1.40.8.2  nathanw /*
    112  1.40.8.2  nathanw  * Wait for request-line to become active. When it doesn't return 0.
    113  1.40.8.2  nathanw  * Otherwise return != 0.
    114  1.40.8.2  nathanw  * The timeouts in the 'wait_req_*' functions are arbitrary and rather
    115  1.40.8.2  nathanw  * large. In 99% of the invocations nearly no timeout is needed but in
    116  1.40.8.2  nathanw  * some cases (especially when using my tapedrive, a Tandberg 3600) the
    117  1.40.8.2  nathanw  * device is busy internally and the first SCSI-phase will be delayed.
    118  1.40.8.2  nathanw  */
    119  1.40.8.2  nathanw extern __inline__ int wait_req_true(void)
    120  1.40.8.2  nathanw {
    121  1.40.8.2  nathanw 	int	timeout = 250000;
    122  1.40.8.2  nathanw 
    123  1.40.8.2  nathanw 	while (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_REQ) && --timeout)
    124  1.40.8.2  nathanw 		delay(1);
    125  1.40.8.2  nathanw 	return (GET_5380_REG(NCR5380_IDSTAT) & SC_S_REQ);
    126  1.40.8.2  nathanw }
    127  1.40.8.2  nathanw 
    128  1.40.8.2  nathanw /*
    129  1.40.8.2  nathanw  * Wait for request-line to become inactive. When it doesn't return 0.
    130  1.40.8.2  nathanw  * Otherwise return != 0.
    131  1.40.8.2  nathanw  */
    132  1.40.8.2  nathanw extern __inline__ int wait_req_false(void)
    133  1.40.8.2  nathanw {
    134  1.40.8.2  nathanw 	int	timeout = 250000;
    135  1.40.8.2  nathanw 
    136  1.40.8.2  nathanw 	while ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_REQ) && --timeout)
    137  1.40.8.2  nathanw 		delay(1);
    138  1.40.8.2  nathanw 	return (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_REQ));
    139  1.40.8.2  nathanw }
    140  1.40.8.2  nathanw 
    141  1.40.8.2  nathanw extern __inline__ void ack_message()
    142  1.40.8.2  nathanw {
    143  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, 0);
    144  1.40.8.2  nathanw }
    145  1.40.8.2  nathanw 
    146  1.40.8.2  nathanw extern __inline__ void nack_message(SC_REQ *reqp, u_char msg)
    147  1.40.8.2  nathanw {
    148  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, SC_A_ATN);
    149  1.40.8.2  nathanw 	reqp->msgout = msg;
    150  1.40.8.2  nathanw }
    151  1.40.8.2  nathanw 
    152  1.40.8.2  nathanw extern __inline__ void finish_req(SC_REQ *reqp)
    153  1.40.8.2  nathanw {
    154  1.40.8.2  nathanw 	int			sps;
    155  1.40.8.2  nathanw 	struct scsipi_xfer	*xs = reqp->xs;
    156  1.40.8.2  nathanw 
    157  1.40.8.2  nathanw #ifdef REAL_DMA
    158  1.40.8.2  nathanw 	/*
    159  1.40.8.2  nathanw 	 * If we bounced, free the bounce buffer
    160  1.40.8.2  nathanw 	 */
    161  1.40.8.2  nathanw 	if (reqp->dr_flag & DRIVER_BOUNCING)
    162  1.40.8.2  nathanw 		free_bounceb(reqp->bounceb);
    163  1.40.8.2  nathanw #endif /* REAL_DMA */
    164  1.40.8.2  nathanw #ifdef DBG_REQ
    165  1.40.8.2  nathanw 	if (dbg_target_mask & (1 << reqp->targ_id))
    166  1.40.8.2  nathanw 		show_request(reqp, "DONE");
    167  1.40.8.2  nathanw #endif
    168  1.40.8.2  nathanw #ifdef DBG_ERR_RET
    169  1.40.8.2  nathanw 	if ((dbg_target_mask & (1 << reqp->targ_id)) && (reqp->xs->error != 0))
    170  1.40.8.2  nathanw 		show_request(reqp, "ERR_RET");
    171  1.40.8.2  nathanw #endif
    172  1.40.8.2  nathanw 	/*
    173  1.40.8.2  nathanw 	 * Return request to free-q
    174  1.40.8.2  nathanw 	 */
    175  1.40.8.2  nathanw 	sps = splbio();
    176  1.40.8.2  nathanw 	reqp->next = free_head;
    177  1.40.8.2  nathanw 	free_head  = reqp;
    178  1.40.8.2  nathanw 	splx(sps);
    179  1.40.8.2  nathanw 
    180  1.40.8.2  nathanw 	xs->xs_status |= XS_STS_DONE;
    181  1.40.8.2  nathanw 	if (!(reqp->dr_flag & DRIVER_LINKCHK))
    182  1.40.8.2  nathanw 		scsipi_done(xs);
    183  1.40.8.2  nathanw }
    184  1.40.8.2  nathanw 
    185  1.40.8.2  nathanw /*
    186  1.40.8.2  nathanw  * Auto config stuff....
    187  1.40.8.2  nathanw  */
    188  1.40.8.2  nathanw void	ncr_attach __P((struct device *, struct device *, void *));
    189  1.40.8.2  nathanw int	ncr_match __P((struct device *, struct cfdata *, void *));
    190  1.40.8.2  nathanw 
    191  1.40.8.2  nathanw /*
    192  1.40.8.2  nathanw  * Tricks to make driver-name configurable
    193  1.40.8.2  nathanw  */
    194  1.40.8.2  nathanw #define CFNAME(n)	__CONCAT(n,_cd)
    195  1.40.8.2  nathanw #define CANAME(n)	__CONCAT(n,_ca)
    196  1.40.8.2  nathanw #define CFSTRING(n)	__STRING(n)
    197  1.40.8.2  nathanw #define	CFDRNAME(n)	n
    198  1.40.8.2  nathanw 
    199  1.40.8.2  nathanw CFATTACH_DECL(CFDRNAME(DRNAME), sizeof(struct ncr_softc),
    200  1.40.8.2  nathanw     ncr_match, ncr_attach, NULL, NULL);
    201  1.40.8.2  nathanw 
    202  1.40.8.2  nathanw extern struct cfdriver CFNAME(DRNAME);
    203  1.40.8.2  nathanw 
    204  1.40.8.2  nathanw int
    205  1.40.8.2  nathanw ncr_match(pdp, cfp, auxp)
    206  1.40.8.2  nathanw struct device	*pdp;
    207  1.40.8.2  nathanw struct cfdata	*cfp;
    208  1.40.8.2  nathanw void		*auxp;
    209  1.40.8.2  nathanw {
    210  1.40.8.2  nathanw 	return (machine_match(pdp, cfp, auxp, &CFNAME(DRNAME)));
    211  1.40.8.2  nathanw }
    212  1.40.8.2  nathanw 
    213  1.40.8.2  nathanw void
    214  1.40.8.2  nathanw ncr_attach(pdp, dp, auxp)
    215  1.40.8.2  nathanw struct device	*pdp, *dp;
    216  1.40.8.2  nathanw void		*auxp;
    217  1.40.8.2  nathanw {
    218  1.40.8.2  nathanw 	struct ncr_softc	*sc;
    219  1.40.8.2  nathanw 	int			i;
    220  1.40.8.2  nathanw 
    221  1.40.8.2  nathanw 	sc = (struct ncr_softc *)dp;
    222  1.40.8.2  nathanw 
    223  1.40.8.2  nathanw 	sc->sc_adapter.adapt_dev = &sc->sc_dev;
    224  1.40.8.2  nathanw 	sc->sc_adapter.adapt_openings = 7;
    225  1.40.8.2  nathanw 	sc->sc_adapter.adapt_max_periph = 1;
    226  1.40.8.2  nathanw 	sc->sc_adapter.adapt_ioctl = NULL;
    227  1.40.8.2  nathanw 	sc->sc_adapter.adapt_minphys = ncr5380_minphys;
    228  1.40.8.2  nathanw 	sc->sc_adapter.adapt_request = ncr5380_scsi_request;
    229  1.40.8.2  nathanw 
    230  1.40.8.2  nathanw 	sc->sc_channel.chan_adapter = &sc->sc_adapter;
    231  1.40.8.2  nathanw 	sc->sc_channel.chan_bustype = &scsi_bustype;
    232  1.40.8.2  nathanw 	sc->sc_channel.chan_channel = 0;
    233  1.40.8.2  nathanw 	sc->sc_channel.chan_ntargets = 8;
    234  1.40.8.2  nathanw 	sc->sc_channel.chan_nluns = 8;
    235  1.40.8.2  nathanw 	sc->sc_channel.chan_id = 7;
    236  1.40.8.2  nathanw 
    237  1.40.8.2  nathanw 	/*
    238  1.40.8.2  nathanw 	 * bitmasks
    239  1.40.8.2  nathanw 	 */
    240  1.40.8.2  nathanw 	sc->sc_noselatn = 0;
    241  1.40.8.2  nathanw 	sc->sc_selected = 0;
    242  1.40.8.2  nathanw 
    243  1.40.8.2  nathanw 	/*
    244  1.40.8.2  nathanw 	 * Initialize machine-type specific things...
    245  1.40.8.2  nathanw 	 */
    246  1.40.8.2  nathanw 	scsi_mach_init(sc);
    247  1.40.8.2  nathanw 	printf("\n");
    248  1.40.8.2  nathanw 
    249  1.40.8.2  nathanw 	/*
    250  1.40.8.2  nathanw 	 * Initialize request queue freelist.
    251  1.40.8.2  nathanw 	 */
    252  1.40.8.2  nathanw 	for (i = 0; i < NREQ; i++) {
    253  1.40.8.2  nathanw 		req_queue[i].next = free_head;
    254  1.40.8.2  nathanw 		free_head = &req_queue[i];
    255  1.40.8.2  nathanw 	}
    256  1.40.8.2  nathanw 
    257  1.40.8.2  nathanw 	/*
    258  1.40.8.2  nathanw 	 * Initialize the host adapter
    259  1.40.8.2  nathanw 	 */
    260  1.40.8.2  nathanw 	scsi_idisable();
    261  1.40.8.2  nathanw 	ENABLE_NCR5380(sc);
    262  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, 0);
    263  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    264  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_TCOM, 0);
    265  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_IDSTAT, 0);
    266  1.40.8.2  nathanw 	scsi_ienable();
    267  1.40.8.2  nathanw 
    268  1.40.8.2  nathanw 	/*
    269  1.40.8.2  nathanw 	 * attach all scsi units on us
    270  1.40.8.2  nathanw 	 */
    271  1.40.8.2  nathanw 	config_found(dp, &sc->sc_channel, scsiprint);
    272  1.40.8.2  nathanw }
    273  1.40.8.2  nathanw 
    274  1.40.8.2  nathanw /*
    275  1.40.8.2  nathanw  * End of auto config stuff....
    276  1.40.8.2  nathanw  */
    277  1.40.8.2  nathanw 
    278  1.40.8.2  nathanw /*
    279  1.40.8.2  nathanw  * Carry out a request from the high level driver.
    280  1.40.8.2  nathanw  */
    281  1.40.8.2  nathanw static void
    282  1.40.8.2  nathanw ncr5380_scsi_request(chan, req, arg)
    283  1.40.8.2  nathanw 	struct scsipi_channel *chan;
    284  1.40.8.2  nathanw 	scsipi_adapter_req_t req;
    285  1.40.8.2  nathanw 	void *arg;
    286  1.40.8.2  nathanw {
    287  1.40.8.2  nathanw 	struct scsipi_xfer *xs;
    288  1.40.8.2  nathanw 	struct scsipi_periph *periph;
    289  1.40.8.2  nathanw 	struct ncr_softc *sc = (void *)chan->chan_adapter->adapt_dev;
    290  1.40.8.2  nathanw 	int	sps;
    291  1.40.8.2  nathanw 	SC_REQ	*reqp, *link, *tmp;
    292  1.40.8.2  nathanw 	int	flags;
    293  1.40.8.2  nathanw 
    294  1.40.8.2  nathanw 	switch (req) {
    295  1.40.8.2  nathanw 	case ADAPTER_REQ_RUN_XFER:
    296  1.40.8.2  nathanw 		xs = arg;
    297  1.40.8.2  nathanw 		periph = xs->xs_periph;
    298  1.40.8.2  nathanw 
    299  1.40.8.2  nathanw 		/*
    300  1.40.8.2  nathanw 		 * We do not queue RESET commands
    301  1.40.8.2  nathanw 		 */
    302  1.40.8.2  nathanw 		flags = xs->xs_control;
    303  1.40.8.2  nathanw 		if (flags & XS_CTL_RESET) {
    304  1.40.8.2  nathanw 			scsi_reset_verbose(sc, "Got reset-command");
    305  1.40.8.2  nathanw 			scsipi_done(xs);
    306  1.40.8.2  nathanw 			return;
    307  1.40.8.2  nathanw 		}
    308  1.40.8.2  nathanw 
    309  1.40.8.2  nathanw 		/*
    310  1.40.8.2  nathanw 		 * Get a request block
    311  1.40.8.2  nathanw 		 */
    312  1.40.8.2  nathanw 		sps = splbio();
    313  1.40.8.2  nathanw 		if ((reqp = free_head) == 0) {
    314  1.40.8.2  nathanw 			xs->error = XS_RESOURCE_SHORTAGE;
    315  1.40.8.2  nathanw 			scsipi_done(xs);
    316  1.40.8.2  nathanw 			splx(sps);
    317  1.40.8.2  nathanw 			return;
    318  1.40.8.2  nathanw 		}
    319  1.40.8.2  nathanw 		free_head  = reqp->next;
    320  1.40.8.2  nathanw 		reqp->next = NULL;
    321  1.40.8.2  nathanw 		splx(sps);
    322  1.40.8.2  nathanw 
    323  1.40.8.2  nathanw 		/*
    324  1.40.8.2  nathanw 		 * Initialize our private fields
    325  1.40.8.2  nathanw 		 */
    326  1.40.8.2  nathanw 		reqp->dr_flag   = (flags & XS_CTL_POLL) ? DRIVER_NOINT : 0;
    327  1.40.8.2  nathanw 		reqp->phase     = NR_PHASE;
    328  1.40.8.2  nathanw 		reqp->msgout    = MSG_NOOP;
    329  1.40.8.2  nathanw 		reqp->status    = SCSGOOD;
    330  1.40.8.2  nathanw 		reqp->message   = 0xff;
    331  1.40.8.2  nathanw 		reqp->link      = NULL;
    332  1.40.8.2  nathanw 		reqp->xs        = xs;
    333  1.40.8.2  nathanw 		reqp->targ_id   = xs->xs_periph->periph_target;
    334  1.40.8.2  nathanw 		reqp->targ_lun  = xs->xs_periph->periph_lun;
    335  1.40.8.2  nathanw 		reqp->xdata_ptr = (u_char*)xs->data;
    336  1.40.8.2  nathanw 		reqp->xdata_len = xs->datalen;
    337  1.40.8.2  nathanw 		memcpy(&reqp->xcmd, xs->cmd, sizeof(struct scsi_generic));
    338  1.40.8.2  nathanw 		reqp->xcmd.bytes[0] |= reqp->targ_lun << 5;
    339  1.40.8.2  nathanw 
    340  1.40.8.2  nathanw #ifdef REAL_DMA
    341  1.40.8.2  nathanw 		/*
    342  1.40.8.2  nathanw 		 * Check if DMA can be used on this request
    343  1.40.8.2  nathanw 		 */
    344  1.40.8.2  nathanw 		if (scsi_dmaok(reqp))
    345  1.40.8.2  nathanw 			reqp->dr_flag |= DRIVER_DMAOK;
    346  1.40.8.2  nathanw #endif /* REAL_DMA */
    347  1.40.8.2  nathanw 
    348  1.40.8.2  nathanw 		/*
    349  1.40.8.2  nathanw 		 * Insert the command into the issue queue. Note that
    350  1.40.8.2  nathanw 		 * 'REQUEST SENSE' commands are inserted at the head of the
    351  1.40.8.2  nathanw 		 * queue since any command will clear the existing contingent
    352  1.40.8.2  nathanw 		 * allegience condition and the sense data is only valid while
    353  1.40.8.2  nathanw 		 * the condition exists. When possible, link the command to a
    354  1.40.8.2  nathanw 		 * previous command to the same target. This is not very
    355  1.40.8.2  nathanw 		 * sensible when AUTO_SENSE is not defined! Interrupts are
    356  1.40.8.2  nathanw 		 * disabled while we are fiddling with the issue-queue.
    357  1.40.8.2  nathanw 		 */
    358  1.40.8.2  nathanw 		sps = splbio();
    359  1.40.8.2  nathanw 		link = NULL;
    360  1.40.8.2  nathanw 		if ((issue_q == NULL) || (reqp->xcmd.opcode == REQUEST_SENSE)) {
    361  1.40.8.2  nathanw 			reqp->next = issue_q;
    362  1.40.8.2  nathanw 			issue_q    = reqp;
    363  1.40.8.2  nathanw 		}
    364  1.40.8.2  nathanw 		else {
    365  1.40.8.2  nathanw 			tmp  = issue_q;
    366  1.40.8.2  nathanw 			do {
    367  1.40.8.2  nathanw 			    if (!link && (tmp->targ_id == reqp->targ_id) && !tmp->link)
    368  1.40.8.2  nathanw 					link = tmp;
    369  1.40.8.2  nathanw 			} while (tmp->next && (tmp = tmp->next));
    370  1.40.8.2  nathanw 			tmp->next = reqp;
    371  1.40.8.2  nathanw #ifdef AUTO_SENSE
    372  1.40.8.2  nathanw 			if (link && (ncr_will_link & (1<<reqp->targ_id))) {
    373  1.40.8.2  nathanw 				link->link = reqp;
    374  1.40.8.2  nathanw 				link->xcmd.bytes[link->xs->cmdlen-2] |= 1;
    375  1.40.8.2  nathanw 			}
    376  1.40.8.2  nathanw #endif
    377  1.40.8.2  nathanw 	}
    378  1.40.8.2  nathanw #ifdef AUTO_SENSE
    379  1.40.8.2  nathanw 		/*
    380  1.40.8.2  nathanw 		 * If we haven't already, check the target for link support.
    381  1.40.8.2  nathanw 		 * Do this by prefixing the current command with a dummy
    382  1.40.8.2  nathanw 		 * Request_Sense command, link the dummy to the current
    383  1.40.8.2  nathanw 		 * command, and insert the dummy command at the head of the
    384  1.40.8.2  nathanw 		 * issue queue.  Set the DRIVER_LINKCHK flag so that we'll
    385  1.40.8.2  nathanw 		 * ignore the results of the dummy command, since we only
    386  1.40.8.2  nathanw 		 * care about whether it was accepted or not.
    387  1.40.8.2  nathanw 		 */
    388  1.40.8.2  nathanw 		if (!link && !(ncr_test_link & (1<<reqp->targ_id)) &&
    389  1.40.8.2  nathanw 		    (tmp = free_head) && !(reqp->dr_flag & DRIVER_NOINT)) {
    390  1.40.8.2  nathanw 			free_head = tmp->next;
    391  1.40.8.2  nathanw 			tmp->dr_flag = (reqp->dr_flag & ~DRIVER_DMAOK) | DRIVER_LINKCHK;
    392  1.40.8.2  nathanw 			tmp->phase = NR_PHASE;
    393  1.40.8.2  nathanw 			tmp->msgout = MSG_NOOP;
    394  1.40.8.2  nathanw 			tmp->status = SCSGOOD;
    395  1.40.8.2  nathanw 			tmp->xs = reqp->xs;
    396  1.40.8.2  nathanw 			tmp->targ_id = reqp->targ_id;
    397  1.40.8.2  nathanw 			tmp->targ_lun = reqp->targ_lun;
    398  1.40.8.2  nathanw 			bcopy(sense_cmd, &tmp->xcmd, sizeof(sense_cmd));
    399  1.40.8.2  nathanw 			tmp->xdata_ptr = (u_char *)&tmp->xs->sense.scsi_sense;
    400  1.40.8.2  nathanw 			tmp->xdata_len = sizeof(tmp->xs->sense.scsi_sense);
    401  1.40.8.2  nathanw 			ncr_test_link |= 1<<tmp->targ_id;
    402  1.40.8.2  nathanw 			tmp->link = reqp;
    403  1.40.8.2  nathanw 			tmp->xcmd.bytes[sizeof(sense_cmd)-2] |= 1;
    404  1.40.8.2  nathanw 			tmp->next = issue_q;
    405  1.40.8.2  nathanw 			issue_q = tmp;
    406  1.40.8.2  nathanw #ifdef DBG_REQ
    407  1.40.8.2  nathanw 			if (dbg_target_mask & (1 << tmp->targ_id))
    408  1.40.8.2  nathanw 				show_request(tmp, "LINKCHK");
    409  1.40.8.2  nathanw #endif
    410  1.40.8.2  nathanw 		}
    411  1.40.8.2  nathanw #endif
    412  1.40.8.2  nathanw 		splx(sps);
    413  1.40.8.2  nathanw 
    414  1.40.8.2  nathanw #ifdef DBG_REQ
    415  1.40.8.2  nathanw 		if (dbg_target_mask & (1 << reqp->targ_id))
    416  1.40.8.2  nathanw 			show_request(reqp, (reqp->xcmd.opcode == REQUEST_SENSE) ?
    417  1.40.8.2  nathanw 								"HEAD":"TAIL");
    418  1.40.8.2  nathanw #endif
    419  1.40.8.2  nathanw 
    420  1.40.8.2  nathanw 		run_main(sc);
    421  1.40.8.2  nathanw 		return;
    422  1.40.8.2  nathanw 
    423  1.40.8.2  nathanw 	case ADAPTER_REQ_GROW_RESOURCES:
    424  1.40.8.2  nathanw 		/* XXX Not supported. */
    425  1.40.8.2  nathanw 		return;
    426  1.40.8.2  nathanw 
    427  1.40.8.2  nathanw 	case ADAPTER_REQ_SET_XFER_MODE:
    428  1.40.8.2  nathanw 		/* XXX Not supported. */
    429  1.40.8.2  nathanw 		return;
    430  1.40.8.2  nathanw 	}
    431  1.40.8.2  nathanw }
    432  1.40.8.2  nathanw 
    433  1.40.8.2  nathanw static void
    434  1.40.8.2  nathanw ncr5380_minphys(struct buf *bp)
    435  1.40.8.2  nathanw {
    436  1.40.8.2  nathanw     if (bp->b_bcount > MIN_PHYS)
    437  1.40.8.2  nathanw 	bp->b_bcount = MIN_PHYS;
    438  1.40.8.2  nathanw     minphys(bp);
    439  1.40.8.2  nathanw }
    440  1.40.8.2  nathanw #undef MIN_PHYS
    441  1.40.8.2  nathanw 
    442  1.40.8.2  nathanw static void
    443  1.40.8.2  nathanw ncr5380_show_scsi_cmd(struct scsipi_xfer *xs)
    444  1.40.8.2  nathanw {
    445  1.40.8.2  nathanw 	u_char	*b = (u_char *) xs->cmd;
    446  1.40.8.2  nathanw 	int	i  = 0;
    447  1.40.8.2  nathanw 
    448  1.40.8.2  nathanw 	scsipi_printaddr(xs->xs_periph);
    449  1.40.8.2  nathanw 	if (!(xs->xs_control & XS_CTL_RESET)) {
    450  1.40.8.2  nathanw 		while (i < xs->cmdlen) {
    451  1.40.8.2  nathanw 			if (i)
    452  1.40.8.2  nathanw 				printf(",");
    453  1.40.8.2  nathanw 			printf("%x",b[i++]);
    454  1.40.8.2  nathanw 		}
    455  1.40.8.2  nathanw 		printf("-\n");
    456  1.40.8.2  nathanw 	}
    457  1.40.8.2  nathanw 	else {
    458  1.40.8.2  nathanw 
    459  1.40.8.2  nathanw 		printf("-RESET-\n");
    460  1.40.8.2  nathanw 	}
    461  1.40.8.2  nathanw }
    462  1.40.8.2  nathanw 
    463  1.40.8.2  nathanw /*
    464  1.40.8.2  nathanw  * The body of the driver.
    465  1.40.8.2  nathanw  */
    466  1.40.8.2  nathanw static void
    467  1.40.8.2  nathanw scsi_main(sc)
    468  1.40.8.2  nathanw struct ncr_softc *sc;
    469  1.40.8.2  nathanw {
    470  1.40.8.2  nathanw 	SC_REQ	*req, *prev;
    471  1.40.8.2  nathanw 	int	itype;
    472  1.40.8.2  nathanw 	int	sps;
    473  1.40.8.2  nathanw 
    474  1.40.8.2  nathanw 	/*
    475  1.40.8.2  nathanw 	 * While running in the driver SCSI-interrupts are disabled.
    476  1.40.8.2  nathanw 	 */
    477  1.40.8.2  nathanw 	scsi_idisable();
    478  1.40.8.2  nathanw 	ENABLE_NCR5380(sc);
    479  1.40.8.2  nathanw 
    480  1.40.8.2  nathanw 	PID("scsi_main1");
    481  1.40.8.2  nathanw 	for (;;) {
    482  1.40.8.2  nathanw 	    sps = splbio();
    483  1.40.8.2  nathanw 	    if (!connected) {
    484  1.40.8.2  nathanw 		/*
    485  1.40.8.2  nathanw 		 * Check if it is fair keep any exclusive access to DMA
    486  1.40.8.2  nathanw 		 * claimed. If not, stop queueing new jobs so the discon_q
    487  1.40.8.2  nathanw 		 * will be eventually drained and DMA can be given up.
    488  1.40.8.2  nathanw 		 */
    489  1.40.8.2  nathanw 		if (!fair_to_keep_dma())
    490  1.40.8.2  nathanw 			goto main_exit;
    491  1.40.8.2  nathanw 
    492  1.40.8.2  nathanw 		/*
    493  1.40.8.2  nathanw 		 * Search through the issue-queue for a command
    494  1.40.8.2  nathanw 		 * destined for a target that isn't busy.
    495  1.40.8.2  nathanw 		 */
    496  1.40.8.2  nathanw 		prev = NULL;
    497  1.40.8.2  nathanw 		for (req=issue_q; req != NULL; prev = req, req = req->next) {
    498  1.40.8.2  nathanw 			if (!(busy & (1 << req->targ_id))) {
    499  1.40.8.2  nathanw 				/*
    500  1.40.8.2  nathanw 				 * Found one, remove it from the issue queue
    501  1.40.8.2  nathanw 				 */
    502  1.40.8.2  nathanw 				if (prev == NULL)
    503  1.40.8.2  nathanw 					issue_q = req->next;
    504  1.40.8.2  nathanw 				else prev->next = req->next;
    505  1.40.8.2  nathanw 				req->next = NULL;
    506  1.40.8.2  nathanw 				break;
    507  1.40.8.2  nathanw 			}
    508  1.40.8.2  nathanw 		}
    509  1.40.8.2  nathanw 
    510  1.40.8.2  nathanw 		/*
    511  1.40.8.2  nathanw 		 * When a request has just ended, we get here before an other
    512  1.40.8.2  nathanw 		 * device detects that the bus is free and that it can
    513  1.40.8.2  nathanw 		 * reconnect. The problem is that when this happens, we always
    514  1.40.8.2  nathanw 		 * baffle the device because our (initiator) id is higher. This
    515  1.40.8.2  nathanw 		 * can cause a sort of starvation on slow devices. So we check
    516  1.40.8.2  nathanw 		 * for a pending reselection here.
    517  1.40.8.2  nathanw 		 * Note that 'connected' will be non-null if the reselection
    518  1.40.8.2  nathanw 		 * succeeds.
    519  1.40.8.2  nathanw 		 */
    520  1.40.8.2  nathanw 		if ((GET_5380_REG(NCR5380_IDSTAT) & (SC_S_SEL|SC_S_IO))
    521  1.40.8.2  nathanw 						== (SC_S_SEL|SC_S_IO)){
    522  1.40.8.2  nathanw 			if (req != NULL) {
    523  1.40.8.2  nathanw 				req->next = issue_q;
    524  1.40.8.2  nathanw 				issue_q = req;
    525  1.40.8.2  nathanw 			}
    526  1.40.8.2  nathanw 			splx(sps);
    527  1.40.8.2  nathanw 
    528  1.40.8.2  nathanw 			reselect(sc);
    529  1.40.8.2  nathanw 			scsi_clr_ipend();
    530  1.40.8.2  nathanw 			goto connected;
    531  1.40.8.2  nathanw 		}
    532  1.40.8.2  nathanw 
    533  1.40.8.2  nathanw 		/*
    534  1.40.8.2  nathanw 		 * The host is not connected and there is no request
    535  1.40.8.2  nathanw 		 * pending, exit.
    536  1.40.8.2  nathanw 		 */
    537  1.40.8.2  nathanw 		if (req == NULL) {
    538  1.40.8.2  nathanw 			PID("scsi_main2");
    539  1.40.8.2  nathanw 			goto main_exit;
    540  1.40.8.2  nathanw 		}
    541  1.40.8.2  nathanw 
    542  1.40.8.2  nathanw 		/*
    543  1.40.8.2  nathanw 		 * Re-enable interrupts before handling the request.
    544  1.40.8.2  nathanw 		 */
    545  1.40.8.2  nathanw 		splx(sps);
    546  1.40.8.2  nathanw 
    547  1.40.8.2  nathanw #ifdef DBG_REQ
    548  1.40.8.2  nathanw 		if (dbg_target_mask & (1 << req->targ_id))
    549  1.40.8.2  nathanw 			show_request(req, "TARGET");
    550  1.40.8.2  nathanw #endif
    551  1.40.8.2  nathanw 		/*
    552  1.40.8.2  nathanw 		 * We found a request. Try to connect to the target. If the
    553  1.40.8.2  nathanw 		 * initiator fails arbitration, the command is put back in the
    554  1.40.8.2  nathanw 		 * issue queue.
    555  1.40.8.2  nathanw 		 */
    556  1.40.8.2  nathanw 		if (scsi_select(req, 0)) {
    557  1.40.8.2  nathanw 			sps = splbio();
    558  1.40.8.2  nathanw 			req->next = issue_q;
    559  1.40.8.2  nathanw 			issue_q = req;
    560  1.40.8.2  nathanw 			splx(sps);
    561  1.40.8.2  nathanw #ifdef DBG_REQ
    562  1.40.8.2  nathanw 			if (dbg_target_mask & (1 << req->targ_id))
    563  1.40.8.2  nathanw 				ncr_tprint(req, "Select failed\n");
    564  1.40.8.2  nathanw #endif
    565  1.40.8.2  nathanw 		}
    566  1.40.8.2  nathanw 	    }
    567  1.40.8.2  nathanw 	    else splx(sps);
    568  1.40.8.2  nathanw connected:
    569  1.40.8.2  nathanw 	    if (connected) {
    570  1.40.8.2  nathanw 		/*
    571  1.40.8.2  nathanw 		 * If the host is currently connected but a 'real-dma' transfer
    572  1.40.8.2  nathanw 		 * is in progress, the 'end-of-dma' interrupt restarts main.
    573  1.40.8.2  nathanw 		 * So quit.
    574  1.40.8.2  nathanw 		 */
    575  1.40.8.2  nathanw 		sps = splbio();
    576  1.40.8.2  nathanw 		if (connected && (connected->dr_flag & DRIVER_IN_DMA)) {
    577  1.40.8.2  nathanw 			PID("scsi_main3");
    578  1.40.8.2  nathanw 			goto main_exit;
    579  1.40.8.2  nathanw 		}
    580  1.40.8.2  nathanw 		splx(sps);
    581  1.40.8.2  nathanw 
    582  1.40.8.2  nathanw 		/*
    583  1.40.8.2  nathanw 		 * Let the target guide us through the bus-phases
    584  1.40.8.2  nathanw 		 */
    585  1.40.8.2  nathanw 		while (information_transfer(sc) == -1)
    586  1.40.8.2  nathanw 			;
    587  1.40.8.2  nathanw 	    }
    588  1.40.8.2  nathanw 	}
    589  1.40.8.2  nathanw 	/* NEVER TO REACH HERE */
    590  1.40.8.2  nathanw 	show_phase(NULL, 0);	/* XXX: Get rid of not used warning */
    591  1.40.8.2  nathanw 	panic("ncr5380-SCSI: not designed to come here");
    592  1.40.8.2  nathanw 
    593  1.40.8.2  nathanw main_exit:
    594  1.40.8.2  nathanw 	/*
    595  1.40.8.2  nathanw 	 * We enter here with interrupts disabled. We are about to exit main
    596  1.40.8.2  nathanw 	 * so interrupts should be re-enabled. Because interrupts are edge
    597  1.40.8.2  nathanw 	 * triggered, we could already have missed the interrupt. Therefore
    598  1.40.8.2  nathanw 	 * we check the IRQ-line here and re-enter when we really missed a
    599  1.40.8.2  nathanw 	 * valid interrupt.
    600  1.40.8.2  nathanw 	 */
    601  1.40.8.2  nathanw 	PID("scsi_main4");
    602  1.40.8.2  nathanw 	scsi_ienable();
    603  1.40.8.2  nathanw 
    604  1.40.8.2  nathanw 	/*
    605  1.40.8.2  nathanw 	 * If we're not currently connected, enable reselection
    606  1.40.8.2  nathanw 	 * interrupts.
    607  1.40.8.2  nathanw 	 */
    608  1.40.8.2  nathanw 	if (!connected)
    609  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_IDSTAT, SC_HOST_ID);
    610  1.40.8.2  nathanw 
    611  1.40.8.2  nathanw 	if (scsi_ipending()) {
    612  1.40.8.2  nathanw 		if ((itype = check_intr(sc)) != INTR_SPURIOUS) {
    613  1.40.8.2  nathanw 			scsi_idisable();
    614  1.40.8.2  nathanw 			scsi_clr_ipend();
    615  1.40.8.2  nathanw 			splx(sps);
    616  1.40.8.2  nathanw 
    617  1.40.8.2  nathanw 			if (itype == INTR_RESEL)
    618  1.40.8.2  nathanw 				reselect(sc);
    619  1.40.8.2  nathanw #ifdef REAL_DMA
    620  1.40.8.2  nathanw 			else dma_ready();
    621  1.40.8.2  nathanw #else
    622  1.40.8.2  nathanw 			else {
    623  1.40.8.2  nathanw 				if (pdma_ready())
    624  1.40.8.2  nathanw 					goto connected;
    625  1.40.8.2  nathanw 				panic("Got DMA interrupt without DMA");
    626  1.40.8.2  nathanw 			}
    627  1.40.8.2  nathanw #endif
    628  1.40.8.2  nathanw 			goto connected;
    629  1.40.8.2  nathanw 		}
    630  1.40.8.2  nathanw 	}
    631  1.40.8.2  nathanw 	reconsider_dma();
    632  1.40.8.2  nathanw 	main_running = 0;
    633  1.40.8.2  nathanw 	splx(sps);
    634  1.40.8.2  nathanw 	PID("scsi_main5");
    635  1.40.8.2  nathanw }
    636  1.40.8.2  nathanw 
    637  1.40.8.2  nathanw #ifdef REAL_DMA
    638  1.40.8.2  nathanw /*
    639  1.40.8.2  nathanw  * The SCSI-DMA interrupt.
    640  1.40.8.2  nathanw  * This interrupt can only be triggered when running in non-polled DMA
    641  1.40.8.2  nathanw  * mode. When DMA is not active, it will be silently ignored, it is usually
    642  1.40.8.2  nathanw  * to late because the EOP interrupt of the controller happens just a tiny
    643  1.40.8.2  nathanw  * bit earlier. It might become usefull when scatter/gather is implemented,
    644  1.40.8.2  nathanw  * because in that case only part of the DATAIN/DATAOUT transfer is taken
    645  1.40.8.2  nathanw  * out of a single buffer.
    646  1.40.8.2  nathanw  */
    647  1.40.8.2  nathanw static void
    648  1.40.8.2  nathanw ncr_dma_intr(sc)
    649  1.40.8.2  nathanw struct ncr_softc *sc;
    650  1.40.8.2  nathanw {
    651  1.40.8.2  nathanw 	SC_REQ	*reqp;
    652  1.40.8.2  nathanw 	int	dma_done;
    653  1.40.8.2  nathanw 
    654  1.40.8.2  nathanw 	PID("ncr_dma_intr");
    655  1.40.8.2  nathanw 	if ((reqp = connected) && (reqp->dr_flag & DRIVER_IN_DMA)) {
    656  1.40.8.2  nathanw 		scsi_idisable();
    657  1.40.8.2  nathanw 		if (!(dma_done = dma_ready())) {
    658  1.40.8.2  nathanw 			transfer_dma(reqp, reqp->phase, 0);
    659  1.40.8.2  nathanw 			return;
    660  1.40.8.2  nathanw 		}
    661  1.40.8.2  nathanw 		run_main(sc);
    662  1.40.8.2  nathanw 	}
    663  1.40.8.2  nathanw }
    664  1.40.8.2  nathanw #endif /* REAL_DMA */
    665  1.40.8.2  nathanw 
    666  1.40.8.2  nathanw /*
    667  1.40.8.2  nathanw  * The SCSI-controller interrupt. This interrupt occurs on reselections and
    668  1.40.8.2  nathanw  * at the end of non-polled DMA-interrupts. It is assumed to be called from
    669  1.40.8.2  nathanw  * the machine-dependent hardware interrupt.
    670  1.40.8.2  nathanw  */
    671  1.40.8.2  nathanw static void
    672  1.40.8.2  nathanw ncr_ctrl_intr(sc)
    673  1.40.8.2  nathanw struct ncr_softc *sc;
    674  1.40.8.2  nathanw {
    675  1.40.8.2  nathanw 	int	itype;
    676  1.40.8.2  nathanw 
    677  1.40.8.2  nathanw 	if (main_running)
    678  1.40.8.2  nathanw 		return; /* scsi_main() should handle this one */
    679  1.40.8.2  nathanw 
    680  1.40.8.2  nathanw 	while (scsi_ipending()) {
    681  1.40.8.2  nathanw 		scsi_idisable();
    682  1.40.8.2  nathanw 		if ((itype = check_intr(sc)) != INTR_SPURIOUS) {
    683  1.40.8.2  nathanw 			if (itype == INTR_RESEL)
    684  1.40.8.2  nathanw 				reselect(sc);
    685  1.40.8.2  nathanw 			else {
    686  1.40.8.2  nathanw #ifdef REAL_DMA
    687  1.40.8.2  nathanw 			    int	dma_done;
    688  1.40.8.2  nathanw 			    if (!(dma_done = dma_ready())) {
    689  1.40.8.2  nathanw 				transfer_dma(connected, connected->phase, 0);
    690  1.40.8.2  nathanw 				return;
    691  1.40.8.2  nathanw 			    }
    692  1.40.8.2  nathanw #else
    693  1.40.8.2  nathanw 			    if (pdma_ready())
    694  1.40.8.2  nathanw 				return;
    695  1.40.8.2  nathanw 			    panic("Got DMA interrupt without DMA");
    696  1.40.8.2  nathanw #endif
    697  1.40.8.2  nathanw 			}
    698  1.40.8.2  nathanw 			scsi_clr_ipend();
    699  1.40.8.2  nathanw 		}
    700  1.40.8.2  nathanw 		run_main(sc);
    701  1.40.8.2  nathanw 		return;
    702  1.40.8.2  nathanw 	}
    703  1.40.8.2  nathanw 	PID("ncr_ctrl_intr1");
    704  1.40.8.2  nathanw }
    705  1.40.8.2  nathanw 
    706  1.40.8.2  nathanw /*
    707  1.40.8.2  nathanw  * Initiate a connection path between the host and the target. The function
    708  1.40.8.2  nathanw  * first goes into arbitration for the SCSI-bus. When this succeeds, the target
    709  1.40.8.2  nathanw  * is selected and an 'IDENTIFY' message is send.
    710  1.40.8.2  nathanw  * Returns -1 when the arbitration failed. Otherwise 0 is returned. When
    711  1.40.8.2  nathanw  * the target does not respond (to either selection or 'MESSAGE OUT') the
    712  1.40.8.2  nathanw  * 'done' function is executed.
    713  1.40.8.2  nathanw  * The result code given by the driver can be influenced by setting 'code'
    714  1.40.8.2  nathanw  * to a non-zero value. This is the case when 'select' is called by abort.
    715  1.40.8.2  nathanw  */
    716  1.40.8.2  nathanw static int
    717  1.40.8.2  nathanw scsi_select(reqp, code)
    718  1.40.8.2  nathanw SC_REQ	*reqp;
    719  1.40.8.2  nathanw int	code;
    720  1.40.8.2  nathanw {
    721  1.40.8.2  nathanw 	u_char			tmp[1];
    722  1.40.8.2  nathanw 	u_char			phase;
    723  1.40.8.2  nathanw 	u_long			cnt;
    724  1.40.8.2  nathanw 	int			sps;
    725  1.40.8.2  nathanw 	u_int8_t		atn_flag;
    726  1.40.8.2  nathanw 	u_int8_t		targ_bit;
    727  1.40.8.2  nathanw 	struct ncr_softc	*sc;
    728  1.40.8.2  nathanw 
    729  1.40.8.2  nathanw 	sc = (void*)reqp->xs->xs_periph->periph_channel->chan_adapter->adapt_dev;
    730  1.40.8.2  nathanw 	DBG_SELPRINT ("Starting arbitration\n", 0);
    731  1.40.8.2  nathanw 	PID("scsi_select1");
    732  1.40.8.2  nathanw 
    733  1.40.8.2  nathanw 	sps = splbio();
    734  1.40.8.2  nathanw 
    735  1.40.8.2  nathanw 	/*
    736  1.40.8.2  nathanw 	 * Prevent a race condition here. If a reslection interrupt occurred
    737  1.40.8.2  nathanw 	 * between the decision to pick a new request and the call to select,
    738  1.40.8.2  nathanw 	 * we abort the selection.
    739  1.40.8.2  nathanw 	 * Interrupts are lowered when the 5380 is setup to arbitrate for the
    740  1.40.8.2  nathanw 	 * bus.
    741  1.40.8.2  nathanw 	 */
    742  1.40.8.2  nathanw 	if (connected) {
    743  1.40.8.2  nathanw 		splx(sps);
    744  1.40.8.2  nathanw 		PID("scsi_select2");
    745  1.40.8.2  nathanw 		return (-1);
    746  1.40.8.2  nathanw 	}
    747  1.40.8.2  nathanw 
    748  1.40.8.2  nathanw 	/*
    749  1.40.8.2  nathanw 	 * Set phase bits to 0, otherwise the 5380 won't drive the bus during
    750  1.40.8.2  nathanw 	 * selection.
    751  1.40.8.2  nathanw 	 */
    752  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_TCOM, 0);
    753  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, 0);
    754  1.40.8.2  nathanw 
    755  1.40.8.2  nathanw 	/*
    756  1.40.8.2  nathanw 	 * Arbitrate for the bus.
    757  1.40.8.2  nathanw 	 */
    758  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_DATA, SC_HOST_ID);
    759  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_MODE, SC_ARBIT);
    760  1.40.8.2  nathanw 
    761  1.40.8.2  nathanw 	splx(sps);
    762  1.40.8.2  nathanw 
    763  1.40.8.2  nathanw 	cnt = 10;
    764  1.40.8.2  nathanw 	while (!(GET_5380_REG(NCR5380_ICOM) & SC_AIP) && --cnt)
    765  1.40.8.2  nathanw 		delay(1);
    766  1.40.8.2  nathanw 
    767  1.40.8.2  nathanw 	if (!(GET_5380_REG(NCR5380_ICOM) & SC_AIP)) {
    768  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    769  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
    770  1.40.8.2  nathanw 		DBG_SELPRINT ("Arbitration lost, bus not free\n",0);
    771  1.40.8.2  nathanw 		PID("scsi_select3");
    772  1.40.8.2  nathanw 		return (-1);
    773  1.40.8.2  nathanw 	}
    774  1.40.8.2  nathanw 
    775  1.40.8.2  nathanw 	/* The arbitration delay is 2.2 usecs */
    776  1.40.8.2  nathanw 	delay(3);
    777  1.40.8.2  nathanw 
    778  1.40.8.2  nathanw 	/*
    779  1.40.8.2  nathanw 	 * Check the result of the arbitration. If we failed, return -1.
    780  1.40.8.2  nathanw 	 */
    781  1.40.8.2  nathanw 	if (GET_5380_REG(NCR5380_ICOM) & SC_LA) {
    782  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    783  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
    784  1.40.8.2  nathanw 		PID("scsi_select4");
    785  1.40.8.2  nathanw 		return (-1);
    786  1.40.8.2  nathanw 	}
    787  1.40.8.2  nathanw 
    788  1.40.8.2  nathanw 	/*
    789  1.40.8.2  nathanw 	 * The spec requires that we should read the data register to
    790  1.40.8.2  nathanw 	 * check for higher id's and check the SC_LA again.
    791  1.40.8.2  nathanw 	 */
    792  1.40.8.2  nathanw 	tmp[0] = GET_5380_REG(NCR5380_DATA);
    793  1.40.8.2  nathanw 	if (tmp[0] & ~((SC_HOST_ID << 1) - 1)) {
    794  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    795  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
    796  1.40.8.2  nathanw 		DBG_SELPRINT ("Arbitration lost, higher id present\n",0);
    797  1.40.8.2  nathanw 		PID("scsi_select5");
    798  1.40.8.2  nathanw 		return (-1);
    799  1.40.8.2  nathanw 	}
    800  1.40.8.2  nathanw 	if (GET_5380_REG(NCR5380_ICOM) & SC_LA) {
    801  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    802  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
    803  1.40.8.2  nathanw 		DBG_SELPRINT ("Arbitration lost,deassert SC_ARBIT\n",0);
    804  1.40.8.2  nathanw 		PID("scsi_select6");
    805  1.40.8.2  nathanw 		return (-1);
    806  1.40.8.2  nathanw 	}
    807  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, SC_A_SEL | SC_A_BSY);
    808  1.40.8.2  nathanw 	if (GET_5380_REG(NCR5380_ICOM) & SC_LA) {
    809  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    810  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
    811  1.40.8.2  nathanw 		DBG_SELPRINT ("Arbitration lost, deassert SC_A_SEL\n", 0);
    812  1.40.8.2  nathanw 		PID("scsi_select7");
    813  1.40.8.2  nathanw 		return (-1);
    814  1.40.8.2  nathanw 	}
    815  1.40.8.2  nathanw 	/* Bus settle delay + Bus clear delay = 1.2 usecs */
    816  1.40.8.2  nathanw 	delay(2);
    817  1.40.8.2  nathanw 	DBG_SELPRINT ("Arbitration complete\n", 0);
    818  1.40.8.2  nathanw 
    819  1.40.8.2  nathanw 	/*
    820  1.40.8.2  nathanw 	 * Now that we won the arbitration, start the selection.
    821  1.40.8.2  nathanw 	 */
    822  1.40.8.2  nathanw 	targ_bit = 1 << reqp->targ_id;
    823  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_DATA, SC_HOST_ID | targ_bit);
    824  1.40.8.2  nathanw 
    825  1.40.8.2  nathanw 	if (sc->sc_noselatn & targ_bit)
    826  1.40.8.2  nathanw 		atn_flag = 0;
    827  1.40.8.2  nathanw 	else
    828  1.40.8.2  nathanw 		atn_flag = SC_A_ATN;
    829  1.40.8.2  nathanw 
    830  1.40.8.2  nathanw 	/*
    831  1.40.8.2  nathanw 	 * Raise ATN while SEL is true before BSY goes false from arbitration,
    832  1.40.8.2  nathanw 	 * since this is the only way to guarantee that we'll get a MESSAGE OUT
    833  1.40.8.2  nathanw 	 * phase immediately after the selection.
    834  1.40.8.2  nathanw 	 */
    835  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, SC_A_BSY | SC_A_SEL | atn_flag | SC_ADTB);
    836  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_MODE, IMODE_BASE);
    837  1.40.8.2  nathanw 
    838  1.40.8.2  nathanw 	/*
    839  1.40.8.2  nathanw 	 * Turn off reselection interrupts
    840  1.40.8.2  nathanw 	 */
    841  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_IDSTAT, 0);
    842  1.40.8.2  nathanw 
    843  1.40.8.2  nathanw 	/*
    844  1.40.8.2  nathanw 	 * Reset BSY. The delay following it, surpresses a glitch in the
    845  1.40.8.2  nathanw 	 * 5380 which causes us to see our own BSY signal instead of that of
    846  1.40.8.2  nathanw 	 * the target.
    847  1.40.8.2  nathanw 	 */
    848  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, SC_A_SEL | atn_flag | SC_ADTB);
    849  1.40.8.2  nathanw 	delay(1);
    850  1.40.8.2  nathanw 
    851  1.40.8.2  nathanw 	/*
    852  1.40.8.2  nathanw 	 * Wait for the target to react, the specs call for a timeout of
    853  1.40.8.2  nathanw 	 * 250 ms.
    854  1.40.8.2  nathanw 	 */
    855  1.40.8.2  nathanw 	cnt = 25000;
    856  1.40.8.2  nathanw 	while (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY) && --cnt)
    857  1.40.8.2  nathanw 		delay(10);
    858  1.40.8.2  nathanw 
    859  1.40.8.2  nathanw 	if (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY)) {
    860  1.40.8.2  nathanw 		/*
    861  1.40.8.2  nathanw 		 * There is no reaction from the target, start the selection
    862  1.40.8.2  nathanw 		 * timeout procedure. We release the databus but keep SEL
    863  1.40.8.2  nathanw 		 * asserted. After that we wait a 'selection abort time' (200
    864  1.40.8.2  nathanw 		 * usecs) and 2 deskew delays (90 ns) and check BSY again.
    865  1.40.8.2  nathanw 		 * When BSY is asserted, we assume the selection succeeded,
    866  1.40.8.2  nathanw 		 * otherwise we release the bus.
    867  1.40.8.2  nathanw 		 */
    868  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, SC_A_SEL | atn_flag);
    869  1.40.8.2  nathanw 		delay(201);
    870  1.40.8.2  nathanw 		if (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY)) {
    871  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, 0);
    872  1.40.8.2  nathanw 			reqp->xs->error      = code ? code : XS_SELTIMEOUT;
    873  1.40.8.2  nathanw 			DBG_SELPRINT ("Target %d not responding to sel\n",
    874  1.40.8.2  nathanw 								reqp->targ_id);
    875  1.40.8.2  nathanw 			if (reqp->dr_flag & DRIVER_LINKCHK)
    876  1.40.8.2  nathanw 				ncr_test_link &= ~(1<<reqp->targ_id);
    877  1.40.8.2  nathanw 			finish_req(reqp);
    878  1.40.8.2  nathanw 			PID("scsi_select8");
    879  1.40.8.2  nathanw 			return (0);
    880  1.40.8.2  nathanw 		}
    881  1.40.8.2  nathanw 	}
    882  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, atn_flag);
    883  1.40.8.2  nathanw 
    884  1.40.8.2  nathanw 	DBG_SELPRINT ("Target %d responding to select.\n", reqp->targ_id);
    885  1.40.8.2  nathanw 
    886  1.40.8.2  nathanw 	/*
    887  1.40.8.2  nathanw 	 * The SCSI-interrupts are disabled while a request is being handled.
    888  1.40.8.2  nathanw 	 */
    889  1.40.8.2  nathanw 	scsi_idisable();
    890  1.40.8.2  nathanw 
    891  1.40.8.2  nathanw 	/*
    892  1.40.8.2  nathanw 	 * If we did not request ATN, then don't try to send IDENTIFY.
    893  1.40.8.2  nathanw 	 */
    894  1.40.8.2  nathanw 	if (atn_flag == 0) {
    895  1.40.8.2  nathanw 		reqp->phase = PH_CMD;
    896  1.40.8.2  nathanw 		goto identify_failed;
    897  1.40.8.2  nathanw 	}
    898  1.40.8.2  nathanw 
    899  1.40.8.2  nathanw 	/*
    900  1.40.8.2  nathanw 	 * Here we prepare to send an 'IDENTIFY' message.
    901  1.40.8.2  nathanw 	 * Allow disconnect only when interrups are allowed.
    902  1.40.8.2  nathanw 	 */
    903  1.40.8.2  nathanw 	tmp[0] = MSG_IDENTIFY(reqp->targ_lun,
    904  1.40.8.2  nathanw 			(reqp->dr_flag & DRIVER_NOINT) ? 0 : 1);
    905  1.40.8.2  nathanw 	cnt    = 1;
    906  1.40.8.2  nathanw 	phase  = PH_MSGOUT;
    907  1.40.8.2  nathanw 
    908  1.40.8.2  nathanw 	/*
    909  1.40.8.2  nathanw 	 * Since we followed the SCSI-spec and raised ATN while SEL was true
    910  1.40.8.2  nathanw 	 * but before BSY was false during the selection, a 'MESSAGE OUT'
    911  1.40.8.2  nathanw 	 * phase should follow.  Unfortunately, this does not happen on
    912  1.40.8.2  nathanw 	 * all targets (Asante ethernet devices, for example), so we must
    913  1.40.8.2  nathanw 	 * check the actual mode if the message transfer fails--if the
    914  1.40.8.2  nathanw 	 * new phase is PH_CMD and has never been successfully selected
    915  1.40.8.2  nathanw 	 * w/ATN in the past, then we assume that it is an old device
    916  1.40.8.2  nathanw 	 * that doesn't support select w/ATN.
    917  1.40.8.2  nathanw 	 */
    918  1.40.8.2  nathanw 	if (transfer_pio(&phase, tmp, &cnt, 0) || cnt) {
    919  1.40.8.2  nathanw 
    920  1.40.8.2  nathanw 		if ((phase == PH_CMD) && !(sc->sc_selected & targ_bit)) {
    921  1.40.8.2  nathanw 			DBG_SELPRINT ("Target %d: not responding to ATN.\n",
    922  1.40.8.2  nathanw 							reqp->targ_id);
    923  1.40.8.2  nathanw 			sc->sc_noselatn |= targ_bit;
    924  1.40.8.2  nathanw 			reqp->phase = PH_CMD;
    925  1.40.8.2  nathanw 			goto identify_failed;
    926  1.40.8.2  nathanw 		}
    927  1.40.8.2  nathanw 
    928  1.40.8.2  nathanw 		DBG_SELPRINT ("Target %d: failed to send identify\n",
    929  1.40.8.2  nathanw 							reqp->targ_id);
    930  1.40.8.2  nathanw 		/*
    931  1.40.8.2  nathanw 		 * Try to disconnect from the target.  We cannot leave
    932  1.40.8.2  nathanw 		 * it just hanging here.
    933  1.40.8.2  nathanw 		 */
    934  1.40.8.2  nathanw 		if (!reach_msg_out(sc, sizeof(struct scsi_generic))) {
    935  1.40.8.2  nathanw 			u_long	len   = 1;
    936  1.40.8.2  nathanw 			u_char	phase = PH_MSGOUT;
    937  1.40.8.2  nathanw 			u_char	msg   = MSG_ABORT;
    938  1.40.8.2  nathanw 
    939  1.40.8.2  nathanw 			transfer_pio(&phase, &msg, &len, 0);
    940  1.40.8.2  nathanw 		}
    941  1.40.8.2  nathanw 		else scsi_reset_verbose(sc, "Connected to unidentified target");
    942  1.40.8.2  nathanw 
    943  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
    944  1.40.8.2  nathanw 		reqp->xs->error = code ? code : XS_DRIVER_STUFFUP;
    945  1.40.8.2  nathanw 		finish_req(reqp);
    946  1.40.8.2  nathanw 		PID("scsi_select9");
    947  1.40.8.2  nathanw 		return (0);
    948  1.40.8.2  nathanw 	}
    949  1.40.8.2  nathanw 	reqp->phase = PH_MSGOUT;
    950  1.40.8.2  nathanw 
    951  1.40.8.2  nathanw identify_failed:
    952  1.40.8.2  nathanw 	sc->sc_selected |= targ_bit;
    953  1.40.8.2  nathanw 
    954  1.40.8.2  nathanw #ifdef notyet /* LWP: Do we need timeouts in the driver? */
    955  1.40.8.2  nathanw 	/*
    956  1.40.8.2  nathanw 	 * Command is connected, start timer ticking.
    957  1.40.8.2  nathanw 	 */
    958  1.40.8.2  nathanw 	ccb_p->xtimeout = ccb_p->timeout + Lbolt;
    959  1.40.8.2  nathanw #endif
    960  1.40.8.2  nathanw 
    961  1.40.8.2  nathanw 	connected  = reqp;
    962  1.40.8.2  nathanw 	busy      |= targ_bit;
    963  1.40.8.2  nathanw 	PID("scsi_select10");
    964  1.40.8.2  nathanw 	return (0);
    965  1.40.8.2  nathanw }
    966  1.40.8.2  nathanw 
    967  1.40.8.2  nathanw /*
    968  1.40.8.2  nathanw  * Return codes:
    969  1.40.8.2  nathanw  *	 0: Job has finished or disconnected, find something else
    970  1.40.8.2  nathanw  *	-1: keep on calling information_transfer() from scsi_main()
    971  1.40.8.2  nathanw  */
    972  1.40.8.2  nathanw static int
    973  1.40.8.2  nathanw information_transfer(sc)
    974  1.40.8.2  nathanw struct ncr_softc *sc;
    975  1.40.8.2  nathanw {
    976  1.40.8.2  nathanw 	SC_REQ	*reqp = connected;
    977  1.40.8.2  nathanw 	u_char	tmp, phase;
    978  1.40.8.2  nathanw 	u_long	len;
    979  1.40.8.2  nathanw 
    980  1.40.8.2  nathanw 	PID("info_transf1");
    981  1.40.8.2  nathanw 	/*
    982  1.40.8.2  nathanw 	 * Clear pending interrupts from 5380-chip.
    983  1.40.8.2  nathanw 	 */
    984  1.40.8.2  nathanw 	scsi_clr_ipend();
    985  1.40.8.2  nathanw 
    986  1.40.8.2  nathanw 	/*
    987  1.40.8.2  nathanw 	 * The SCSI-spec requires BSY to be true while connected to a target,
    988  1.40.8.2  nathanw 	 * loosing it means we lost the target...
    989  1.40.8.2  nathanw 	 * Also REQ needs to be asserted here to indicate that the bus-phase
    990  1.40.8.2  nathanw 	 * is valid. When the target does not supply REQ within a 'reasonable'
    991  1.40.8.2  nathanw 	 * amount of time, it's probably lost in it's own maze of twisting
    992  1.40.8.2  nathanw 	 * passages, we have to reset the bus to free it.
    993  1.40.8.2  nathanw 	 */
    994  1.40.8.2  nathanw 	if (GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY)
    995  1.40.8.2  nathanw 		wait_req_true();
    996  1.40.8.2  nathanw 	tmp = GET_5380_REG(NCR5380_IDSTAT);
    997  1.40.8.2  nathanw 
    998  1.40.8.2  nathanw 
    999  1.40.8.2  nathanw 	if ((tmp & (SC_S_BSY|SC_S_REQ)) != (SC_S_BSY|SC_S_REQ)) {
   1000  1.40.8.2  nathanw 		busy           &= ~(1 << reqp->targ_id);
   1001  1.40.8.2  nathanw 		connected       = NULL;
   1002  1.40.8.2  nathanw 		reqp->xs->error = XS_TIMEOUT;
   1003  1.40.8.2  nathanw 		finish_req(reqp);
   1004  1.40.8.2  nathanw 		if (!(tmp & SC_S_REQ))
   1005  1.40.8.2  nathanw 			scsi_reset_verbose(sc,
   1006  1.40.8.2  nathanw 					   "Timeout waiting for phase-change");
   1007  1.40.8.2  nathanw 		PID("info_transf2");
   1008  1.40.8.2  nathanw 		return (0);
   1009  1.40.8.2  nathanw 	}
   1010  1.40.8.2  nathanw 
   1011  1.40.8.2  nathanw 	phase = (tmp >> 2) & 7;
   1012  1.40.8.2  nathanw 	if (phase != reqp->phase) {
   1013  1.40.8.2  nathanw 		reqp->phase = phase;
   1014  1.40.8.2  nathanw #ifdef DBG_INF
   1015  1.40.8.2  nathanw 		if (dbg_target_mask & (1 << reqp->targ_id))
   1016  1.40.8.2  nathanw 			DBG_INFPRINT(show_phase, reqp, phase);
   1017  1.40.8.2  nathanw #endif
   1018  1.40.8.2  nathanw 	}
   1019  1.40.8.2  nathanw 	else {
   1020  1.40.8.2  nathanw 		/*
   1021  1.40.8.2  nathanw 		 * Same data-phase. If same error give up
   1022  1.40.8.2  nathanw 		 */
   1023  1.40.8.2  nathanw 		if ((reqp->msgout == MSG_ABORT)
   1024  1.40.8.2  nathanw 		     && ((phase == PH_DATAOUT) || (phase == PH_DATAIN))) {
   1025  1.40.8.2  nathanw 			busy     &= ~(1 << reqp->targ_id);
   1026  1.40.8.2  nathanw 			connected = NULL;
   1027  1.40.8.2  nathanw 			reqp->xs->error = XS_TIMEOUT;
   1028  1.40.8.2  nathanw 			finish_req(reqp);
   1029  1.40.8.2  nathanw 			scsi_reset_verbose(sc, "Failure to abort command");
   1030  1.40.8.2  nathanw 			return (0);
   1031  1.40.8.2  nathanw 		}
   1032  1.40.8.2  nathanw 	}
   1033  1.40.8.2  nathanw 
   1034  1.40.8.2  nathanw 	switch (phase) {
   1035  1.40.8.2  nathanw 	    case PH_DATAOUT:
   1036  1.40.8.2  nathanw #ifdef DBG_NOWRITE
   1037  1.40.8.2  nathanw 		ncr_tprint(reqp, "NOWRITE set -- write attempt aborted.");
   1038  1.40.8.2  nathanw 		reqp->msgout = MSG_ABORT;
   1039  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, SC_A_ATN);
   1040  1.40.8.2  nathanw 		return (-1);
   1041  1.40.8.2  nathanw #endif /* DBG_NOWRITE */
   1042  1.40.8.2  nathanw 		/*
   1043  1.40.8.2  nathanw 		 * If this is the first write using DMA, fill
   1044  1.40.8.2  nathanw 		 * the bounce buffer.
   1045  1.40.8.2  nathanw 		 */
   1046  1.40.8.2  nathanw 		if (reqp->xdata_ptr == reqp->xs->data) { /* XXX */
   1047  1.40.8.2  nathanw 		    if (reqp->dr_flag & DRIVER_BOUNCING)
   1048  1.40.8.2  nathanw 			bcopy(reqp->xdata_ptr, reqp->bounceb, reqp->xdata_len);
   1049  1.40.8.2  nathanw 		}
   1050  1.40.8.2  nathanw 
   1051  1.40.8.2  nathanw 	   case PH_DATAIN:
   1052  1.40.8.2  nathanw 		if (reqp->xdata_len <= 0) {
   1053  1.40.8.2  nathanw 			/*
   1054  1.40.8.2  nathanw 			 * Target keeps requesting data. Try to get into
   1055  1.40.8.2  nathanw 			 * message-out phase by feeding/taking 100 byte.
   1056  1.40.8.2  nathanw 			 */
   1057  1.40.8.2  nathanw 			ncr_tprint(reqp, "Target requests too much data\n");
   1058  1.40.8.2  nathanw 			reqp->msgout = MSG_ABORT;
   1059  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_A_ATN);
   1060  1.40.8.2  nathanw 			reach_msg_out(sc, 100);
   1061  1.40.8.2  nathanw 			return (-1);
   1062  1.40.8.2  nathanw 		}
   1063  1.40.8.2  nathanw #ifdef REAL_DMA
   1064  1.40.8.2  nathanw 		if (reqp->dr_flag & DRIVER_DMAOK) {
   1065  1.40.8.2  nathanw 			int poll = REAL_DMA_POLL|(reqp->dr_flag & DRIVER_NOINT);
   1066  1.40.8.2  nathanw 			transfer_dma(reqp, phase, poll);
   1067  1.40.8.2  nathanw 			if (!poll)
   1068  1.40.8.2  nathanw 				return (0);
   1069  1.40.8.2  nathanw 		}
   1070  1.40.8.2  nathanw 		else
   1071  1.40.8.2  nathanw #endif
   1072  1.40.8.2  nathanw 		{
   1073  1.40.8.2  nathanw 			PID("info_transf3");
   1074  1.40.8.2  nathanw 			len = reqp->xdata_len;
   1075  1.40.8.2  nathanw #ifdef USE_PDMA
   1076  1.40.8.2  nathanw 			if (transfer_pdma(&phase, reqp->xdata_ptr, &len) == 0)
   1077  1.40.8.2  nathanw 				return (0);
   1078  1.40.8.2  nathanw #else
   1079  1.40.8.2  nathanw 			transfer_pio(&phase, reqp->xdata_ptr, &len, 0);
   1080  1.40.8.2  nathanw #endif
   1081  1.40.8.2  nathanw 			reqp->xdata_ptr += reqp->xdata_len - len;
   1082  1.40.8.2  nathanw 			reqp->xdata_len  = len;
   1083  1.40.8.2  nathanw 		}
   1084  1.40.8.2  nathanw 		return (-1);
   1085  1.40.8.2  nathanw 	   case PH_MSGIN:
   1086  1.40.8.2  nathanw 		/*
   1087  1.40.8.2  nathanw 		 * We only expect single byte messages here.
   1088  1.40.8.2  nathanw 		 */
   1089  1.40.8.2  nathanw 		len = 1;
   1090  1.40.8.2  nathanw 		transfer_pio(&phase, &tmp, &len, 1);
   1091  1.40.8.2  nathanw 		reqp->message = tmp;
   1092  1.40.8.2  nathanw 		return (handle_message(reqp, tmp));
   1093  1.40.8.2  nathanw 	   case PH_MSGOUT:
   1094  1.40.8.2  nathanw 		len = 1;
   1095  1.40.8.2  nathanw 		transfer_pio(&phase, &reqp->msgout, &len, 0);
   1096  1.40.8.2  nathanw 		if (reqp->msgout == MSG_ABORT) {
   1097  1.40.8.2  nathanw 			busy     &= ~(1 << reqp->targ_id);
   1098  1.40.8.2  nathanw 			connected = NULL;
   1099  1.40.8.2  nathanw 			if (!reqp->xs->error)
   1100  1.40.8.2  nathanw 				reqp->xs->error = XS_DRIVER_STUFFUP;
   1101  1.40.8.2  nathanw 			finish_req(reqp);
   1102  1.40.8.2  nathanw 			PID("info_transf4");
   1103  1.40.8.2  nathanw 			return (0);
   1104  1.40.8.2  nathanw 		}
   1105  1.40.8.2  nathanw 		reqp->msgout = MSG_NOOP;
   1106  1.40.8.2  nathanw 		return (-1);
   1107  1.40.8.2  nathanw 	   case PH_CMD :
   1108  1.40.8.2  nathanw 		len = command_size(reqp->xcmd.opcode);
   1109  1.40.8.2  nathanw 		transfer_pio(&phase, (u_char *)&reqp->xcmd, &len, 0);
   1110  1.40.8.2  nathanw 		PID("info_transf5");
   1111  1.40.8.2  nathanw 		return (-1);
   1112  1.40.8.2  nathanw 	   case PH_STATUS:
   1113  1.40.8.2  nathanw 		len = 1;
   1114  1.40.8.2  nathanw 		transfer_pio(&phase, &tmp, &len, 0);
   1115  1.40.8.2  nathanw 		reqp->status = tmp;
   1116  1.40.8.2  nathanw 		PID("info_transf6");
   1117  1.40.8.2  nathanw 		return (-1);
   1118  1.40.8.2  nathanw 	   default :
   1119  1.40.8.2  nathanw 		ncr_tprint(reqp, "Unknown phase\n");
   1120  1.40.8.2  nathanw 	}
   1121  1.40.8.2  nathanw 	PID("info_transf7");
   1122  1.40.8.2  nathanw 	return (-1);
   1123  1.40.8.2  nathanw }
   1124  1.40.8.2  nathanw 
   1125  1.40.8.2  nathanw /*
   1126  1.40.8.2  nathanw  * Handle the message 'msg' send to us by the target.
   1127  1.40.8.2  nathanw  * Return values:
   1128  1.40.8.2  nathanw  *	 0 : The current command has completed.
   1129  1.40.8.2  nathanw  *	-1 : Get on to the next phase.
   1130  1.40.8.2  nathanw  */
   1131  1.40.8.2  nathanw static int
   1132  1.40.8.2  nathanw handle_message(reqp, msg)
   1133  1.40.8.2  nathanw SC_REQ	*reqp;
   1134  1.40.8.2  nathanw u_int	msg;
   1135  1.40.8.2  nathanw {
   1136  1.40.8.2  nathanw 	int	sps;
   1137  1.40.8.2  nathanw 	SC_REQ	*prev, *req;
   1138  1.40.8.2  nathanw 
   1139  1.40.8.2  nathanw 	PID("hmessage1");
   1140  1.40.8.2  nathanw 	switch (msg) {
   1141  1.40.8.2  nathanw 		/*
   1142  1.40.8.2  nathanw 		 * Linking lets us reduce the time required to get
   1143  1.40.8.2  nathanw 		 * the next command to the device, skipping the arbitration
   1144  1.40.8.2  nathanw 		 * and selection time. In the current implementation,
   1145  1.40.8.2  nathanw 		 * we merely have to start the next command pointed
   1146  1.40.8.2  nathanw 		 * to by 'next_link'.
   1147  1.40.8.2  nathanw 		 */
   1148  1.40.8.2  nathanw 		case MSG_LINK_CMD_COMPLETE:
   1149  1.40.8.2  nathanw 		case MSG_LINK_CMD_COMPLETEF:
   1150  1.40.8.2  nathanw 			if (reqp->link == NULL) {
   1151  1.40.8.2  nathanw 				ncr_tprint(reqp, "No link for linked command");
   1152  1.40.8.2  nathanw 				nack_message(reqp, MSG_ABORT);
   1153  1.40.8.2  nathanw 				PID("hmessage2");
   1154  1.40.8.2  nathanw 				return (-1);
   1155  1.40.8.2  nathanw 			}
   1156  1.40.8.2  nathanw 			ack_message();
   1157  1.40.8.2  nathanw 			if (!(reqp->dr_flag & DRIVER_AUTOSEN)) {
   1158  1.40.8.2  nathanw 				reqp->xs->resid = reqp->xdata_len;
   1159  1.40.8.2  nathanw 				reqp->xs->error = 0;
   1160  1.40.8.2  nathanw 			}
   1161  1.40.8.2  nathanw 
   1162  1.40.8.2  nathanw #ifdef AUTO_SENSE
   1163  1.40.8.2  nathanw 			if (check_autosense(reqp, 1) == -1)
   1164  1.40.8.2  nathanw 				return (-1);
   1165  1.40.8.2  nathanw #endif /* AUTO_SENSE */
   1166  1.40.8.2  nathanw 
   1167  1.40.8.2  nathanw #ifdef DBG_REQ
   1168  1.40.8.2  nathanw 			if (dbg_target_mask & (1 << reqp->targ_id))
   1169  1.40.8.2  nathanw 				show_request(reqp->link, "LINK");
   1170  1.40.8.2  nathanw #endif
   1171  1.40.8.2  nathanw 			connected = reqp->link;
   1172  1.40.8.2  nathanw 
   1173  1.40.8.2  nathanw 			/*
   1174  1.40.8.2  nathanw 			 * Unlink the 'linked' request from the issue_q
   1175  1.40.8.2  nathanw 			 */
   1176  1.40.8.2  nathanw 			sps  = splbio();
   1177  1.40.8.2  nathanw 			prev = NULL;
   1178  1.40.8.2  nathanw 			req  = issue_q;
   1179  1.40.8.2  nathanw 			for (; req != NULL; prev = req, req = req->next) {
   1180  1.40.8.2  nathanw 				if (req == connected)
   1181  1.40.8.2  nathanw 					break;
   1182  1.40.8.2  nathanw 			}
   1183  1.40.8.2  nathanw 			if (req == NULL)
   1184  1.40.8.2  nathanw 				panic("Inconsistent issue_q");
   1185  1.40.8.2  nathanw 			if (prev == NULL)
   1186  1.40.8.2  nathanw 				issue_q = req->next;
   1187  1.40.8.2  nathanw 			else prev->next = req->next;
   1188  1.40.8.2  nathanw 			req->next = NULL;
   1189  1.40.8.2  nathanw 			splx(sps);
   1190  1.40.8.2  nathanw 
   1191  1.40.8.2  nathanw 			finish_req(reqp);
   1192  1.40.8.2  nathanw 			PID("hmessage3");
   1193  1.40.8.2  nathanw 			return (-1);
   1194  1.40.8.2  nathanw 		case MSG_ABORT:
   1195  1.40.8.2  nathanw 		case MSG_CMDCOMPLETE:
   1196  1.40.8.2  nathanw 			ack_message();
   1197  1.40.8.2  nathanw 			connected = NULL;
   1198  1.40.8.2  nathanw 			busy     &= ~(1 << reqp->targ_id);
   1199  1.40.8.2  nathanw 			if (!(reqp->dr_flag & DRIVER_AUTOSEN)) {
   1200  1.40.8.2  nathanw 				reqp->xs->resid = reqp->xdata_len;
   1201  1.40.8.2  nathanw 				reqp->xs->error = 0;
   1202  1.40.8.2  nathanw 			}
   1203  1.40.8.2  nathanw 
   1204  1.40.8.2  nathanw #ifdef AUTO_SENSE
   1205  1.40.8.2  nathanw 			if (check_autosense(reqp, 0) == -1) {
   1206  1.40.8.2  nathanw 				PID("hmessage4");
   1207  1.40.8.2  nathanw 				return (0);
   1208  1.40.8.2  nathanw 			}
   1209  1.40.8.2  nathanw #endif /* AUTO_SENSE */
   1210  1.40.8.2  nathanw 
   1211  1.40.8.2  nathanw 			finish_req(reqp);
   1212  1.40.8.2  nathanw 			PID("hmessage5");
   1213  1.40.8.2  nathanw 			return (0);
   1214  1.40.8.2  nathanw 		case MSG_MESSAGE_REJECT:
   1215  1.40.8.2  nathanw 			ack_message();
   1216  1.40.8.2  nathanw 			PID("hmessage6");
   1217  1.40.8.2  nathanw 			return (-1);
   1218  1.40.8.2  nathanw 		case MSG_DISCONNECT:
   1219  1.40.8.2  nathanw 			ack_message();
   1220  1.40.8.2  nathanw #ifdef DBG_REQ
   1221  1.40.8.2  nathanw 			if (dbg_target_mask & (1 << reqp->targ_id))
   1222  1.40.8.2  nathanw 				show_request(reqp, "DISCON");
   1223  1.40.8.2  nathanw #endif
   1224  1.40.8.2  nathanw 			sps = splbio();
   1225  1.40.8.2  nathanw 			connected  = NULL;
   1226  1.40.8.2  nathanw 			reqp->next = discon_q;
   1227  1.40.8.2  nathanw 			discon_q   = reqp;
   1228  1.40.8.2  nathanw 			splx(sps);
   1229  1.40.8.2  nathanw 			PID("hmessage7");
   1230  1.40.8.2  nathanw 			return (0);
   1231  1.40.8.2  nathanw 		case MSG_SAVEDATAPOINTER:
   1232  1.40.8.2  nathanw 		case MSG_RESTOREPOINTERS:
   1233  1.40.8.2  nathanw 			/*
   1234  1.40.8.2  nathanw 			 * We save pointers implicitely at disconnect.
   1235  1.40.8.2  nathanw 			 * So we can ignore these messages.
   1236  1.40.8.2  nathanw 			 */
   1237  1.40.8.2  nathanw 			ack_message();
   1238  1.40.8.2  nathanw 			PID("hmessage8");
   1239  1.40.8.2  nathanw 			return (-1);
   1240  1.40.8.2  nathanw 		case MSG_EXTENDED:
   1241  1.40.8.2  nathanw 			nack_message(reqp, MSG_MESSAGE_REJECT);
   1242  1.40.8.2  nathanw 			PID("hmessage9");
   1243  1.40.8.2  nathanw 			return (-1);
   1244  1.40.8.2  nathanw 		default:
   1245  1.40.8.2  nathanw 			if ((msg & 0x80) && !(msg & 0x18)) {	/* IDENTIFY */
   1246  1.40.8.2  nathanw 				PID("hmessage10");
   1247  1.40.8.2  nathanw 				ack_message();
   1248  1.40.8.2  nathanw 				return (0);
   1249  1.40.8.2  nathanw 			} else {
   1250  1.40.8.2  nathanw 				ncr_tprint(reqp,
   1251  1.40.8.2  nathanw 					   "Unknown message %x.  Rejecting.\n",
   1252  1.40.8.2  nathanw 					   msg);
   1253  1.40.8.2  nathanw 				nack_message(reqp, MSG_MESSAGE_REJECT);
   1254  1.40.8.2  nathanw 			}
   1255  1.40.8.2  nathanw 			return (-1);
   1256  1.40.8.2  nathanw 	}
   1257  1.40.8.2  nathanw 	PID("hmessage11");
   1258  1.40.8.2  nathanw 	return (-1);
   1259  1.40.8.2  nathanw }
   1260  1.40.8.2  nathanw 
   1261  1.40.8.2  nathanw /*
   1262  1.40.8.2  nathanw  * Handle reselection. If a valid reconnection occurs, connected
   1263  1.40.8.2  nathanw  * points at the reconnected command. The command is removed from the
   1264  1.40.8.2  nathanw  * disconnected queue.
   1265  1.40.8.2  nathanw  */
   1266  1.40.8.2  nathanw static void
   1267  1.40.8.2  nathanw reselect(sc)
   1268  1.40.8.2  nathanw struct ncr_softc *sc;
   1269  1.40.8.2  nathanw {
   1270  1.40.8.2  nathanw 	u_char	phase;
   1271  1.40.8.2  nathanw 	u_long	len;
   1272  1.40.8.2  nathanw 	u_char	msg;
   1273  1.40.8.2  nathanw 	u_char	target_mask;
   1274  1.40.8.2  nathanw 	int	abort = 0;
   1275  1.40.8.2  nathanw 	SC_REQ	*tmp, *prev;
   1276  1.40.8.2  nathanw 
   1277  1.40.8.2  nathanw 	PID("reselect1");
   1278  1.40.8.2  nathanw 	target_mask = GET_5380_REG(NCR5380_DATA) & ~SC_HOST_ID;
   1279  1.40.8.2  nathanw 
   1280  1.40.8.2  nathanw 	/*
   1281  1.40.8.2  nathanw 	 * At this point, we have detected that our SCSI-id is on the bus,
   1282  1.40.8.2  nathanw 	 * SEL is true and BSY was false for at least one bus settle
   1283  1.40.8.2  nathanw 	 * delay (400 ns.).
   1284  1.40.8.2  nathanw 	 * We must assert BSY ourselves, until the target drops the SEL signal.
   1285  1.40.8.2  nathanw 	 * The SCSI-spec specifies no maximum time for this, so we have to
   1286  1.40.8.2  nathanw 	 * choose something long enough to suit all targets.
   1287  1.40.8.2  nathanw 	 */
   1288  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, SC_A_BSY);
   1289  1.40.8.2  nathanw 	len = 250000;
   1290  1.40.8.2  nathanw 	while ((GET_5380_REG(NCR5380_IDSTAT) & SC_S_SEL) && (len > 0)) {
   1291  1.40.8.2  nathanw 		delay(1);
   1292  1.40.8.2  nathanw 		len--;
   1293  1.40.8.2  nathanw 	}
   1294  1.40.8.2  nathanw 	if (GET_5380_REG(NCR5380_IDSTAT) & SC_S_SEL) {
   1295  1.40.8.2  nathanw 		/* Damn SEL isn't dropping */
   1296  1.40.8.2  nathanw 		scsi_reset_verbose(sc, "Target won't drop SEL during Reselect");
   1297  1.40.8.2  nathanw 		return;
   1298  1.40.8.2  nathanw 	}
   1299  1.40.8.2  nathanw 
   1300  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, 0);
   1301  1.40.8.2  nathanw 
   1302  1.40.8.2  nathanw 	/*
   1303  1.40.8.2  nathanw 	 * Check if the reselection is still valid. Check twice because
   1304  1.40.8.2  nathanw 	 * of possible line glitches - cheaper than delay(1) and we need
   1305  1.40.8.2  nathanw 	 * only a few nanoseconds.
   1306  1.40.8.2  nathanw 	 */
   1307  1.40.8.2  nathanw 	if (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY)) {
   1308  1.40.8.2  nathanw 	    if (!(GET_5380_REG(NCR5380_IDSTAT) & SC_S_BSY)) {
   1309  1.40.8.2  nathanw 		ncr_aprint(sc, "Stepped into the reselection timeout\n");
   1310  1.40.8.2  nathanw 		return;
   1311  1.40.8.2  nathanw 	    }
   1312  1.40.8.2  nathanw 	}
   1313  1.40.8.2  nathanw 
   1314  1.40.8.2  nathanw 	/*
   1315  1.40.8.2  nathanw 	 * Get the expected identify message.
   1316  1.40.8.2  nathanw 	 */
   1317  1.40.8.2  nathanw 	phase = PH_MSGIN;
   1318  1.40.8.2  nathanw 	len   = 1;
   1319  1.40.8.2  nathanw 	transfer_pio(&phase, &msg, &len, 0);
   1320  1.40.8.2  nathanw 	if (len || !MSG_ISIDENTIFY(msg)) {
   1321  1.40.8.2  nathanw 		ncr_aprint(sc, "Expecting IDENTIFY, got 0x%x\n", msg);
   1322  1.40.8.2  nathanw 		abort = 1;
   1323  1.40.8.2  nathanw 		tmp = NULL;
   1324  1.40.8.2  nathanw 	}
   1325  1.40.8.2  nathanw 	else {
   1326  1.40.8.2  nathanw 	    /*
   1327  1.40.8.2  nathanw 	     * Find the command reconnecting
   1328  1.40.8.2  nathanw 	     */
   1329  1.40.8.2  nathanw 	    for (tmp = discon_q, prev = NULL; tmp; prev = tmp, tmp = tmp->next){
   1330  1.40.8.2  nathanw 		if (target_mask == (1 << tmp->targ_id)) {
   1331  1.40.8.2  nathanw 			if (prev)
   1332  1.40.8.2  nathanw 				prev->next = tmp->next;
   1333  1.40.8.2  nathanw 			else discon_q = tmp->next;
   1334  1.40.8.2  nathanw 			tmp->next = NULL;
   1335  1.40.8.2  nathanw 			break;
   1336  1.40.8.2  nathanw 		}
   1337  1.40.8.2  nathanw 	    }
   1338  1.40.8.2  nathanw 	    if (tmp == NULL) {
   1339  1.40.8.2  nathanw 		ncr_aprint(sc, "No disconnected job for targetmask %x\n",
   1340  1.40.8.2  nathanw 								target_mask);
   1341  1.40.8.2  nathanw 		abort = 1;
   1342  1.40.8.2  nathanw 	    }
   1343  1.40.8.2  nathanw 	}
   1344  1.40.8.2  nathanw 	if (abort) {
   1345  1.40.8.2  nathanw 		msg   = MSG_ABORT;
   1346  1.40.8.2  nathanw 		len   = 1;
   1347  1.40.8.2  nathanw 		phase = PH_MSGOUT;
   1348  1.40.8.2  nathanw 
   1349  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, SC_A_ATN);
   1350  1.40.8.2  nathanw 		if (transfer_pio(&phase, &msg, &len, 0) || len)
   1351  1.40.8.2  nathanw 			scsi_reset_verbose(sc, "Failure to abort reselection");
   1352  1.40.8.2  nathanw 	}
   1353  1.40.8.2  nathanw 	else {
   1354  1.40.8.2  nathanw 		connected = tmp;
   1355  1.40.8.2  nathanw #ifdef DBG_REQ
   1356  1.40.8.2  nathanw 		if (dbg_target_mask & (1 << tmp->targ_id))
   1357  1.40.8.2  nathanw 			show_request(tmp, "RECON");
   1358  1.40.8.2  nathanw #endif
   1359  1.40.8.2  nathanw 	}
   1360  1.40.8.2  nathanw 	PID("reselect2");
   1361  1.40.8.2  nathanw }
   1362  1.40.8.2  nathanw 
   1363  1.40.8.2  nathanw /*
   1364  1.40.8.2  nathanw  * Transfer data in a given phase using programmed I/O.
   1365  1.40.8.2  nathanw  * Returns -1 when a different phase is entered without transferring the
   1366  1.40.8.2  nathanw  * maximum number of bytes, 0 if all bytes transferred or exit is in the same
   1367  1.40.8.2  nathanw  * phase.
   1368  1.40.8.2  nathanw  */
   1369  1.40.8.2  nathanw static int
   1370  1.40.8.2  nathanw transfer_pio(phase, data, len, dont_drop_ack)
   1371  1.40.8.2  nathanw u_char	*phase;
   1372  1.40.8.2  nathanw u_char	*data;
   1373  1.40.8.2  nathanw u_long	*len;
   1374  1.40.8.2  nathanw int	dont_drop_ack;
   1375  1.40.8.2  nathanw {
   1376  1.40.8.2  nathanw 	u_int	cnt = *len;
   1377  1.40.8.2  nathanw 	u_char	ph  = *phase;
   1378  1.40.8.2  nathanw 	u_char	tmp, new_icom;
   1379  1.40.8.2  nathanw 
   1380  1.40.8.2  nathanw 	DBG_PIOPRINT ("SCSI: transfer_pio start: phase: %d, len: %d\n", ph,cnt);
   1381  1.40.8.2  nathanw 	PID("tpio1");
   1382  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_TCOM, ph);
   1383  1.40.8.2  nathanw 	do {
   1384  1.40.8.2  nathanw 	    if (!wait_req_true()) {
   1385  1.40.8.2  nathanw 	    	DBG_PIOPRINT ("SCSI: transfer_pio: missing REQ\n", 0, 0);
   1386  1.40.8.2  nathanw 		break;
   1387  1.40.8.2  nathanw 	    }
   1388  1.40.8.2  nathanw 	    if (((GET_5380_REG(NCR5380_IDSTAT) >> 2) & 7) != ph) {
   1389  1.40.8.2  nathanw 	    	DBG_PIOPRINT ("SCSI: transfer_pio: phase mismatch\n", 0, 0);
   1390  1.40.8.2  nathanw 		break;
   1391  1.40.8.2  nathanw 	    }
   1392  1.40.8.2  nathanw 	    if (PH_IN(ph)) {
   1393  1.40.8.2  nathanw 		*data++ = GET_5380_REG(NCR5380_DATA);
   1394  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, SC_A_ACK);
   1395  1.40.8.2  nathanw 		if ((cnt == 1) && dont_drop_ack)
   1396  1.40.8.2  nathanw 			new_icom = SC_A_ACK;
   1397  1.40.8.2  nathanw 		else new_icom = 0;
   1398  1.40.8.2  nathanw 	    }
   1399  1.40.8.2  nathanw 	    else {
   1400  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_DATA, *data++);
   1401  1.40.8.2  nathanw 
   1402  1.40.8.2  nathanw 		/*
   1403  1.40.8.2  nathanw 		 * The SCSI-standard suggests that in the 'MESSAGE OUT' phase,
   1404  1.40.8.2  nathanw 		 * the initiator should drop ATN on the last byte of the
   1405  1.40.8.2  nathanw 		 * message phase after REQ has been asserted for the handshake
   1406  1.40.8.2  nathanw 		 * but before the initiator raises ACK.
   1407  1.40.8.2  nathanw 		 */
   1408  1.40.8.2  nathanw 		if (!( (ph == PH_MSGOUT) && (cnt > 1) )) {
   1409  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_ADTB);
   1410  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_ADTB | SC_A_ACK);
   1411  1.40.8.2  nathanw 			new_icom = 0;
   1412  1.40.8.2  nathanw 		}
   1413  1.40.8.2  nathanw 		else {
   1414  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_ADTB | SC_A_ATN);
   1415  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_ADTB|SC_A_ATN|SC_A_ACK);
   1416  1.40.8.2  nathanw 			new_icom = SC_A_ATN;
   1417  1.40.8.2  nathanw 		}
   1418  1.40.8.2  nathanw 	    }
   1419  1.40.8.2  nathanw 	    if (!wait_req_false()) {
   1420  1.40.8.2  nathanw 		DBG_PIOPRINT ("SCSI: transfer_pio - REQ not dropping\n", 0, 0);
   1421  1.40.8.2  nathanw 		break;
   1422  1.40.8.2  nathanw 	    }
   1423  1.40.8.2  nathanw 	    SET_5380_REG(NCR5380_ICOM, new_icom);
   1424  1.40.8.2  nathanw 
   1425  1.40.8.2  nathanw 	} while (--cnt);
   1426  1.40.8.2  nathanw 
   1427  1.40.8.2  nathanw 	if ((tmp = GET_5380_REG(NCR5380_IDSTAT)) & SC_S_REQ)
   1428  1.40.8.2  nathanw 		*phase = (tmp >> 2) & 7;
   1429  1.40.8.2  nathanw 	else *phase = NR_PHASE;
   1430  1.40.8.2  nathanw 	*len = cnt;
   1431  1.40.8.2  nathanw 	DBG_PIOPRINT ("SCSI: transfer_pio done: phase: %d, len: %d\n",
   1432  1.40.8.2  nathanw 								*phase, cnt);
   1433  1.40.8.2  nathanw 	PID("tpio2");
   1434  1.40.8.2  nathanw 	if (!cnt || (*phase == ph))
   1435  1.40.8.2  nathanw 		return (0);
   1436  1.40.8.2  nathanw 	return (-1);
   1437  1.40.8.2  nathanw }
   1438  1.40.8.2  nathanw 
   1439  1.40.8.2  nathanw #ifdef REAL_DMA
   1440  1.40.8.2  nathanw 
   1441  1.40.8.2  nathanw /*
   1442  1.40.8.2  nathanw  * Start a DMA-transfer on the device using the current pointers.
   1443  1.40.8.2  nathanw  * If 'poll' is true, the function busy-waits until DMA has completed.
   1444  1.40.8.2  nathanw  */
   1445  1.40.8.2  nathanw static void
   1446  1.40.8.2  nathanw transfer_dma(reqp, phase, poll)
   1447  1.40.8.2  nathanw SC_REQ	*reqp;
   1448  1.40.8.2  nathanw u_int	phase;
   1449  1.40.8.2  nathanw int	poll;
   1450  1.40.8.2  nathanw {
   1451  1.40.8.2  nathanw 	int	dma_done;
   1452  1.40.8.2  nathanw 	u_char	mbase = 0;
   1453  1.40.8.2  nathanw 	int	sps;
   1454  1.40.8.2  nathanw 
   1455  1.40.8.2  nathanw again:
   1456  1.40.8.2  nathanw 	PID("tdma1");
   1457  1.40.8.2  nathanw 
   1458  1.40.8.2  nathanw 	/*
   1459  1.40.8.2  nathanw 	 * We should be in phase, otherwise we are not allowed to
   1460  1.40.8.2  nathanw 	 * drive the bus.
   1461  1.40.8.2  nathanw 	 */
   1462  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_TCOM, phase);
   1463  1.40.8.2  nathanw 
   1464  1.40.8.2  nathanw 	/*
   1465  1.40.8.2  nathanw 	 * Defer interrupts until DMA is fully running.
   1466  1.40.8.2  nathanw 	 */
   1467  1.40.8.2  nathanw 	sps = splbio();
   1468  1.40.8.2  nathanw 
   1469  1.40.8.2  nathanw 	/*
   1470  1.40.8.2  nathanw 	 * Clear pending interrupts and parity errors.
   1471  1.40.8.2  nathanw 	 */
   1472  1.40.8.2  nathanw 	scsi_clr_ipend();
   1473  1.40.8.2  nathanw 
   1474  1.40.8.2  nathanw 	if (!poll) {
   1475  1.40.8.2  nathanw 		/*
   1476  1.40.8.2  nathanw 		 * Enable SCSI interrupts and set IN_DMA flag, set 'mbase'
   1477  1.40.8.2  nathanw 		 * to the interrupts we want enabled.
   1478  1.40.8.2  nathanw 		 */
   1479  1.40.8.2  nathanw 		scsi_ienable();
   1480  1.40.8.2  nathanw 		reqp->dr_flag |= DRIVER_IN_DMA;
   1481  1.40.8.2  nathanw 		mbase = SC_E_EOPI | SC_MON_BSY;
   1482  1.40.8.2  nathanw 	}
   1483  1.40.8.2  nathanw 	else scsi_idisable();
   1484  1.40.8.2  nathanw 	mbase |=  IMODE_BASE | SC_M_DMA;
   1485  1.40.8.2  nathanw 	scsi_dma_setup(reqp, phase, mbase);
   1486  1.40.8.2  nathanw 
   1487  1.40.8.2  nathanw 	splx(sps);
   1488  1.40.8.2  nathanw 
   1489  1.40.8.2  nathanw 	if (poll) {
   1490  1.40.8.2  nathanw 		/*
   1491  1.40.8.2  nathanw 		 * On polled-dma transfers, we wait here until the
   1492  1.40.8.2  nathanw 		 * 'end-of-dma' condition occurs.
   1493  1.40.8.2  nathanw 		 */
   1494  1.40.8.2  nathanw 		poll_edma(reqp);
   1495  1.40.8.2  nathanw 		if (!(dma_done = dma_ready()))
   1496  1.40.8.2  nathanw 			goto again;
   1497  1.40.8.2  nathanw 	}
   1498  1.40.8.2  nathanw 	PID("tdma2");
   1499  1.40.8.2  nathanw }
   1500  1.40.8.2  nathanw 
   1501  1.40.8.2  nathanw /*
   1502  1.40.8.2  nathanw  * Check results of a DMA data-transfer.
   1503  1.40.8.2  nathanw  */
   1504  1.40.8.2  nathanw static int
   1505  1.40.8.2  nathanw dma_ready()
   1506  1.40.8.2  nathanw {
   1507  1.40.8.2  nathanw 	SC_REQ	*reqp = connected;
   1508  1.40.8.2  nathanw 	int	dmstat, is_edma;
   1509  1.40.8.2  nathanw 	long	bytes_left, bytes_done;
   1510  1.40.8.2  nathanw 
   1511  1.40.8.2  nathanw 	is_edma = get_dma_result(reqp, &bytes_left);
   1512  1.40.8.2  nathanw 	dmstat  = GET_5380_REG(NCR5380_DMSTAT);
   1513  1.40.8.2  nathanw 
   1514  1.40.8.2  nathanw 	/*
   1515  1.40.8.2  nathanw 	 * Check if the call is sensible and not caused by any spurious
   1516  1.40.8.2  nathanw 	 * interrupt.
   1517  1.40.8.2  nathanw 	 */
   1518  1.40.8.2  nathanw 	if (!is_edma && !(dmstat & (SC_END_DMA|SC_BSY_ERR))
   1519  1.40.8.2  nathanw 		     && (dmstat & SC_PHS_MTCH) ) {
   1520  1.40.8.2  nathanw 		ncr_tprint(reqp, "dma_ready: spurious call "
   1521  1.40.8.2  nathanw 				 "(dm:%x,last_hit: %s)\n",
   1522  1.40.8.2  nathanw #ifdef DBG_PID
   1523  1.40.8.2  nathanw 					dmstat, last_hit[DBG_PID-1]);
   1524  1.40.8.2  nathanw #else
   1525  1.40.8.2  nathanw 					dmstat, "unknown");
   1526  1.40.8.2  nathanw #endif
   1527  1.40.8.2  nathanw 		return (0);
   1528  1.40.8.2  nathanw 	}
   1529  1.40.8.2  nathanw 
   1530  1.40.8.2  nathanw 	/*
   1531  1.40.8.2  nathanw 	 * Clear all (pending) interrupts.
   1532  1.40.8.2  nathanw 	 */
   1533  1.40.8.2  nathanw 	scsi_clr_ipend();
   1534  1.40.8.2  nathanw 
   1535  1.40.8.2  nathanw 	/*
   1536  1.40.8.2  nathanw 	 * Update various transfer-pointers/lengths
   1537  1.40.8.2  nathanw 	 */
   1538  1.40.8.2  nathanw 	bytes_done = reqp->dm_cur->dm_count - bytes_left;
   1539  1.40.8.2  nathanw 
   1540  1.40.8.2  nathanw 	if ((reqp->dr_flag & DRIVER_BOUNCING) && (PH_IN(reqp->phase))) {
   1541  1.40.8.2  nathanw 		/*
   1542  1.40.8.2  nathanw 		 * Copy the bytes read until now from the bounce buffer
   1543  1.40.8.2  nathanw 		 * to the 'real' destination. Flush the data-cache
   1544  1.40.8.2  nathanw 		 * before copying.
   1545  1.40.8.2  nathanw 		 */
   1546  1.40.8.2  nathanw 		PCIA();
   1547  1.40.8.2  nathanw 		bcopy(reqp->bouncerp, reqp->xdata_ptr, bytes_done);
   1548  1.40.8.2  nathanw 		reqp->bouncerp += bytes_done;
   1549  1.40.8.2  nathanw 	}
   1550  1.40.8.2  nathanw 
   1551  1.40.8.2  nathanw 	reqp->xdata_ptr  = &reqp->xdata_ptr[bytes_done];	/* XXX */
   1552  1.40.8.2  nathanw 	reqp->xdata_len -= bytes_done;				/* XXX */
   1553  1.40.8.2  nathanw 	if ((reqp->dm_cur->dm_count -= bytes_done) == 0)
   1554  1.40.8.2  nathanw 		reqp->dm_cur++;
   1555  1.40.8.2  nathanw 	else reqp->dm_cur->dm_addr += bytes_done;
   1556  1.40.8.2  nathanw 
   1557  1.40.8.2  nathanw 	if (PH_IN(reqp->phase) && (dmstat & SC_PAR_ERR)) {
   1558  1.40.8.2  nathanw 		if (!(ncr5380_no_parchk & (1 << reqp->targ_id))) {
   1559  1.40.8.2  nathanw 			ncr_tprint(reqp, "parity error in data-phase\n");
   1560  1.40.8.2  nathanw 			reqp->xs->error = XS_TIMEOUT;
   1561  1.40.8.2  nathanw 		}
   1562  1.40.8.2  nathanw 	}
   1563  1.40.8.2  nathanw 
   1564  1.40.8.2  nathanw 	/*
   1565  1.40.8.2  nathanw 	 * DMA mode should always be reset even when we will continue with the
   1566  1.40.8.2  nathanw 	 * next chain. It is also essential to clear the MON_BUSY because
   1567  1.40.8.2  nathanw 	 * when LOST_BUSY is unexpectedly set, we will not be able to drive
   1568  1.40.8.2  nathanw 	 * the bus....
   1569  1.40.8.2  nathanw 	 */
   1570  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_MODE, IMODE_BASE);
   1571  1.40.8.2  nathanw 
   1572  1.40.8.2  nathanw 
   1573  1.40.8.2  nathanw 	if ((dmstat & SC_BSY_ERR) || !(dmstat & SC_PHS_MTCH)
   1574  1.40.8.2  nathanw 		 || (reqp->dm_cur > reqp->dm_last) || (reqp->xs->error)) {
   1575  1.40.8.2  nathanw 
   1576  1.40.8.2  nathanw 		/*
   1577  1.40.8.2  nathanw 		 * Tell interrupt functions DMA mode has ended.
   1578  1.40.8.2  nathanw 		 */
   1579  1.40.8.2  nathanw 		reqp->dr_flag &= ~DRIVER_IN_DMA;
   1580  1.40.8.2  nathanw 
   1581  1.40.8.2  nathanw 		/*
   1582  1.40.8.2  nathanw 		 * Clear mode and icom
   1583  1.40.8.2  nathanw 		 */
   1584  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_MODE, IMODE_BASE);
   1585  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, 0);
   1586  1.40.8.2  nathanw 
   1587  1.40.8.2  nathanw 		if (dmstat & SC_BSY_ERR) {
   1588  1.40.8.2  nathanw 			if (!reqp->xs->error)
   1589  1.40.8.2  nathanw 				reqp->xs->error = XS_TIMEOUT;
   1590  1.40.8.2  nathanw 			finish_req(reqp);
   1591  1.40.8.2  nathanw 			PID("dma_ready1");
   1592  1.40.8.2  nathanw 			return (1);
   1593  1.40.8.2  nathanw 		}
   1594  1.40.8.2  nathanw 
   1595  1.40.8.2  nathanw 		if (reqp->xs->error != 0) {
   1596  1.40.8.2  nathanw ncr_tprint(reqp, "dma-ready: code = %d\n", reqp->xs->error); /* LWP */
   1597  1.40.8.2  nathanw 			reqp->msgout = MSG_ABORT;
   1598  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_A_ATN);
   1599  1.40.8.2  nathanw 		}
   1600  1.40.8.2  nathanw 		PID("dma_ready2");
   1601  1.40.8.2  nathanw 		return (1);
   1602  1.40.8.2  nathanw 	}
   1603  1.40.8.2  nathanw 	return (0);
   1604  1.40.8.2  nathanw }
   1605  1.40.8.2  nathanw #endif /* REAL_DMA */
   1606  1.40.8.2  nathanw 
   1607  1.40.8.2  nathanw static int
   1608  1.40.8.2  nathanw check_autosense(reqp, linked)
   1609  1.40.8.2  nathanw SC_REQ	*reqp;
   1610  1.40.8.2  nathanw int	linked;
   1611  1.40.8.2  nathanw {
   1612  1.40.8.2  nathanw 	int	sps;
   1613  1.40.8.2  nathanw 
   1614  1.40.8.2  nathanw 	/*
   1615  1.40.8.2  nathanw 	 * If this is the driver's Link Check for this target, ignore
   1616  1.40.8.2  nathanw 	 * the results of the command.  All we care about is whether we
   1617  1.40.8.2  nathanw 	 * got here from a LINK_CMD_COMPLETE or CMD_COMPLETE message.
   1618  1.40.8.2  nathanw 	 */
   1619  1.40.8.2  nathanw 	PID("linkcheck");
   1620  1.40.8.2  nathanw 	if (reqp->dr_flag & DRIVER_LINKCHK) {
   1621  1.40.8.2  nathanw 		if (linked)
   1622  1.40.8.2  nathanw 			ncr_will_link |= 1<<reqp->targ_id;
   1623  1.40.8.2  nathanw 		else ncr_tprint(reqp, "Does not support linked commands\n");
   1624  1.40.8.2  nathanw 		return (0);
   1625  1.40.8.2  nathanw 	}
   1626  1.40.8.2  nathanw 	/*
   1627  1.40.8.2  nathanw 	 * If we not executing an auto-sense and the status code
   1628  1.40.8.2  nathanw 	 * is request-sense, we automatically issue a request
   1629  1.40.8.2  nathanw 	 * sense command.
   1630  1.40.8.2  nathanw 	 */
   1631  1.40.8.2  nathanw 	PID("cautos1");
   1632  1.40.8.2  nathanw 	if (!(reqp->dr_flag & DRIVER_AUTOSEN)) {
   1633  1.40.8.2  nathanw 		switch (reqp->status & SCSMASK) {
   1634  1.40.8.2  nathanw 		    case SCSCHKC:
   1635  1.40.8.2  nathanw 			bcopy(sense_cmd, &reqp->xcmd, sizeof(sense_cmd));
   1636  1.40.8.2  nathanw 			reqp->xdata_ptr = (u_char *)&reqp->xs->sense.scsi_sense;
   1637  1.40.8.2  nathanw 			reqp->xdata_len = sizeof(reqp->xs->sense.scsi_sense);
   1638  1.40.8.2  nathanw 			reqp->dr_flag  |= DRIVER_AUTOSEN;
   1639  1.40.8.2  nathanw 			reqp->dr_flag  &= ~DRIVER_DMAOK;
   1640  1.40.8.2  nathanw 			if (!linked) {
   1641  1.40.8.2  nathanw 				sps = splbio();
   1642  1.40.8.2  nathanw 				reqp->next = issue_q;
   1643  1.40.8.2  nathanw 				issue_q    = reqp;
   1644  1.40.8.2  nathanw 				splx(sps);
   1645  1.40.8.2  nathanw 			}
   1646  1.40.8.2  nathanw 			else reqp->xcmd.bytes[sizeof(sense_cmd)-2] |= 1;
   1647  1.40.8.2  nathanw 
   1648  1.40.8.2  nathanw #ifdef DBG_REQ
   1649  1.40.8.2  nathanw 			bzero(reqp->xdata_ptr, reqp->xdata_len);
   1650  1.40.8.2  nathanw 			if (dbg_target_mask & (1 << reqp->targ_id))
   1651  1.40.8.2  nathanw 				show_request(reqp, "AUTO-SENSE");
   1652  1.40.8.2  nathanw #endif
   1653  1.40.8.2  nathanw 			PID("cautos2");
   1654  1.40.8.2  nathanw 			return (-1);
   1655  1.40.8.2  nathanw 		    case SCSBUSY:
   1656  1.40.8.2  nathanw 			reqp->xs->error = XS_BUSY;
   1657  1.40.8.2  nathanw 			return (0);
   1658  1.40.8.2  nathanw 		}
   1659  1.40.8.2  nathanw 	}
   1660  1.40.8.2  nathanw 	else {
   1661  1.40.8.2  nathanw 		/*
   1662  1.40.8.2  nathanw 		 * An auto-sense has finished
   1663  1.40.8.2  nathanw 		 */
   1664  1.40.8.2  nathanw 		if ((reqp->status & SCSMASK) != SCSGOOD)
   1665  1.40.8.2  nathanw 			reqp->xs->error = XS_DRIVER_STUFFUP; /* SC_E_AUTOSEN; */
   1666  1.40.8.2  nathanw 		else reqp->xs->error = XS_SENSE;
   1667  1.40.8.2  nathanw 		reqp->status = SCSCHKC;
   1668  1.40.8.2  nathanw 	}
   1669  1.40.8.2  nathanw 	PID("cautos3");
   1670  1.40.8.2  nathanw 	return (0);
   1671  1.40.8.2  nathanw }
   1672  1.40.8.2  nathanw 
   1673  1.40.8.2  nathanw static int
   1674  1.40.8.2  nathanw reach_msg_out(sc, len)
   1675  1.40.8.2  nathanw struct ncr_softc *sc;
   1676  1.40.8.2  nathanw u_long		 len;
   1677  1.40.8.2  nathanw {
   1678  1.40.8.2  nathanw 	u_char	phase;
   1679  1.40.8.2  nathanw 	u_char	data;
   1680  1.40.8.2  nathanw 	u_long	n = len;
   1681  1.40.8.2  nathanw 
   1682  1.40.8.2  nathanw 	ncr_aprint(sc, "Trying to reach Message-out phase\n");
   1683  1.40.8.2  nathanw 	if ((phase = GET_5380_REG(NCR5380_IDSTAT)) & SC_S_REQ)
   1684  1.40.8.2  nathanw 		phase = (phase >> 2) & 7;
   1685  1.40.8.2  nathanw 	else return (-1);
   1686  1.40.8.2  nathanw 	ncr_aprint(sc, "Trying to reach Message-out phase, now: %d\n", phase);
   1687  1.40.8.2  nathanw 	if (phase == PH_MSGOUT)
   1688  1.40.8.2  nathanw 		return (0);
   1689  1.40.8.2  nathanw 
   1690  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_TCOM, phase);
   1691  1.40.8.2  nathanw 
   1692  1.40.8.2  nathanw 	do {
   1693  1.40.8.2  nathanw 		if (!wait_req_true())
   1694  1.40.8.2  nathanw 			break;
   1695  1.40.8.2  nathanw 		if (((GET_5380_REG(NCR5380_IDSTAT) >> 2) & 7) != phase)
   1696  1.40.8.2  nathanw 			break;
   1697  1.40.8.2  nathanw 		if (PH_IN(phase)) {
   1698  1.40.8.2  nathanw 			data = GET_5380_REG(NCR5380_DATA);
   1699  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_A_ACK | SC_A_ATN);
   1700  1.40.8.2  nathanw 		}
   1701  1.40.8.2  nathanw 		else {
   1702  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_DATA, 0);
   1703  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_ADTB|SC_A_ATN);
   1704  1.40.8.2  nathanw 			SET_5380_REG(NCR5380_ICOM, SC_ADTB|SC_A_ACK|SC_A_ATN);
   1705  1.40.8.2  nathanw 		}
   1706  1.40.8.2  nathanw 		if (!wait_req_false())
   1707  1.40.8.2  nathanw 			break;
   1708  1.40.8.2  nathanw 		SET_5380_REG(NCR5380_ICOM, SC_A_ATN);
   1709  1.40.8.2  nathanw 	} while (--n);
   1710  1.40.8.2  nathanw 
   1711  1.40.8.2  nathanw 	if ((phase = GET_5380_REG(NCR5380_IDSTAT)) & SC_S_REQ) {
   1712  1.40.8.2  nathanw 		phase = (phase >> 2) & 7;
   1713  1.40.8.2  nathanw 		if (phase == PH_MSGOUT) {
   1714  1.40.8.2  nathanw 			ncr_aprint(sc, "Message-out phase reached after "
   1715  1.40.8.2  nathanw 					"%ld bytes.\n", len - n);
   1716  1.40.8.2  nathanw 			return (0);
   1717  1.40.8.2  nathanw 		}
   1718  1.40.8.2  nathanw 		ncr_aprint(sc, "Phase now: %d after %ld bytes.\n", phase,
   1719  1.40.8.2  nathanw 								   len - n);
   1720  1.40.8.2  nathanw 
   1721  1.40.8.2  nathanw 	}
   1722  1.40.8.2  nathanw 	return (-1);
   1723  1.40.8.2  nathanw }
   1724  1.40.8.2  nathanw 
   1725  1.40.8.2  nathanw void
   1726  1.40.8.2  nathanw scsi_reset()
   1727  1.40.8.2  nathanw {
   1728  1.40.8.2  nathanw 	SC_REQ	*tmp, *next;
   1729  1.40.8.2  nathanw 	int	sps;
   1730  1.40.8.2  nathanw 
   1731  1.40.8.2  nathanw 	PID("scsi_reset1");
   1732  1.40.8.2  nathanw 	sps = splbio();
   1733  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, SC_A_RST);
   1734  1.40.8.2  nathanw 	delay(100);
   1735  1.40.8.2  nathanw 	SET_5380_REG(NCR5380_ICOM, 0);
   1736  1.40.8.2  nathanw 	scsi_clr_ipend();
   1737  1.40.8.2  nathanw 
   1738  1.40.8.2  nathanw 	/*
   1739  1.40.8.2  nathanw 	 * None of the jobs in the discon_q will ever be reconnected,
   1740  1.40.8.2  nathanw 	 * notify this to the higher level code.
   1741  1.40.8.2  nathanw 	 */
   1742  1.40.8.2  nathanw 	for (tmp = discon_q; tmp ;) {
   1743  1.40.8.2  nathanw 		next = tmp->next;
   1744  1.40.8.2  nathanw 		tmp->next = NULL;
   1745  1.40.8.2  nathanw 		tmp->xs->error = XS_TIMEOUT;
   1746  1.40.8.2  nathanw 		busy &= ~(1 << tmp->targ_id);
   1747  1.40.8.2  nathanw 		finish_req(tmp);
   1748  1.40.8.2  nathanw 		tmp = next;
   1749  1.40.8.2  nathanw 	}
   1750  1.40.8.2  nathanw 	discon_q = NULL;
   1751  1.40.8.2  nathanw 
   1752  1.40.8.2  nathanw 	/*
   1753  1.40.8.2  nathanw 	 * The current job will never finish either.
   1754  1.40.8.2  nathanw 	 * The problem is that we can't finish the job because an instance
   1755  1.40.8.2  nathanw 	 * of main is running on it. Our best guess is that the job is currently
   1756  1.40.8.2  nathanw 	 * doing REAL-DMA. In that case 'dma_ready()' should correctly finish
   1757  1.40.8.2  nathanw 	 * the job because it detects BSY-loss.
   1758  1.40.8.2  nathanw 	 */
   1759  1.40.8.2  nathanw 	if ((tmp = connected) != NULL) {
   1760  1.40.8.2  nathanw 		if (tmp->dr_flag & DRIVER_IN_DMA) {
   1761  1.40.8.2  nathanw 			tmp->xs->error = XS_DRIVER_STUFFUP;
   1762  1.40.8.2  nathanw #ifdef REAL_DMA
   1763  1.40.8.2  nathanw 			dma_ready();
   1764  1.40.8.2  nathanw #endif
   1765  1.40.8.2  nathanw 		}
   1766  1.40.8.2  nathanw 	}
   1767  1.40.8.2  nathanw 	splx(sps);
   1768  1.40.8.2  nathanw 	PID("scsi_reset2");
   1769  1.40.8.2  nathanw 
   1770  1.40.8.2  nathanw 	/*
   1771  1.40.8.2  nathanw 	 * Give the attached devices some time to handle the reset. This
   1772  1.40.8.2  nathanw 	 * value is arbitrary but should be relatively long.
   1773  1.40.8.2  nathanw 	 */
   1774  1.40.8.2  nathanw 	delay(100000);
   1775  1.40.8.2  nathanw }
   1776  1.40.8.2  nathanw 
   1777  1.40.8.2  nathanw static void
   1778  1.40.8.2  nathanw scsi_reset_verbose(sc, why)
   1779  1.40.8.2  nathanw struct ncr_softc *sc;
   1780  1.40.8.2  nathanw const char	 *why;
   1781  1.40.8.2  nathanw {
   1782  1.40.8.2  nathanw 	ncr_aprint(sc, "Resetting SCSI-bus (%s)\n", why);
   1783  1.40.8.2  nathanw 
   1784  1.40.8.2  nathanw 	scsi_reset();
   1785  1.40.8.2  nathanw }
   1786  1.40.8.2  nathanw 
   1787  1.40.8.2  nathanw /*
   1788  1.40.8.2  nathanw  * Check validity of the IRQ set by the 5380. If the interrupt is valid,
   1789  1.40.8.2  nathanw  * the appropriate action is carried out (reselection or DMA ready) and
   1790  1.40.8.2  nathanw  * INTR_RESEL or INTR_DMA is returned. Otherwise a console notice is written
   1791  1.40.8.2  nathanw  * and INTR_SPURIOUS is returned.
   1792  1.40.8.2  nathanw  */
   1793  1.40.8.2  nathanw static int
   1794  1.40.8.2  nathanw check_intr(sc)
   1795  1.40.8.2  nathanw struct ncr_softc *sc;
   1796  1.40.8.2  nathanw {
   1797  1.40.8.2  nathanw 	SC_REQ	*reqp;
   1798  1.40.8.2  nathanw 
   1799  1.40.8.2  nathanw 	if ((GET_5380_REG(NCR5380_IDSTAT) & (SC_S_SEL|SC_S_IO))
   1800  1.40.8.2  nathanw 							==(SC_S_SEL|SC_S_IO))
   1801  1.40.8.2  nathanw 		return (INTR_RESEL);
   1802  1.40.8.2  nathanw 	else {
   1803  1.40.8.2  nathanw 		if ((reqp = connected) && (reqp->dr_flag & DRIVER_IN_DMA)){
   1804  1.40.8.2  nathanw 			reqp->dr_flag &= ~DRIVER_IN_DMA;
   1805  1.40.8.2  nathanw 			return (INTR_DMA);
   1806  1.40.8.2  nathanw 		}
   1807  1.40.8.2  nathanw 	}
   1808  1.40.8.2  nathanw 	printf("-->");
   1809  1.40.8.2  nathanw 	scsi_show();
   1810  1.40.8.2  nathanw 	scsi_clr_ipend();
   1811  1.40.8.2  nathanw 	ncr_aprint(sc, "Spurious interrupt.\n");
   1812  1.40.8.2  nathanw 	return (INTR_SPURIOUS);
   1813  1.40.8.2  nathanw }
   1814  1.40.8.2  nathanw 
   1815  1.40.8.2  nathanw #ifdef REAL_DMA
   1816  1.40.8.2  nathanw /*
   1817  1.40.8.2  nathanw  * Check if DMA can be used for this request. This function also builds
   1818  1.40.8.2  nathanw  * the dma-chain.
   1819  1.40.8.2  nathanw  */
   1820  1.40.8.2  nathanw static int
   1821  1.40.8.2  nathanw scsi_dmaok(reqp)
   1822  1.40.8.2  nathanw SC_REQ	*reqp;
   1823  1.40.8.2  nathanw {
   1824  1.40.8.2  nathanw 	u_long			phy_buf;
   1825  1.40.8.2  nathanw 	u_long			phy_len;
   1826  1.40.8.2  nathanw 	caddr_t			req_addr;
   1827  1.40.8.2  nathanw 	u_long			req_len;
   1828  1.40.8.2  nathanw 	struct dma_chain	*dm;
   1829  1.40.8.2  nathanw 
   1830  1.40.8.2  nathanw 	/*
   1831  1.40.8.2  nathanw 	 * Initialize locals and requests' DMA-chain.
   1832  1.40.8.2  nathanw 	 */
   1833  1.40.8.2  nathanw 	req_len        = reqp->xdata_len;
   1834  1.40.8.2  nathanw 	req_addr       = (caddr_t)reqp->xdata_ptr;
   1835  1.40.8.2  nathanw 	dm             = reqp->dm_cur = reqp->dm_last = reqp->dm_chain;
   1836  1.40.8.2  nathanw 	dm->dm_count   = dm->dm_addr = 0;
   1837  1.40.8.2  nathanw 	reqp->dr_flag &= ~DRIVER_BOUNCING;
   1838  1.40.8.2  nathanw 
   1839  1.40.8.2  nathanw 	/*
   1840  1.40.8.2  nathanw 	 * Do not accept zero length DMA.
   1841  1.40.8.2  nathanw 	 */
   1842  1.40.8.2  nathanw 	if (req_len == 0)
   1843  1.40.8.2  nathanw 		return (0);
   1844  1.40.8.2  nathanw 
   1845  1.40.8.2  nathanw 	/*
   1846  1.40.8.2  nathanw 	 * If DMA is emulated in software, we don't have to breakup the
   1847  1.40.8.2  nathanw 	 * request. Just build a chain with a single element and stash in
   1848  1.40.8.2  nathanw 	 * the KVA and not the KPA.
   1849  1.40.8.2  nathanw 	 */
   1850  1.40.8.2  nathanw 	if (emulated_dma()) {
   1851  1.40.8.2  nathanw 		dm->dm_addr    = (u_long)req_addr;
   1852  1.40.8.2  nathanw 		dm->dm_count   = req_len;
   1853  1.40.8.2  nathanw 		return (1);
   1854  1.40.8.2  nathanw 	}
   1855  1.40.8.2  nathanw 
   1856  1.40.8.2  nathanw 	/*
   1857  1.40.8.2  nathanw 	 * LWP: I think that this restriction is not strictly nessecary.
   1858  1.40.8.2  nathanw 	 */
   1859  1.40.8.2  nathanw 	if ((req_len & 0x1) || ((u_int)req_addr & 0x3))
   1860  1.40.8.2  nathanw 		return (0);
   1861  1.40.8.2  nathanw 
   1862  1.40.8.2  nathanw 	/*
   1863  1.40.8.2  nathanw 	 * Build the DMA-chain.
   1864  1.40.8.2  nathanw 	 */
   1865  1.40.8.2  nathanw 	dm->dm_addr = phy_buf = kvtop(req_addr);
   1866  1.40.8.2  nathanw 	while (req_len) {
   1867  1.40.8.2  nathanw 		if (req_len < (phy_len = NBPG - ((u_long)req_addr & PGOFSET)))
   1868  1.40.8.2  nathanw 			phy_len = req_len;
   1869  1.40.8.2  nathanw 
   1870  1.40.8.2  nathanw 		req_addr     += phy_len;
   1871  1.40.8.2  nathanw 		req_len      -= phy_len;
   1872  1.40.8.2  nathanw 		dm->dm_count += phy_len;
   1873  1.40.8.2  nathanw 
   1874  1.40.8.2  nathanw 		if (req_len) {
   1875  1.40.8.2  nathanw 			u_long	tmp = kvtop(req_addr);
   1876  1.40.8.2  nathanw 
   1877  1.40.8.2  nathanw 			if ((phy_buf + phy_len) != tmp) {
   1878  1.40.8.2  nathanw 			    if (wrong_dma_range(reqp, dm)) {
   1879  1.40.8.2  nathanw 				if (reqp->dr_flag & DRIVER_BOUNCING)
   1880  1.40.8.2  nathanw 					goto bounceit;
   1881  1.40.8.2  nathanw 				return (0);
   1882  1.40.8.2  nathanw 			    }
   1883  1.40.8.2  nathanw 
   1884  1.40.8.2  nathanw 			    if (++dm >= &reqp->dm_chain[MAXDMAIO]) {
   1885  1.40.8.2  nathanw 				ncr_tprint(reqp,"dmaok: DMA chain too long!\n");
   1886  1.40.8.2  nathanw 				return (0);
   1887  1.40.8.2  nathanw 			    }
   1888  1.40.8.2  nathanw 			    dm->dm_count = 0;
   1889  1.40.8.2  nathanw 			    dm->dm_addr  = tmp;
   1890  1.40.8.2  nathanw 			}
   1891  1.40.8.2  nathanw 			phy_buf = tmp;
   1892  1.40.8.2  nathanw 		}
   1893  1.40.8.2  nathanw 	}
   1894  1.40.8.2  nathanw         if (wrong_dma_range(reqp, dm)) {
   1895  1.40.8.2  nathanw 		if (reqp->dr_flag & DRIVER_BOUNCING)
   1896  1.40.8.2  nathanw 			goto bounceit;
   1897  1.40.8.2  nathanw 		return (0);
   1898  1.40.8.2  nathanw 	}
   1899  1.40.8.2  nathanw 	reqp->dm_last = dm;
   1900  1.40.8.2  nathanw 	return (1);
   1901  1.40.8.2  nathanw 
   1902  1.40.8.2  nathanw bounceit:
   1903  1.40.8.2  nathanw 	if ((reqp->bounceb = alloc_bounceb(reqp->xdata_len)) == NULL) {
   1904  1.40.8.2  nathanw 		/*
   1905  1.40.8.2  nathanw 		 * If we can't get a bounce buffer, forget DMA
   1906  1.40.8.2  nathanw 		 */
   1907  1.40.8.2  nathanw 		reqp->dr_flag &= ~DRIVER_BOUNCING;
   1908  1.40.8.2  nathanw 		return(0);
   1909  1.40.8.2  nathanw 	}
   1910  1.40.8.2  nathanw 	/*
   1911  1.40.8.2  nathanw 	 * Initialize a single DMA-range containing the bounced request
   1912  1.40.8.2  nathanw 	 */
   1913  1.40.8.2  nathanw 	dm = reqp->dm_cur = reqp->dm_last = reqp->dm_chain;
   1914  1.40.8.2  nathanw 	dm->dm_addr    = kvtop(reqp->bounceb);
   1915  1.40.8.2  nathanw 	dm->dm_count   = reqp->xdata_len;
   1916  1.40.8.2  nathanw 	reqp->bouncerp = reqp->bounceb;
   1917  1.40.8.2  nathanw 
   1918  1.40.8.2  nathanw 	return (1);
   1919  1.40.8.2  nathanw }
   1920  1.40.8.2  nathanw #endif /* REAL_DMA */
   1921  1.40.8.2  nathanw 
   1922  1.40.8.2  nathanw static void
   1923  1.40.8.2  nathanw run_main(sc)
   1924  1.40.8.2  nathanw struct ncr_softc *sc;
   1925  1.40.8.2  nathanw {
   1926  1.40.8.2  nathanw 	int	sps = splbio();
   1927  1.40.8.2  nathanw 
   1928  1.40.8.2  nathanw 	if (!main_running) {
   1929  1.40.8.2  nathanw 		/*
   1930  1.40.8.2  nathanw 		 * If shared resources are required, claim them
   1931  1.40.8.2  nathanw 		 * before entering 'scsi_main'. If we can't get them
   1932  1.40.8.2  nathanw 		 * now, assume 'run_main' will be called when the resource
   1933  1.40.8.2  nathanw 		 * becomes available.
   1934  1.40.8.2  nathanw 		 */
   1935  1.40.8.2  nathanw 		if (!claimed_dma()) {
   1936  1.40.8.2  nathanw 			splx(sps);
   1937  1.40.8.2  nathanw 			return;
   1938  1.40.8.2  nathanw 		}
   1939  1.40.8.2  nathanw 		main_running = 1;
   1940  1.40.8.2  nathanw 		splx(sps);
   1941  1.40.8.2  nathanw 		scsi_main(sc);
   1942  1.40.8.2  nathanw 	}
   1943  1.40.8.2  nathanw 	else splx(sps);
   1944  1.40.8.2  nathanw }
   1945  1.40.8.2  nathanw 
   1946  1.40.8.2  nathanw /*
   1947  1.40.8.2  nathanw  * Prefix message with full target info.
   1948  1.40.8.2  nathanw  */
   1949  1.40.8.2  nathanw static void
   1950  1.40.8.2  nathanw ncr_tprint(SC_REQ *reqp, char *fmt, ...)
   1951  1.40.8.2  nathanw {
   1952  1.40.8.2  nathanw 	va_list	ap;
   1953  1.40.8.2  nathanw 
   1954  1.40.8.2  nathanw 	va_start(ap, fmt);
   1955  1.40.8.2  nathanw 	scsipi_printaddr(reqp->xs->xs_periph);
   1956  1.40.8.2  nathanw 	vprintf(fmt, ap);
   1957  1.40.8.2  nathanw 	va_end(ap);
   1958  1.40.8.2  nathanw }
   1959  1.40.8.2  nathanw 
   1960  1.40.8.2  nathanw /*
   1961  1.40.8.2  nathanw  * Prefix message with adapter info.
   1962  1.40.8.2  nathanw  */
   1963  1.40.8.2  nathanw static void
   1964  1.40.8.2  nathanw ncr_aprint(struct ncr_softc *sc, char *fmt, ...)
   1965  1.40.8.2  nathanw {
   1966  1.40.8.2  nathanw 	va_list	ap;
   1967  1.40.8.2  nathanw 	char buf[256];
   1968  1.40.8.2  nathanw 
   1969  1.40.8.2  nathanw 	va_start(ap, fmt);
   1970  1.40.8.2  nathanw 	vsnprintf(buf, sizeof(buf), fmt, ap);
   1971  1.40.8.2  nathanw 	va_end(ap);
   1972  1.40.8.2  nathanw 
   1973  1.40.8.2  nathanw 	printf("%s: %s", sc->sc_dev.dv_xname, buf);
   1974  1.40.8.2  nathanw }
   1975  1.40.8.2  nathanw /****************************************************************************
   1976  1.40.8.2  nathanw  *		Start Debugging Functions				    *
   1977  1.40.8.2  nathanw  ****************************************************************************/
   1978  1.40.8.2  nathanw static char *phase_names[] = {
   1979  1.40.8.2  nathanw 	"DATA_OUT", "DATA_IN", "COMMAND", "STATUS", "NONE", "NONE", "MSG_OUT",
   1980  1.40.8.2  nathanw 	"MSG_IN"
   1981  1.40.8.2  nathanw };
   1982  1.40.8.2  nathanw 
   1983  1.40.8.2  nathanw static void
   1984  1.40.8.2  nathanw show_phase(reqp, phase)
   1985  1.40.8.2  nathanw SC_REQ	*reqp;
   1986  1.40.8.2  nathanw int	phase;
   1987  1.40.8.2  nathanw {
   1988  1.40.8.2  nathanw 	printf("INFTRANS: %d Phase = %s\n", reqp->targ_id, phase_names[phase]);
   1989  1.40.8.2  nathanw }
   1990  1.40.8.2  nathanw 
   1991  1.40.8.2  nathanw static void
   1992  1.40.8.2  nathanw show_data_sense(xs)
   1993  1.40.8.2  nathanw struct scsipi_xfer	*xs;
   1994  1.40.8.2  nathanw {
   1995  1.40.8.2  nathanw 	u_char	*p1, *p2;
   1996  1.40.8.2  nathanw 	int	i;
   1997  1.40.8.2  nathanw 	int	sz;
   1998  1.40.8.2  nathanw 
   1999  1.40.8.2  nathanw 	p1 = (u_char *) xs->cmd;
   2000  1.40.8.2  nathanw 	p2 = (u_char *)&xs->sense.scsi_sense;
   2001  1.40.8.2  nathanw 	if(*p2 == 0)
   2002  1.40.8.2  nathanw 		return;	/* No(n)sense */
   2003  1.40.8.2  nathanw 	printf("cmd[%d,%d]: ", xs->cmdlen, sz = command_size(*p1));
   2004  1.40.8.2  nathanw 	for (i = 0; i < sz; i++)
   2005  1.40.8.2  nathanw 		printf("%x ", p1[i]);
   2006  1.40.8.2  nathanw 	printf("\nsense: ");
   2007  1.40.8.2  nathanw 	for (i = 0; i < sizeof(xs->sense.scsi_sense); i++)
   2008  1.40.8.2  nathanw 		printf("%x ", p2[i]);
   2009  1.40.8.2  nathanw 	printf("\n");
   2010  1.40.8.2  nathanw }
   2011  1.40.8.2  nathanw 
   2012  1.40.8.2  nathanw static void
   2013  1.40.8.2  nathanw show_request(reqp, qtxt)
   2014  1.40.8.2  nathanw SC_REQ	*reqp;
   2015  1.40.8.2  nathanw char	*qtxt;
   2016  1.40.8.2  nathanw {
   2017  1.40.8.2  nathanw 	printf("REQ-%s: %d %p[%ld] cmd[0]=%x S=%x M=%x R=%x resid=%d dr_flag=%x %s\n",
   2018  1.40.8.2  nathanw 			qtxt, reqp->targ_id, reqp->xdata_ptr, reqp->xdata_len,
   2019  1.40.8.2  nathanw 			reqp->xcmd.opcode, reqp->status, reqp->message,
   2020  1.40.8.2  nathanw 			reqp->xs->error, reqp->xs->resid, reqp->dr_flag,
   2021  1.40.8.2  nathanw 			reqp->link ? "L":"");
   2022  1.40.8.2  nathanw 	if (reqp->status == SCSCHKC)
   2023  1.40.8.2  nathanw 		show_data_sense(reqp->xs);
   2024  1.40.8.2  nathanw }
   2025  1.40.8.2  nathanw 
   2026  1.40.8.2  nathanw static char *sig_names[] = {
   2027  1.40.8.2  nathanw 	"PAR", "SEL", "I/O", "C/D", "MSG", "REQ", "BSY", "RST",
   2028  1.40.8.2  nathanw 	"ACK", "ATN", "LBSY", "PMATCH", "IRQ", "EPAR", "DREQ", "EDMA"
   2029  1.40.8.2  nathanw };
   2030  1.40.8.2  nathanw 
   2031  1.40.8.2  nathanw static void
   2032  1.40.8.2  nathanw show_signals(dmstat, idstat)
   2033  1.40.8.2  nathanw u_char	dmstat, idstat;
   2034  1.40.8.2  nathanw {
   2035  1.40.8.2  nathanw 	u_short	tmp, mask;
   2036  1.40.8.2  nathanw 	int	j, need_pipe;
   2037  1.40.8.2  nathanw 
   2038  1.40.8.2  nathanw 	tmp = idstat | ((dmstat & 3) << 8);
   2039  1.40.8.2  nathanw 	printf("Bus signals (%02x/%02x): ", idstat, dmstat & 3);
   2040  1.40.8.2  nathanw 	for (mask = 1, j = need_pipe = 0; mask <= tmp; mask <<= 1, j++) {
   2041  1.40.8.2  nathanw 		if (tmp & mask)
   2042  1.40.8.2  nathanw 			printf("%s%s", need_pipe++ ? "|" : "", sig_names[j]);
   2043  1.40.8.2  nathanw 	}
   2044  1.40.8.2  nathanw 	printf("\nDma status (%02x): ", dmstat);
   2045  1.40.8.2  nathanw 	for (mask = 4, j = 10, need_pipe = 0; mask <= dmstat; mask <<= 1, j++) {
   2046  1.40.8.2  nathanw 		if (dmstat & mask)
   2047  1.40.8.2  nathanw 			printf("%s%s", need_pipe++ ? "|" : "", sig_names[j]);
   2048  1.40.8.2  nathanw 	}
   2049  1.40.8.2  nathanw 	printf("\n");
   2050  1.40.8.2  nathanw }
   2051  1.40.8.2  nathanw 
   2052  1.40.8.2  nathanw void
   2053  1.40.8.2  nathanw scsi_show()
   2054  1.40.8.2  nathanw {
   2055  1.40.8.2  nathanw 	SC_REQ	*tmp;
   2056  1.40.8.2  nathanw 	int	sps = splhigh();
   2057  1.40.8.2  nathanw 	u_char	idstat, dmstat;
   2058  1.40.8.2  nathanw 	int	i;
   2059  1.40.8.2  nathanw 
   2060  1.40.8.2  nathanw 	printf("scsi_show: scsi_main is%s running\n",
   2061  1.40.8.2  nathanw 		main_running ? "" : " not");
   2062  1.40.8.2  nathanw 	for (tmp = issue_q; tmp; tmp = tmp->next)
   2063  1.40.8.2  nathanw 		show_request(tmp, "ISSUED");
   2064  1.40.8.2  nathanw 	for (tmp = discon_q; tmp; tmp = tmp->next)
   2065  1.40.8.2  nathanw 		show_request(tmp, "DISCONNECTED");
   2066  1.40.8.2  nathanw 	if (connected)
   2067  1.40.8.2  nathanw 		show_request(connected, "CONNECTED");
   2068  1.40.8.2  nathanw 	if (can_access_5380()) {
   2069  1.40.8.2  nathanw 		idstat = GET_5380_REG(NCR5380_IDSTAT);
   2070  1.40.8.2  nathanw 		dmstat = GET_5380_REG(NCR5380_DMSTAT);
   2071  1.40.8.2  nathanw 		show_signals(dmstat, idstat);
   2072  1.40.8.2  nathanw 	}
   2073  1.40.8.2  nathanw 
   2074  1.40.8.2  nathanw 	if (connected)
   2075  1.40.8.2  nathanw 		printf("phase = %d, ", connected->phase);
   2076  1.40.8.2  nathanw 	printf("busy:%x, spl:%04x\n", busy, sps);
   2077  1.40.8.2  nathanw #ifdef	DBG_PID
   2078  1.40.8.2  nathanw 	for (i=0; i<DBG_PID; i++)
   2079  1.40.8.2  nathanw 		printf("\t%d\t%s\n", i, last_hit[i]);
   2080  1.40.8.2  nathanw #endif
   2081  1.40.8.2  nathanw 
   2082  1.40.8.2  nathanw 	splx(sps);
   2083  1.40.8.2  nathanw }
   2084