ser.c revision 1.14.8.4 1 1.14.8.4 nathanw /* $NetBSD: ser.c,v 1.14.8.4 2002/09/17 21:13:48 nathanw Exp $ */
2 1.14.8.2 nathanw
3 1.14.8.2 nathanw /*-
4 1.14.8.2 nathanw * Copyright (c) 1997 The NetBSD Foundation, Inc.
5 1.14.8.2 nathanw * All rights reserved.
6 1.14.8.2 nathanw *
7 1.14.8.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.14.8.2 nathanw * by Leo Weppelman.
9 1.14.8.2 nathanw *
10 1.14.8.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.14.8.2 nathanw * modification, are permitted provided that the following conditions
12 1.14.8.2 nathanw * are met:
13 1.14.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.14.8.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.14.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.14.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.14.8.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.14.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.14.8.2 nathanw * must display the following acknowledgement:
20 1.14.8.2 nathanw * This product includes software developed by the NetBSD
21 1.14.8.2 nathanw * Foundation, Inc. and its contributors.
22 1.14.8.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.14.8.2 nathanw * contributors may be used to endorse or promote products derived
24 1.14.8.2 nathanw * from this software without specific prior written permission.
25 1.14.8.2 nathanw *
26 1.14.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.14.8.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.14.8.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.14.8.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.14.8.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.14.8.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.14.8.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.14.8.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.14.8.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.14.8.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.14.8.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.14.8.2 nathanw */
38 1.14.8.2 nathanw /*-
39 1.14.8.2 nathanw * Copyright (c) 1993, 1994, 1995, 1996, 1997
40 1.14.8.2 nathanw * Charles M. Hannum. All rights reserved.
41 1.14.8.2 nathanw *
42 1.14.8.2 nathanw * Interrupt processing and hardware flow control partly based on code from
43 1.14.8.2 nathanw * Onno van der Linden and Gordon Ross.
44 1.14.8.2 nathanw *
45 1.14.8.2 nathanw * Redistribution and use in source and binary forms, with or without
46 1.14.8.2 nathanw * modification, are permitted provided that the following conditions
47 1.14.8.2 nathanw * are met:
48 1.14.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
49 1.14.8.2 nathanw * notice, this list of conditions and the following disclaimer.
50 1.14.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
51 1.14.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
52 1.14.8.2 nathanw * documentation and/or other materials provided with the distribution.
53 1.14.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
54 1.14.8.2 nathanw * must display the following acknowledgement:
55 1.14.8.2 nathanw * This product includes software developed by Charles M. Hannum.
56 1.14.8.2 nathanw * 4. The name of the author may not be used to endorse or promote products
57 1.14.8.2 nathanw * derived from this software without specific prior written permission.
58 1.14.8.2 nathanw *
59 1.14.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
60 1.14.8.2 nathanw * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
61 1.14.8.2 nathanw * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
62 1.14.8.2 nathanw * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
63 1.14.8.2 nathanw * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
64 1.14.8.2 nathanw * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
65 1.14.8.2 nathanw * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
66 1.14.8.2 nathanw * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
67 1.14.8.2 nathanw * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
68 1.14.8.2 nathanw * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
69 1.14.8.2 nathanw */
70 1.14.8.2 nathanw
71 1.14.8.2 nathanw /*
72 1.14.8.2 nathanw * Copyright (c) 1991 The Regents of the University of California.
73 1.14.8.2 nathanw * All rights reserved.
74 1.14.8.2 nathanw *
75 1.14.8.2 nathanw * Redistribution and use in source and binary forms, with or without
76 1.14.8.2 nathanw * modification, are permitted provided that the following conditions
77 1.14.8.2 nathanw * are met:
78 1.14.8.2 nathanw * 1. Redistributions of source code must retain the above copyright
79 1.14.8.2 nathanw * notice, this list of conditions and the following disclaimer.
80 1.14.8.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
81 1.14.8.2 nathanw * notice, this list of conditions and the following disclaimer in the
82 1.14.8.2 nathanw * documentation and/or other materials provided with the distribution.
83 1.14.8.2 nathanw * 3. All advertising materials mentioning features or use of this software
84 1.14.8.2 nathanw * must display the following acknowledgement:
85 1.14.8.2 nathanw * This product includes software developed by the University of
86 1.14.8.2 nathanw * California, Berkeley and its contributors.
87 1.14.8.2 nathanw * 4. Neither the name of the University nor the names of its contributors
88 1.14.8.2 nathanw * may be used to endorse or promote products derived from this software
89 1.14.8.2 nathanw * without specific prior written permission.
90 1.14.8.2 nathanw *
91 1.14.8.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
92 1.14.8.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
93 1.14.8.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
94 1.14.8.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
95 1.14.8.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
96 1.14.8.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
97 1.14.8.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
98 1.14.8.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
99 1.14.8.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
100 1.14.8.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
101 1.14.8.2 nathanw * SUCH DAMAGE.
102 1.14.8.2 nathanw *
103 1.14.8.2 nathanw * @(#)com.c 7.5 (Berkeley) 5/16/91
104 1.14.8.2 nathanw */
105 1.14.8.2 nathanw
106 1.14.8.2 nathanw #include "opt_ddb.h"
107 1.14.8.2 nathanw #include "opt_mbtype.h"
108 1.14.8.4 nathanw #include "opt_serconsole.h"
109 1.14.8.2 nathanw
110 1.14.8.2 nathanw #include <sys/param.h>
111 1.14.8.2 nathanw #include <sys/systm.h>
112 1.14.8.2 nathanw #include <sys/ioctl.h>
113 1.14.8.2 nathanw #include <sys/select.h>
114 1.14.8.2 nathanw #include <sys/tty.h>
115 1.14.8.2 nathanw #include <sys/proc.h>
116 1.14.8.2 nathanw #include <sys/user.h>
117 1.14.8.2 nathanw #include <sys/conf.h>
118 1.14.8.2 nathanw #include <sys/file.h>
119 1.14.8.2 nathanw #include <sys/uio.h>
120 1.14.8.2 nathanw #include <sys/kernel.h>
121 1.14.8.2 nathanw #include <sys/syslog.h>
122 1.14.8.2 nathanw #include <sys/types.h>
123 1.14.8.2 nathanw #include <sys/device.h>
124 1.14.8.2 nathanw
125 1.14.8.2 nathanw #include <m68k/asm_single.h>
126 1.14.8.2 nathanw
127 1.14.8.2 nathanw #include <machine/iomap.h>
128 1.14.8.2 nathanw #include <machine/mfp.h>
129 1.14.8.2 nathanw #include <atari/atari/intr.h>
130 1.14.8.2 nathanw #include <atari/dev/serreg.h>
131 1.14.8.2 nathanw
132 1.14.8.2 nathanw #if !defined(_MILANHW_)
133 1.14.8.2 nathanw #include <atari/dev/ym2149reg.h>
134 1.14.8.2 nathanw #else
135 1.14.8.2 nathanw /* MILAN has no ym2149 */
136 1.14.8.2 nathanw #define ym2149_dtr(set) { \
137 1.14.8.2 nathanw if (set) \
138 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_gpip, 0x08); \
139 1.14.8.2 nathanw else single_inst_bclr_b(MFP->mf_gpip, 0x08); \
140 1.14.8.2 nathanw }
141 1.14.8.2 nathanw
142 1.14.8.2 nathanw #define ym2149_rts(set) { \
143 1.14.8.2 nathanw if (set) \
144 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_gpip, 0x01); \
145 1.14.8.2 nathanw else single_inst_bclr_b(MFP->mf_gpip, 0x01); \
146 1.14.8.2 nathanw }
147 1.14.8.2 nathanw #endif /* _MILANHW_ */
148 1.14.8.2 nathanw
149 1.14.8.2 nathanw /* #define SER_DEBUG */
150 1.14.8.2 nathanw
151 1.14.8.2 nathanw #define SERUNIT(x) (minor(x) & 0x7ffff)
152 1.14.8.2 nathanw #define SERDIALOUT(x) (minor(x) & 0x80000)
153 1.14.8.2 nathanw
154 1.14.8.2 nathanw /* XXX */
155 1.14.8.2 nathanw #define CONSBAUD 9600
156 1.14.8.2 nathanw #define CONSCFLAG TTYDEF_CFLAG
157 1.14.8.2 nathanw /* end XXX */
158 1.14.8.2 nathanw
159 1.14.8.2 nathanw /* Macros to clear/set/test flags. */
160 1.14.8.2 nathanw #define SET(t, f) (t) |= (f)
161 1.14.8.2 nathanw #define CLR(t, f) (t) &= ~(f)
162 1.14.8.2 nathanw #define ISSET(t, f) ((t) & (f))
163 1.14.8.2 nathanw
164 1.14.8.2 nathanw #define splserial() spl6()
165 1.14.8.2 nathanw
166 1.14.8.2 nathanw /* Buffer size for character buffer */
167 1.14.8.2 nathanw #define RXBUFSIZE 2048 /* More than enough.. */
168 1.14.8.2 nathanw #define RXBUFMASK (RXBUFSIZE-1) /* Only iff previous is a power of 2 */
169 1.14.8.2 nathanw #define RXHIWAT (RXBUFSIZE >> 2)
170 1.14.8.2 nathanw
171 1.14.8.2 nathanw struct ser_softc {
172 1.14.8.2 nathanw struct device sc_dev;
173 1.14.8.2 nathanw struct tty *sc_tty;
174 1.14.8.2 nathanw
175 1.14.8.2 nathanw struct callout sc_diag_ch;
176 1.14.8.2 nathanw
177 1.14.8.2 nathanw int sc_overflows;
178 1.14.8.2 nathanw int sc_floods;
179 1.14.8.2 nathanw int sc_errors;
180 1.14.8.2 nathanw
181 1.14.8.2 nathanw u_char sc_hwflags;
182 1.14.8.2 nathanw u_char sc_swflags;
183 1.14.8.2 nathanw
184 1.14.8.2 nathanw int sc_ospeed; /* delay + timer-d data */
185 1.14.8.2 nathanw u_char sc_imra;
186 1.14.8.2 nathanw u_char sc_imrb;
187 1.14.8.2 nathanw u_char sc_ucr; /* Uart control */
188 1.14.8.2 nathanw u_char sc_msr; /* Modem status */
189 1.14.8.2 nathanw u_char sc_tsr; /* Tranceiver status */
190 1.14.8.2 nathanw u_char sc_rsr; /* Receiver status */
191 1.14.8.2 nathanw u_char sc_mcr; /* (Pseudo) Modem ctrl. */
192 1.14.8.2 nathanw
193 1.14.8.2 nathanw u_char sc_msr_delta;
194 1.14.8.2 nathanw u_char sc_msr_mask;
195 1.14.8.2 nathanw u_char sc_mcr_active;
196 1.14.8.2 nathanw u_char sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd;
197 1.14.8.2 nathanw
198 1.14.8.2 nathanw int sc_r_hiwat;
199 1.14.8.2 nathanw volatile u_int sc_rbget;
200 1.14.8.2 nathanw volatile u_int sc_rbput;
201 1.14.8.2 nathanw volatile u_int sc_rbavail;
202 1.14.8.2 nathanw u_char sc_rbuf[RXBUFSIZE];
203 1.14.8.2 nathanw u_char sc_lbuf[RXBUFSIZE];
204 1.14.8.2 nathanw
205 1.14.8.2 nathanw volatile u_char sc_rx_blocked;
206 1.14.8.2 nathanw volatile u_char sc_rx_ready;
207 1.14.8.2 nathanw volatile u_char sc_tx_busy;
208 1.14.8.2 nathanw volatile u_char sc_tx_done;
209 1.14.8.2 nathanw volatile u_char sc_tx_stopped;
210 1.14.8.2 nathanw volatile u_char sc_st_check;
211 1.14.8.2 nathanw
212 1.14.8.2 nathanw u_char *sc_tba;
213 1.14.8.2 nathanw int sc_tbc;
214 1.14.8.2 nathanw int sc_heldtbc;
215 1.14.8.2 nathanw
216 1.14.8.2 nathanw volatile u_char sc_heldchange;
217 1.14.8.2 nathanw };
218 1.14.8.2 nathanw
219 1.14.8.2 nathanw /*
220 1.14.8.2 nathanw * For sc_hwflags:
221 1.14.8.2 nathanw */
222 1.14.8.2 nathanw #define SER_HW_CONSOLE 0x01
223 1.14.8.2 nathanw
224 1.14.8.2 nathanw void ser_break __P((struct ser_softc *, int));
225 1.14.8.2 nathanw void ser_hwiflow __P((struct ser_softc *, int));
226 1.14.8.2 nathanw void ser_iflush __P((struct ser_softc *));
227 1.14.8.2 nathanw void ser_loadchannelregs __P((struct ser_softc *));
228 1.14.8.2 nathanw void ser_modem __P((struct ser_softc *, int));
229 1.14.8.2 nathanw void serdiag __P((void *));
230 1.14.8.2 nathanw int serhwiflow __P((struct tty *, int));
231 1.14.8.2 nathanw void serinit __P((int));
232 1.14.8.2 nathanw void serinitcons __P((int));
233 1.14.8.2 nathanw int baud;
234 1.14.8.2 nathanw int sermintr __P((void *));
235 1.14.8.2 nathanw int sertrintr __P((void *));
236 1.14.8.2 nathanw int serparam __P((struct tty *, struct termios *));
237 1.14.8.2 nathanw void serstart __P((struct tty *));
238 1.14.8.2 nathanw
239 1.14.8.2 nathanw struct consdev;
240 1.14.8.2 nathanw void sercnprobe __P((struct consdev *));
241 1.14.8.2 nathanw void sercninit __P((struct consdev *));
242 1.14.8.2 nathanw int sercngetc __P((dev_t));
243 1.14.8.2 nathanw void sercnputc __P((dev_t, int));
244 1.14.8.2 nathanw void sercnpollc __P((dev_t, int));
245 1.14.8.2 nathanw
246 1.14.8.2 nathanw static void sermsrint __P((struct ser_softc *, struct tty*));
247 1.14.8.2 nathanw static void serrxint __P((struct ser_softc *, struct tty*));
248 1.14.8.2 nathanw static void ser_shutdown __P((struct ser_softc *));
249 1.14.8.2 nathanw static int serspeed __P((long));
250 1.14.8.2 nathanw static void sersoft __P((void *));
251 1.14.8.2 nathanw static void sertxint __P((struct ser_softc *, struct tty*));
252 1.14.8.2 nathanw
253 1.14.8.2 nathanw static volatile int ser_softintr_scheduled = 0;
254 1.14.8.2 nathanw
255 1.14.8.2 nathanw /*
256 1.14.8.2 nathanw * Autoconfig stuff
257 1.14.8.2 nathanw */
258 1.14.8.2 nathanw static void serattach __P((struct device *, struct device *, void *));
259 1.14.8.2 nathanw static int sermatch __P((struct device *, struct cfdata *, void *));
260 1.14.8.2 nathanw
261 1.14.8.2 nathanw struct cfattach ser_ca = {
262 1.14.8.2 nathanw sizeof(struct ser_softc), sermatch, serattach
263 1.14.8.2 nathanw };
264 1.14.8.2 nathanw
265 1.14.8.2 nathanw extern struct cfdriver ser_cd;
266 1.14.8.2 nathanw
267 1.14.8.4 nathanw dev_type_open(seropen);
268 1.14.8.4 nathanw dev_type_close(serclose);
269 1.14.8.4 nathanw dev_type_read(serread);
270 1.14.8.4 nathanw dev_type_write(serwrite);
271 1.14.8.4 nathanw dev_type_ioctl(serioctl);
272 1.14.8.4 nathanw dev_type_stop(serstop);
273 1.14.8.4 nathanw dev_type_tty(sertty);
274 1.14.8.4 nathanw dev_type_poll(serpoll);
275 1.14.8.4 nathanw
276 1.14.8.4 nathanw const struct cdevsw ser_cdevsw = {
277 1.14.8.4 nathanw seropen, serclose, serread, serwrite, serioctl,
278 1.14.8.4 nathanw serstop, sertty, serpoll, nommap, D_TTY
279 1.14.8.4 nathanw };
280 1.14.8.4 nathanw
281 1.14.8.2 nathanw /*ARGSUSED*/
282 1.14.8.2 nathanw static int
283 1.14.8.2 nathanw sermatch(pdp, cfp, auxp)
284 1.14.8.2 nathanw struct device *pdp;
285 1.14.8.2 nathanw struct cfdata *cfp;
286 1.14.8.2 nathanw void *auxp;
287 1.14.8.2 nathanw {
288 1.14.8.2 nathanw static int ser_matched = 0;
289 1.14.8.2 nathanw
290 1.14.8.2 nathanw /* Match at most one ser unit */
291 1.14.8.2 nathanw if (strcmp((char *)auxp, "ser") || ser_matched)
292 1.14.8.2 nathanw return 0;
293 1.14.8.2 nathanw
294 1.14.8.2 nathanw ser_matched = 1;
295 1.14.8.2 nathanw return 1;
296 1.14.8.2 nathanw }
297 1.14.8.2 nathanw
298 1.14.8.2 nathanw /*ARGSUSED*/
299 1.14.8.2 nathanw static void
300 1.14.8.2 nathanw serattach(pdp, dp, auxp)
301 1.14.8.2 nathanw struct device *pdp, *dp;
302 1.14.8.2 nathanw void *auxp;
303 1.14.8.2 nathanw {
304 1.14.8.2 nathanw struct ser_softc *sc = (void *)dp;
305 1.14.8.2 nathanw
306 1.14.8.2 nathanw if (intr_establish(1, USER_VEC, 0, (hw_ifun_t)sermintr, sc) == NULL)
307 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (1)\n");
308 1.14.8.2 nathanw if (intr_establish(2, USER_VEC, 0, (hw_ifun_t)sermintr, sc) == NULL)
309 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (2)\n");
310 1.14.8.2 nathanw if (intr_establish(14, USER_VEC, 0, (hw_ifun_t)sermintr, sc) == NULL)
311 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (14)\n");
312 1.14.8.2 nathanw if (intr_establish(9, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
313 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (9)\n");
314 1.14.8.2 nathanw if (intr_establish(10, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
315 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (10)\n");
316 1.14.8.2 nathanw if (intr_establish(11, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
317 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (11)\n");
318 1.14.8.2 nathanw if (intr_establish(12, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
319 1.14.8.2 nathanw printf("serattach: Can't establish interrupt (12)\n");
320 1.14.8.2 nathanw
321 1.14.8.2 nathanw ym2149_rts(1);
322 1.14.8.2 nathanw ym2149_dtr(1);
323 1.14.8.2 nathanw
324 1.14.8.2 nathanw /*
325 1.14.8.2 nathanw * Enable but mask interrupts...
326 1.14.8.2 nathanw * XXX: Look at edge-sensitivity for DCD/CTS interrupts.
327 1.14.8.2 nathanw */
328 1.14.8.2 nathanw MFP->mf_ierb |= IB_SCTS|IB_SDCD;
329 1.14.8.2 nathanw MFP->mf_iera |= IA_RRDY|IA_RERR|IA_TRDY|IA_TERR;
330 1.14.8.2 nathanw MFP->mf_imrb &= ~(IB_SCTS|IB_SDCD);
331 1.14.8.2 nathanw MFP->mf_imra &= ~(IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
332 1.14.8.2 nathanw
333 1.14.8.2 nathanw callout_init(&sc->sc_diag_ch);
334 1.14.8.2 nathanw
335 1.14.8.4 nathanw #if SERCONSOLE > 0
336 1.14.8.2 nathanw /*
337 1.14.8.2 nathanw * Activate serial console when DCD present...
338 1.14.8.2 nathanw */
339 1.14.8.2 nathanw if (!(MFP->mf_gpip & MCR_DCD))
340 1.14.8.2 nathanw SET(sc->sc_hwflags, SER_HW_CONSOLE);
341 1.14.8.4 nathanw #endif /* SERCONSOLE > 0 */
342 1.14.8.2 nathanw
343 1.14.8.2 nathanw printf("\n");
344 1.14.8.2 nathanw if (ISSET(sc->sc_hwflags, SER_HW_CONSOLE)) {
345 1.14.8.2 nathanw serinit(CONSBAUD);
346 1.14.8.2 nathanw printf("%s: console\n", sc->sc_dev.dv_xname);
347 1.14.8.2 nathanw }
348 1.14.8.2 nathanw }
349 1.14.8.2 nathanw
350 1.14.8.2 nathanw #ifdef SER_DEBUG
351 1.14.8.2 nathanw void serstatus __P((struct ser_softc *, char *));
352 1.14.8.2 nathanw void
353 1.14.8.2 nathanw serstatus(sc, str)
354 1.14.8.2 nathanw struct ser_softc *sc;
355 1.14.8.2 nathanw char *str;
356 1.14.8.2 nathanw {
357 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
358 1.14.8.2 nathanw
359 1.14.8.2 nathanw printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n",
360 1.14.8.2 nathanw sc->sc_dev.dv_xname, str,
361 1.14.8.2 nathanw ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
362 1.14.8.2 nathanw ISSET(sc->sc_msr, MCR_DCD) ? "+" : "-",
363 1.14.8.2 nathanw ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
364 1.14.8.2 nathanw ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
365 1.14.8.2 nathanw sc->sc_tx_stopped ? "+" : "-");
366 1.14.8.2 nathanw
367 1.14.8.2 nathanw printf("%s: %s %scrtscts %scts %sts_ttstop %srts %srx_blocked\n",
368 1.14.8.2 nathanw sc->sc_dev.dv_xname, str,
369 1.14.8.2 nathanw ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
370 1.14.8.2 nathanw ISSET(sc->sc_msr, MCR_CTS) ? "+" : "-",
371 1.14.8.2 nathanw ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
372 1.14.8.2 nathanw ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
373 1.14.8.2 nathanw sc->sc_rx_blocked ? "+" : "-");
374 1.14.8.2 nathanw }
375 1.14.8.2 nathanw #endif /* SER_DEBUG */
376 1.14.8.2 nathanw
377 1.14.8.2 nathanw int
378 1.14.8.2 nathanw seropen(dev, flag, mode, p)
379 1.14.8.2 nathanw dev_t dev;
380 1.14.8.2 nathanw int flag, mode;
381 1.14.8.2 nathanw struct proc *p;
382 1.14.8.2 nathanw {
383 1.14.8.2 nathanw int unit = SERUNIT(dev);
384 1.14.8.2 nathanw struct ser_softc *sc;
385 1.14.8.2 nathanw struct tty *tp;
386 1.14.8.2 nathanw int s, s2;
387 1.14.8.2 nathanw int error = 0;
388 1.14.8.2 nathanw
389 1.14.8.2 nathanw if (unit >= ser_cd.cd_ndevs)
390 1.14.8.2 nathanw return (ENXIO);
391 1.14.8.2 nathanw sc = ser_cd.cd_devs[unit];
392 1.14.8.2 nathanw if (!sc)
393 1.14.8.2 nathanw return (ENXIO);
394 1.14.8.2 nathanw
395 1.14.8.2 nathanw if (!sc->sc_tty) {
396 1.14.8.2 nathanw tp = sc->sc_tty = ttymalloc();
397 1.14.8.2 nathanw tty_attach(tp);
398 1.14.8.2 nathanw } else
399 1.14.8.2 nathanw tp = sc->sc_tty;
400 1.14.8.2 nathanw
401 1.14.8.2 nathanw if (ISSET(tp->t_state, TS_ISOPEN) &&
402 1.14.8.2 nathanw ISSET(tp->t_state, TS_XCLUDE) &&
403 1.14.8.2 nathanw p->p_ucred->cr_uid != 0)
404 1.14.8.2 nathanw return (EBUSY);
405 1.14.8.2 nathanw
406 1.14.8.2 nathanw s = spltty();
407 1.14.8.2 nathanw
408 1.14.8.2 nathanw /*
409 1.14.8.2 nathanw * Do the following if this is a first open.
410 1.14.8.2 nathanw */
411 1.14.8.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
412 1.14.8.2 nathanw struct termios t;
413 1.14.8.2 nathanw
414 1.14.8.2 nathanw /* Turn on interrupts. */
415 1.14.8.2 nathanw sc->sc_imra = IA_RRDY|IA_RERR|IA_TRDY|IA_TERR;
416 1.14.8.2 nathanw sc->sc_imrb = IB_SCTS|IB_SDCD;
417 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imra, sc->sc_imra);
418 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imrb, sc->sc_imrb);
419 1.14.8.2 nathanw
420 1.14.8.2 nathanw /* Fetch the current modem control status, needed later. */
421 1.14.8.2 nathanw sc->sc_msr = ~MFP->mf_gpip & (IO_SDCD|IO_SCTS|IO_SRI);
422 1.14.8.2 nathanw
423 1.14.8.2 nathanw /* Add some entry points needed by the tty layer. */
424 1.14.8.2 nathanw tp->t_oproc = serstart;
425 1.14.8.2 nathanw tp->t_param = serparam;
426 1.14.8.2 nathanw tp->t_hwiflow = serhwiflow;
427 1.14.8.2 nathanw tp->t_dev = dev;
428 1.14.8.2 nathanw
429 1.14.8.2 nathanw /*
430 1.14.8.2 nathanw * Initialize the termios status to the defaults. Add in the
431 1.14.8.2 nathanw * sticky bits from TIOCSFLAGS.
432 1.14.8.2 nathanw */
433 1.14.8.2 nathanw t.c_ispeed = 0;
434 1.14.8.2 nathanw if (ISSET(sc->sc_hwflags, SER_HW_CONSOLE)) {
435 1.14.8.2 nathanw t.c_ospeed = CONSBAUD;
436 1.14.8.2 nathanw t.c_cflag = CONSCFLAG;
437 1.14.8.2 nathanw }
438 1.14.8.2 nathanw else {
439 1.14.8.2 nathanw t.c_ospeed = TTYDEF_SPEED;
440 1.14.8.2 nathanw t.c_cflag = TTYDEF_CFLAG;
441 1.14.8.2 nathanw }
442 1.14.8.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
443 1.14.8.2 nathanw SET(t.c_cflag, CLOCAL);
444 1.14.8.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
445 1.14.8.2 nathanw SET(t.c_cflag, CRTSCTS);
446 1.14.8.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
447 1.14.8.2 nathanw SET(t.c_cflag, MDMBUF);
448 1.14.8.2 nathanw tp->t_iflag = TTYDEF_IFLAG;
449 1.14.8.2 nathanw tp->t_oflag = TTYDEF_OFLAG;
450 1.14.8.2 nathanw tp->t_lflag = TTYDEF_LFLAG;
451 1.14.8.2 nathanw ttychars(tp);
452 1.14.8.2 nathanw (void) serparam(tp, &t);
453 1.14.8.2 nathanw ttsetwater(tp);
454 1.14.8.2 nathanw
455 1.14.8.2 nathanw s2 = splserial();
456 1.14.8.2 nathanw
457 1.14.8.2 nathanw /*
458 1.14.8.2 nathanw * Turn on DTR. We must always do this, even if carrier is not
459 1.14.8.2 nathanw * present, because otherwise we'd have to use TIOCSDTR
460 1.14.8.2 nathanw * immediately after setting CLOCAL. We will drop DTR only on
461 1.14.8.2 nathanw * the next high-low transition of DCD, or by explicit request.
462 1.14.8.2 nathanw */
463 1.14.8.2 nathanw ser_modem(sc, 1);
464 1.14.8.2 nathanw
465 1.14.8.2 nathanw /* Clear the input ring, and unblock. */
466 1.14.8.2 nathanw sc->sc_rbput = sc->sc_rbget = 0;
467 1.14.8.2 nathanw sc->sc_rbavail = RXBUFSIZE;
468 1.14.8.2 nathanw ser_iflush(sc);
469 1.14.8.2 nathanw sc->sc_rx_blocked = 0;
470 1.14.8.2 nathanw ser_hwiflow(sc, 0);
471 1.14.8.2 nathanw
472 1.14.8.2 nathanw #ifdef SER_DEBUG
473 1.14.8.2 nathanw serstatus(sc, "seropen ");
474 1.14.8.2 nathanw #endif
475 1.14.8.2 nathanw
476 1.14.8.2 nathanw splx(s2);
477 1.14.8.2 nathanw }
478 1.14.8.2 nathanw
479 1.14.8.2 nathanw splx(s);
480 1.14.8.2 nathanw
481 1.14.8.2 nathanw error = ttyopen(tp, SERDIALOUT(dev), ISSET(flag, O_NONBLOCK));
482 1.14.8.2 nathanw if (error)
483 1.14.8.2 nathanw goto bad;
484 1.14.8.2 nathanw
485 1.14.8.2 nathanw error = (*tp->t_linesw->l_open)(dev, tp);
486 1.14.8.2 nathanw if (error)
487 1.14.8.2 nathanw goto bad;
488 1.14.8.2 nathanw
489 1.14.8.2 nathanw return (0);
490 1.14.8.2 nathanw
491 1.14.8.2 nathanw bad:
492 1.14.8.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
493 1.14.8.2 nathanw /*
494 1.14.8.2 nathanw * We failed to open the device, and nobody else had it opened.
495 1.14.8.2 nathanw * Clean up the state as appropriate.
496 1.14.8.2 nathanw */
497 1.14.8.2 nathanw ser_shutdown(sc);
498 1.14.8.2 nathanw }
499 1.14.8.2 nathanw
500 1.14.8.2 nathanw return (error);
501 1.14.8.2 nathanw }
502 1.14.8.2 nathanw
503 1.14.8.2 nathanw int
504 1.14.8.2 nathanw serclose(dev, flag, mode, p)
505 1.14.8.2 nathanw dev_t dev;
506 1.14.8.2 nathanw int flag, mode;
507 1.14.8.2 nathanw struct proc *p;
508 1.14.8.2 nathanw {
509 1.14.8.2 nathanw int unit = SERUNIT(dev);
510 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[unit];
511 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
512 1.14.8.2 nathanw
513 1.14.8.2 nathanw /* XXX This is for cons.c. */
514 1.14.8.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN))
515 1.14.8.2 nathanw return (0);
516 1.14.8.2 nathanw
517 1.14.8.2 nathanw (*tp->t_linesw->l_close)(tp, flag);
518 1.14.8.2 nathanw ttyclose(tp);
519 1.14.8.2 nathanw
520 1.14.8.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
521 1.14.8.2 nathanw /*
522 1.14.8.2 nathanw * Although we got a last close, the device may still be in
523 1.14.8.2 nathanw * use; e.g. if this was the dialout node, and there are still
524 1.14.8.2 nathanw * processes waiting for carrier on the non-dialout node.
525 1.14.8.2 nathanw */
526 1.14.8.2 nathanw ser_shutdown(sc);
527 1.14.8.2 nathanw }
528 1.14.8.2 nathanw
529 1.14.8.2 nathanw return (0);
530 1.14.8.2 nathanw }
531 1.14.8.2 nathanw
532 1.14.8.2 nathanw int
533 1.14.8.2 nathanw serread(dev, uio, flag)
534 1.14.8.2 nathanw dev_t dev;
535 1.14.8.2 nathanw struct uio *uio;
536 1.14.8.2 nathanw int flag;
537 1.14.8.2 nathanw {
538 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
539 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
540 1.14.8.2 nathanw
541 1.14.8.2 nathanw return ((*tp->t_linesw->l_read)(tp, uio, flag));
542 1.14.8.2 nathanw }
543 1.14.8.2 nathanw
544 1.14.8.2 nathanw int
545 1.14.8.2 nathanw serwrite(dev, uio, flag)
546 1.14.8.2 nathanw dev_t dev;
547 1.14.8.2 nathanw struct uio *uio;
548 1.14.8.2 nathanw int flag;
549 1.14.8.2 nathanw {
550 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
551 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
552 1.14.8.2 nathanw
553 1.14.8.2 nathanw return ((*tp->t_linesw->l_write)(tp, uio, flag));
554 1.14.8.2 nathanw }
555 1.14.8.2 nathanw
556 1.14.8.2 nathanw int
557 1.14.8.2 nathanw serpoll(dev, events, p)
558 1.14.8.2 nathanw dev_t dev;
559 1.14.8.2 nathanw int events;
560 1.14.8.2 nathanw struct proc *p;
561 1.14.8.2 nathanw {
562 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
563 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
564 1.14.8.2 nathanw
565 1.14.8.2 nathanw return ((*tp->t_linesw->l_poll)(tp, events, p));
566 1.14.8.2 nathanw }
567 1.14.8.2 nathanw
568 1.14.8.2 nathanw struct tty *
569 1.14.8.2 nathanw sertty(dev)
570 1.14.8.2 nathanw dev_t dev;
571 1.14.8.2 nathanw {
572 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
573 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
574 1.14.8.2 nathanw
575 1.14.8.2 nathanw return (tp);
576 1.14.8.2 nathanw }
577 1.14.8.2 nathanw
578 1.14.8.2 nathanw int
579 1.14.8.2 nathanw serioctl(dev, cmd, data, flag, p)
580 1.14.8.2 nathanw dev_t dev;
581 1.14.8.2 nathanw u_long cmd;
582 1.14.8.2 nathanw caddr_t data;
583 1.14.8.2 nathanw int flag;
584 1.14.8.2 nathanw struct proc *p;
585 1.14.8.2 nathanw {
586 1.14.8.2 nathanw int unit = SERUNIT(dev);
587 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[unit];
588 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
589 1.14.8.2 nathanw int error;
590 1.14.8.2 nathanw
591 1.14.8.2 nathanw error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
592 1.14.8.2 nathanw if (error != EPASSTHROUGH)
593 1.14.8.2 nathanw return (error);
594 1.14.8.2 nathanw
595 1.14.8.2 nathanw error = ttioctl(tp, cmd, data, flag, p);
596 1.14.8.2 nathanw if (error != EPASSTHROUGH)
597 1.14.8.2 nathanw return (error);
598 1.14.8.2 nathanw
599 1.14.8.2 nathanw switch (cmd) {
600 1.14.8.2 nathanw case TIOCSBRK:
601 1.14.8.2 nathanw ser_break(sc, 1);
602 1.14.8.2 nathanw break;
603 1.14.8.2 nathanw
604 1.14.8.2 nathanw case TIOCCBRK:
605 1.14.8.2 nathanw ser_break(sc, 0);
606 1.14.8.2 nathanw break;
607 1.14.8.2 nathanw
608 1.14.8.2 nathanw case TIOCSDTR:
609 1.14.8.2 nathanw ser_modem(sc, 1);
610 1.14.8.2 nathanw break;
611 1.14.8.2 nathanw
612 1.14.8.2 nathanw case TIOCCDTR:
613 1.14.8.2 nathanw ser_modem(sc, 0);
614 1.14.8.2 nathanw break;
615 1.14.8.2 nathanw
616 1.14.8.2 nathanw case TIOCGFLAGS:
617 1.14.8.2 nathanw *(int *)data = sc->sc_swflags;
618 1.14.8.2 nathanw break;
619 1.14.8.2 nathanw
620 1.14.8.2 nathanw case TIOCSFLAGS:
621 1.14.8.2 nathanw error = suser(p->p_ucred, &p->p_acflag);
622 1.14.8.2 nathanw if (error)
623 1.14.8.2 nathanw return (error);
624 1.14.8.2 nathanw sc->sc_swflags = *(int *)data;
625 1.14.8.2 nathanw break;
626 1.14.8.2 nathanw
627 1.14.8.2 nathanw case TIOCMSET:
628 1.14.8.2 nathanw case TIOCMBIS:
629 1.14.8.2 nathanw case TIOCMBIC:
630 1.14.8.2 nathanw case TIOCMGET:
631 1.14.8.2 nathanw default:
632 1.14.8.2 nathanw return (EPASSTHROUGH);
633 1.14.8.2 nathanw }
634 1.14.8.2 nathanw
635 1.14.8.2 nathanw #ifdef SER_DEBUG
636 1.14.8.2 nathanw serstatus(sc, "serioctl ");
637 1.14.8.2 nathanw #endif
638 1.14.8.2 nathanw
639 1.14.8.2 nathanw return (0);
640 1.14.8.2 nathanw }
641 1.14.8.2 nathanw
642 1.14.8.2 nathanw void
643 1.14.8.2 nathanw ser_break(sc, onoff)
644 1.14.8.2 nathanw struct ser_softc *sc;
645 1.14.8.2 nathanw int onoff;
646 1.14.8.2 nathanw {
647 1.14.8.2 nathanw int s;
648 1.14.8.2 nathanw
649 1.14.8.2 nathanw s = splserial();
650 1.14.8.2 nathanw if (onoff)
651 1.14.8.2 nathanw SET(sc->sc_tsr, TSR_SBREAK);
652 1.14.8.2 nathanw else
653 1.14.8.2 nathanw CLR(sc->sc_tsr, TSR_SBREAK);
654 1.14.8.2 nathanw
655 1.14.8.2 nathanw if (!sc->sc_heldchange) {
656 1.14.8.2 nathanw if (sc->sc_tx_busy) {
657 1.14.8.2 nathanw sc->sc_heldtbc = sc->sc_tbc;
658 1.14.8.2 nathanw sc->sc_tbc = 0;
659 1.14.8.2 nathanw sc->sc_heldchange = 1;
660 1.14.8.2 nathanw } else
661 1.14.8.2 nathanw ser_loadchannelregs(sc);
662 1.14.8.2 nathanw }
663 1.14.8.2 nathanw splx(s);
664 1.14.8.2 nathanw }
665 1.14.8.2 nathanw
666 1.14.8.2 nathanw void
667 1.14.8.2 nathanw ser_modem(sc, onoff)
668 1.14.8.2 nathanw struct ser_softc *sc;
669 1.14.8.2 nathanw int onoff;
670 1.14.8.2 nathanw {
671 1.14.8.2 nathanw int s;
672 1.14.8.2 nathanw
673 1.14.8.2 nathanw s = splserial();
674 1.14.8.2 nathanw if (onoff)
675 1.14.8.2 nathanw SET(sc->sc_mcr, sc->sc_mcr_dtr);
676 1.14.8.2 nathanw else
677 1.14.8.2 nathanw CLR(sc->sc_mcr, sc->sc_mcr_dtr);
678 1.14.8.2 nathanw
679 1.14.8.2 nathanw if (!sc->sc_heldchange) {
680 1.14.8.2 nathanw if (sc->sc_tx_busy) {
681 1.14.8.2 nathanw sc->sc_heldtbc = sc->sc_tbc;
682 1.14.8.2 nathanw sc->sc_tbc = 0;
683 1.14.8.2 nathanw sc->sc_heldchange = 1;
684 1.14.8.2 nathanw } else
685 1.14.8.2 nathanw ser_loadchannelregs(sc);
686 1.14.8.2 nathanw }
687 1.14.8.2 nathanw splx(s);
688 1.14.8.2 nathanw }
689 1.14.8.2 nathanw
690 1.14.8.2 nathanw int
691 1.14.8.2 nathanw serparam(tp, t)
692 1.14.8.2 nathanw struct tty *tp;
693 1.14.8.2 nathanw struct termios *t;
694 1.14.8.2 nathanw {
695 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
696 1.14.8.2 nathanw int ospeed = serspeed(t->c_ospeed);
697 1.14.8.2 nathanw u_char ucr;
698 1.14.8.2 nathanw int s;
699 1.14.8.2 nathanw
700 1.14.8.2 nathanw /* check requested parameters */
701 1.14.8.2 nathanw if (ospeed < 0)
702 1.14.8.2 nathanw return (EINVAL);
703 1.14.8.2 nathanw if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
704 1.14.8.2 nathanw return (EINVAL);
705 1.14.8.2 nathanw
706 1.14.8.2 nathanw sc->sc_rsr = RSR_ENAB;
707 1.14.8.2 nathanw sc->sc_tsr = TSR_ENAB;
708 1.14.8.2 nathanw
709 1.14.8.2 nathanw ucr = UCR_CLKDIV;
710 1.14.8.2 nathanw
711 1.14.8.2 nathanw switch (ISSET(t->c_cflag, CSIZE)) {
712 1.14.8.2 nathanw case CS5:
713 1.14.8.2 nathanw SET(ucr, UCR_5BITS);
714 1.14.8.2 nathanw break;
715 1.14.8.2 nathanw case CS6:
716 1.14.8.2 nathanw SET(ucr, UCR_6BITS);
717 1.14.8.2 nathanw break;
718 1.14.8.2 nathanw case CS7:
719 1.14.8.2 nathanw SET(ucr, UCR_7BITS);
720 1.14.8.2 nathanw break;
721 1.14.8.2 nathanw case CS8:
722 1.14.8.2 nathanw SET(ucr, UCR_8BITS);
723 1.14.8.2 nathanw break;
724 1.14.8.2 nathanw }
725 1.14.8.2 nathanw if (ISSET(t->c_cflag, PARENB)) {
726 1.14.8.2 nathanw SET(ucr, UCR_PENAB);
727 1.14.8.2 nathanw if (!ISSET(t->c_cflag, PARODD))
728 1.14.8.2 nathanw SET(ucr, UCR_PEVEN);
729 1.14.8.2 nathanw }
730 1.14.8.2 nathanw if (ISSET(t->c_cflag, CSTOPB))
731 1.14.8.2 nathanw SET(ucr, UCR_STOPB2);
732 1.14.8.2 nathanw else
733 1.14.8.2 nathanw SET(ucr, UCR_STOPB1);
734 1.14.8.2 nathanw
735 1.14.8.2 nathanw s = splserial();
736 1.14.8.2 nathanw
737 1.14.8.2 nathanw sc->sc_ucr = ucr;
738 1.14.8.2 nathanw
739 1.14.8.2 nathanw /*
740 1.14.8.2 nathanw * For the console, always force CLOCAL and !HUPCL, so that the port
741 1.14.8.2 nathanw * is always active.
742 1.14.8.2 nathanw */
743 1.14.8.2 nathanw if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
744 1.14.8.2 nathanw ISSET(sc->sc_hwflags, SER_HW_CONSOLE)) {
745 1.14.8.2 nathanw SET(t->c_cflag, CLOCAL);
746 1.14.8.2 nathanw CLR(t->c_cflag, HUPCL);
747 1.14.8.2 nathanw }
748 1.14.8.2 nathanw
749 1.14.8.2 nathanw /*
750 1.14.8.2 nathanw * If we're not in a mode that assumes a connection is present, then
751 1.14.8.2 nathanw * ignore carrier changes.
752 1.14.8.2 nathanw */
753 1.14.8.2 nathanw if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
754 1.14.8.2 nathanw sc->sc_msr_dcd = 0;
755 1.14.8.2 nathanw else
756 1.14.8.2 nathanw sc->sc_msr_dcd = MCR_DCD;
757 1.14.8.2 nathanw /*
758 1.14.8.2 nathanw * Set the flow control pins depending on the current flow control
759 1.14.8.2 nathanw * mode.
760 1.14.8.2 nathanw */
761 1.14.8.2 nathanw if (ISSET(t->c_cflag, CRTSCTS)) {
762 1.14.8.2 nathanw sc->sc_mcr_dtr = MCR_DTR;
763 1.14.8.2 nathanw sc->sc_mcr_rts = MCR_RTS;
764 1.14.8.2 nathanw sc->sc_msr_cts = MCR_CTS;
765 1.14.8.2 nathanw sc->sc_r_hiwat = RXHIWAT;
766 1.14.8.2 nathanw } else if (ISSET(t->c_cflag, MDMBUF)) {
767 1.14.8.2 nathanw /*
768 1.14.8.2 nathanw * For DTR/DCD flow control, make sure we don't toggle DTR for
769 1.14.8.2 nathanw * carrier detection.
770 1.14.8.2 nathanw */
771 1.14.8.2 nathanw sc->sc_mcr_dtr = 0;
772 1.14.8.2 nathanw sc->sc_mcr_rts = MCR_DTR;
773 1.14.8.2 nathanw sc->sc_msr_cts = MCR_DCD;
774 1.14.8.2 nathanw sc->sc_r_hiwat = RXHIWAT;
775 1.14.8.2 nathanw } else {
776 1.14.8.2 nathanw /*
777 1.14.8.2 nathanw * If no flow control, then always set RTS. This will make
778 1.14.8.2 nathanw * the other side happy if it mistakenly thinks we're doing
779 1.14.8.2 nathanw * RTS/CTS flow control.
780 1.14.8.2 nathanw */
781 1.14.8.2 nathanw sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
782 1.14.8.2 nathanw sc->sc_mcr_rts = 0;
783 1.14.8.2 nathanw sc->sc_msr_cts = 0;
784 1.14.8.2 nathanw sc->sc_r_hiwat = 0;
785 1.14.8.2 nathanw if (ISSET(sc->sc_mcr, MCR_DTR))
786 1.14.8.2 nathanw SET(sc->sc_mcr, MCR_RTS);
787 1.14.8.2 nathanw else
788 1.14.8.2 nathanw CLR(sc->sc_mcr, MCR_RTS);
789 1.14.8.2 nathanw }
790 1.14.8.2 nathanw sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
791 1.14.8.2 nathanw
792 1.14.8.2 nathanw #if 0
793 1.14.8.2 nathanw if (ospeed == 0)
794 1.14.8.2 nathanw CLR(sc->sc_mcr, sc->sc_mcr_dtr);
795 1.14.8.2 nathanw else
796 1.14.8.2 nathanw SET(sc->sc_mcr, sc->sc_mcr_dtr);
797 1.14.8.2 nathanw #endif
798 1.14.8.2 nathanw
799 1.14.8.2 nathanw sc->sc_ospeed = ospeed;
800 1.14.8.2 nathanw
801 1.14.8.2 nathanw /* and copy to tty */
802 1.14.8.2 nathanw tp->t_ispeed = 0;
803 1.14.8.2 nathanw tp->t_ospeed = t->c_ospeed;
804 1.14.8.2 nathanw tp->t_cflag = t->c_cflag;
805 1.14.8.2 nathanw
806 1.14.8.2 nathanw if (!sc->sc_heldchange) {
807 1.14.8.2 nathanw if (sc->sc_tx_busy) {
808 1.14.8.2 nathanw sc->sc_heldtbc = sc->sc_tbc;
809 1.14.8.2 nathanw sc->sc_tbc = 0;
810 1.14.8.2 nathanw sc->sc_heldchange = 1;
811 1.14.8.2 nathanw } else
812 1.14.8.2 nathanw ser_loadchannelregs(sc);
813 1.14.8.2 nathanw }
814 1.14.8.2 nathanw
815 1.14.8.2 nathanw splx(s);
816 1.14.8.2 nathanw
817 1.14.8.2 nathanw /*
818 1.14.8.2 nathanw * Update the tty layer's idea of the carrier bit, in case we changed
819 1.14.8.2 nathanw * CLOCAL or MDMBUF. We don't hang up here; we only do that if we
820 1.14.8.2 nathanw * lose carrier while carrier detection is on.
821 1.14.8.2 nathanw */
822 1.14.8.2 nathanw (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MCR_DCD));
823 1.14.8.2 nathanw
824 1.14.8.2 nathanw #ifdef SER_DEBUG
825 1.14.8.2 nathanw serstatus(sc, "serparam ");
826 1.14.8.2 nathanw #endif
827 1.14.8.2 nathanw
828 1.14.8.2 nathanw /* XXXXX FIX ME */
829 1.14.8.2 nathanw /* Block or unblock as needed. */
830 1.14.8.2 nathanw if (!ISSET(t->c_cflag, CHWFLOW)) {
831 1.14.8.2 nathanw if (sc->sc_rx_blocked) {
832 1.14.8.2 nathanw sc->sc_rx_blocked = 0;
833 1.14.8.2 nathanw ser_hwiflow(sc, 0);
834 1.14.8.2 nathanw }
835 1.14.8.2 nathanw if (sc->sc_tx_stopped) {
836 1.14.8.2 nathanw sc->sc_tx_stopped = 0;
837 1.14.8.2 nathanw serstart(tp);
838 1.14.8.2 nathanw }
839 1.14.8.2 nathanw } else {
840 1.14.8.2 nathanw #if 0
841 1.14.8.2 nathanw sermsrint(sc, tp);
842 1.14.8.2 nathanw #endif
843 1.14.8.2 nathanw }
844 1.14.8.2 nathanw
845 1.14.8.2 nathanw return (0);
846 1.14.8.2 nathanw }
847 1.14.8.2 nathanw
848 1.14.8.2 nathanw void
849 1.14.8.2 nathanw ser_iflush(sc)
850 1.14.8.2 nathanw struct ser_softc *sc;
851 1.14.8.2 nathanw {
852 1.14.8.2 nathanw u_char tmp;
853 1.14.8.2 nathanw
854 1.14.8.2 nathanw /* flush any pending I/O */
855 1.14.8.2 nathanw while (ISSET(MFP->mf_rsr, RSR_CIP|RSR_BFULL))
856 1.14.8.2 nathanw tmp = MFP->mf_udr;
857 1.14.8.2 nathanw }
858 1.14.8.2 nathanw
859 1.14.8.2 nathanw void
860 1.14.8.2 nathanw ser_loadchannelregs(sc)
861 1.14.8.2 nathanw struct ser_softc *sc;
862 1.14.8.2 nathanw {
863 1.14.8.2 nathanw /* XXXXX necessary? */
864 1.14.8.2 nathanw ser_iflush(sc);
865 1.14.8.2 nathanw
866 1.14.8.2 nathanw /*
867 1.14.8.2 nathanw * No interrupts please...
868 1.14.8.2 nathanw */
869 1.14.8.2 nathanw if((MFP->mf_imra & (IA_RRDY|IA_RERR|IA_TRDY|IA_TERR)) != sc->sc_imra) {
870 1.14.8.2 nathanw printf("loadchannelregs: mf_imra: %x sc_imra: %x\n", (u_int)MFP->mf_imra,
871 1.14.8.2 nathanw (u_int)sc->sc_imra);
872 1.14.8.2 nathanw }
873 1.14.8.2 nathanw if((MFP->mf_imrb & (IB_SCTS|IB_SDCD)) != sc->sc_imrb) {
874 1.14.8.2 nathanw printf("loadchannelregs: mf_imrb: %x sc_imrb: %x\n", (u_int)MFP->mf_imrb,
875 1.14.8.2 nathanw (u_int)sc->sc_imrb);
876 1.14.8.2 nathanw }
877 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_imra, IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
878 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_imrb, IB_SCTS|IB_SDCD);
879 1.14.8.2 nathanw
880 1.14.8.2 nathanw MFP->mf_ucr = sc->sc_ucr;
881 1.14.8.2 nathanw MFP->mf_rsr = sc->sc_rsr;
882 1.14.8.2 nathanw MFP->mf_tsr = sc->sc_tsr;
883 1.14.8.2 nathanw
884 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_tcdcr, 0x07);
885 1.14.8.2 nathanw MFP->mf_tddr = sc->sc_ospeed;
886 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_tcdcr, (sc->sc_ospeed >> 8) & 0x0f);
887 1.14.8.2 nathanw
888 1.14.8.2 nathanw sc->sc_mcr_active = sc->sc_mcr;
889 1.14.8.2 nathanw
890 1.14.8.2 nathanw if (machineid & ATARI_HADES) {
891 1.14.8.2 nathanw /* PCB fault, wires exchanged..... */
892 1.14.8.2 nathanw ym2149_rts(!(sc->sc_mcr_active & MCR_DTR));
893 1.14.8.2 nathanw ym2149_dtr(!(sc->sc_mcr_active & MCR_RTS));
894 1.14.8.2 nathanw }
895 1.14.8.2 nathanw else {
896 1.14.8.2 nathanw ym2149_rts(!(sc->sc_mcr_active & MCR_RTS));
897 1.14.8.2 nathanw ym2149_dtr(!(sc->sc_mcr_active & MCR_DTR));
898 1.14.8.2 nathanw }
899 1.14.8.2 nathanw
900 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imra, sc->sc_imra);
901 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imrb, sc->sc_imrb);
902 1.14.8.2 nathanw }
903 1.14.8.2 nathanw
904 1.14.8.2 nathanw int
905 1.14.8.2 nathanw serhwiflow(tp, block)
906 1.14.8.2 nathanw struct tty *tp;
907 1.14.8.2 nathanw int block;
908 1.14.8.2 nathanw {
909 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
910 1.14.8.2 nathanw int s;
911 1.14.8.2 nathanw
912 1.14.8.2 nathanw if (sc->sc_mcr_rts == 0)
913 1.14.8.2 nathanw return (0);
914 1.14.8.2 nathanw
915 1.14.8.2 nathanw s = splserial();
916 1.14.8.2 nathanw if (block) {
917 1.14.8.2 nathanw /*
918 1.14.8.2 nathanw * The tty layer is asking us to block input.
919 1.14.8.2 nathanw * If we already did it, just return TRUE.
920 1.14.8.2 nathanw */
921 1.14.8.2 nathanw if (sc->sc_rx_blocked)
922 1.14.8.2 nathanw goto out;
923 1.14.8.2 nathanw sc->sc_rx_blocked = 1;
924 1.14.8.2 nathanw } else {
925 1.14.8.2 nathanw /*
926 1.14.8.2 nathanw * The tty layer is asking us to resume input.
927 1.14.8.2 nathanw * The input ring is always empty by now.
928 1.14.8.2 nathanw */
929 1.14.8.2 nathanw sc->sc_rx_blocked = 0;
930 1.14.8.2 nathanw }
931 1.14.8.2 nathanw ser_hwiflow(sc, block);
932 1.14.8.2 nathanw out:
933 1.14.8.2 nathanw splx(s);
934 1.14.8.2 nathanw return (1);
935 1.14.8.2 nathanw }
936 1.14.8.2 nathanw
937 1.14.8.2 nathanw /*
938 1.14.8.2 nathanw * (un)block input via hw flowcontrol
939 1.14.8.2 nathanw */
940 1.14.8.2 nathanw void
941 1.14.8.2 nathanw ser_hwiflow(sc, block)
942 1.14.8.2 nathanw struct ser_softc *sc;
943 1.14.8.2 nathanw int block;
944 1.14.8.2 nathanw {
945 1.14.8.2 nathanw if (sc->sc_mcr_rts == 0)
946 1.14.8.2 nathanw return;
947 1.14.8.2 nathanw
948 1.14.8.2 nathanw if (block) {
949 1.14.8.2 nathanw CLR(sc->sc_mcr, sc->sc_mcr_rts);
950 1.14.8.2 nathanw CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
951 1.14.8.2 nathanw } else {
952 1.14.8.2 nathanw SET(sc->sc_mcr, sc->sc_mcr_rts);
953 1.14.8.2 nathanw SET(sc->sc_mcr_active, sc->sc_mcr_rts);
954 1.14.8.2 nathanw }
955 1.14.8.2 nathanw if (machineid & ATARI_HADES) {
956 1.14.8.2 nathanw /* PCB fault, wires exchanged..... */
957 1.14.8.2 nathanw ym2149_dtr(sc->sc_mcr_active & MCR_RTS);
958 1.14.8.2 nathanw }
959 1.14.8.2 nathanw else {
960 1.14.8.2 nathanw ym2149_rts(sc->sc_mcr_active & MCR_RTS);
961 1.14.8.2 nathanw }
962 1.14.8.2 nathanw }
963 1.14.8.2 nathanw
964 1.14.8.2 nathanw void
965 1.14.8.2 nathanw serstart(tp)
966 1.14.8.2 nathanw struct tty *tp;
967 1.14.8.2 nathanw {
968 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
969 1.14.8.2 nathanw int s;
970 1.14.8.2 nathanw
971 1.14.8.2 nathanw s = spltty();
972 1.14.8.2 nathanw if (ISSET(tp->t_state, TS_BUSY))
973 1.14.8.2 nathanw goto out;
974 1.14.8.2 nathanw if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP))
975 1.14.8.2 nathanw goto stopped;
976 1.14.8.2 nathanw
977 1.14.8.2 nathanw if (sc->sc_tx_stopped)
978 1.14.8.2 nathanw goto stopped;
979 1.14.8.2 nathanw
980 1.14.8.2 nathanw if (tp->t_outq.c_cc <= tp->t_lowat) {
981 1.14.8.2 nathanw if (ISSET(tp->t_state, TS_ASLEEP)) {
982 1.14.8.2 nathanw CLR(tp->t_state, TS_ASLEEP);
983 1.14.8.2 nathanw wakeup(&tp->t_outq);
984 1.14.8.2 nathanw }
985 1.14.8.2 nathanw selwakeup(&tp->t_wsel);
986 1.14.8.2 nathanw if (tp->t_outq.c_cc == 0)
987 1.14.8.2 nathanw goto stopped;
988 1.14.8.2 nathanw }
989 1.14.8.2 nathanw
990 1.14.8.2 nathanw /* Grab the first contiguous region of buffer space. */
991 1.14.8.2 nathanw {
992 1.14.8.2 nathanw u_char *tba;
993 1.14.8.2 nathanw int tbc;
994 1.14.8.2 nathanw
995 1.14.8.2 nathanw tba = tp->t_outq.c_cf;
996 1.14.8.2 nathanw tbc = ndqb(&tp->t_outq, 0);
997 1.14.8.2 nathanw
998 1.14.8.2 nathanw (void)splserial();
999 1.14.8.2 nathanw
1000 1.14.8.2 nathanw sc->sc_tba = tba;
1001 1.14.8.2 nathanw sc->sc_tbc = tbc;
1002 1.14.8.2 nathanw }
1003 1.14.8.2 nathanw
1004 1.14.8.2 nathanw SET(tp->t_state, TS_BUSY);
1005 1.14.8.2 nathanw sc->sc_tx_busy = 1;
1006 1.14.8.2 nathanw
1007 1.14.8.2 nathanw /* Enable transmit completion interrupts if necessary. */
1008 1.14.8.2 nathanw if (!ISSET(sc->sc_imra, IA_TRDY)) {
1009 1.14.8.2 nathanw SET(sc->sc_imra, IA_TRDY|IA_TERR);
1010 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imra, IA_TRDY|IA_TERR);
1011 1.14.8.2 nathanw }
1012 1.14.8.2 nathanw
1013 1.14.8.2 nathanw /* Output the first char */
1014 1.14.8.2 nathanw MFP->mf_udr = *sc->sc_tba;
1015 1.14.8.2 nathanw sc->sc_tbc --;
1016 1.14.8.2 nathanw sc->sc_tba ++;
1017 1.14.8.2 nathanw
1018 1.14.8.2 nathanw splx(s);
1019 1.14.8.2 nathanw return;
1020 1.14.8.2 nathanw
1021 1.14.8.2 nathanw stopped:
1022 1.14.8.2 nathanw /* Disable transmit completion interrupts if necessary. */
1023 1.14.8.2 nathanw if (ISSET(sc->sc_imra, IA_TRDY)) {
1024 1.14.8.2 nathanw CLR(sc->sc_imra, IA_TRDY|IA_TERR);
1025 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_imra, IA_TRDY|IA_TERR);
1026 1.14.8.2 nathanw }
1027 1.14.8.2 nathanw out:
1028 1.14.8.2 nathanw splx(s);
1029 1.14.8.2 nathanw return;
1030 1.14.8.2 nathanw }
1031 1.14.8.2 nathanw
1032 1.14.8.2 nathanw /*
1033 1.14.8.2 nathanw * Stop output on a line.
1034 1.14.8.2 nathanw */
1035 1.14.8.2 nathanw void
1036 1.14.8.2 nathanw serstop(tp, flag)
1037 1.14.8.2 nathanw struct tty *tp;
1038 1.14.8.2 nathanw int flag;
1039 1.14.8.2 nathanw {
1040 1.14.8.2 nathanw struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
1041 1.14.8.2 nathanw int s;
1042 1.14.8.2 nathanw
1043 1.14.8.2 nathanw s = splserial();
1044 1.14.8.2 nathanw if (ISSET(tp->t_state, TS_BUSY)) {
1045 1.14.8.2 nathanw /* Stop transmitting at the next chunk. */
1046 1.14.8.2 nathanw sc->sc_tbc = 0;
1047 1.14.8.2 nathanw sc->sc_heldtbc = 0;
1048 1.14.8.2 nathanw if (!ISSET(tp->t_state, TS_TTSTOP))
1049 1.14.8.2 nathanw SET(tp->t_state, TS_FLUSH);
1050 1.14.8.2 nathanw }
1051 1.14.8.2 nathanw splx(s);
1052 1.14.8.2 nathanw }
1053 1.14.8.2 nathanw
1054 1.14.8.2 nathanw void
1055 1.14.8.2 nathanw serdiag(arg)
1056 1.14.8.2 nathanw void *arg;
1057 1.14.8.2 nathanw {
1058 1.14.8.2 nathanw struct ser_softc *sc = arg;
1059 1.14.8.2 nathanw int overflows, floods;
1060 1.14.8.2 nathanw int s;
1061 1.14.8.2 nathanw
1062 1.14.8.2 nathanw s = splserial();
1063 1.14.8.2 nathanw overflows = sc->sc_overflows;
1064 1.14.8.2 nathanw sc->sc_overflows = 0;
1065 1.14.8.2 nathanw floods = sc->sc_floods;
1066 1.14.8.2 nathanw sc->sc_floods = 0;
1067 1.14.8.2 nathanw sc->sc_errors = 0;
1068 1.14.8.2 nathanw splx(s);
1069 1.14.8.2 nathanw
1070 1.14.8.2 nathanw log(LOG_WARNING,
1071 1.14.8.2 nathanw "%s: %d silo overflow%s, %d ibuf flood%s\n",
1072 1.14.8.2 nathanw sc->sc_dev.dv_xname,
1073 1.14.8.2 nathanw overflows, overflows == 1 ? "" : "s",
1074 1.14.8.2 nathanw floods, floods == 1 ? "" : "s");
1075 1.14.8.2 nathanw }
1076 1.14.8.2 nathanw
1077 1.14.8.2 nathanw static
1078 1.14.8.2 nathanw void ser_shutdown(sc)
1079 1.14.8.2 nathanw struct ser_softc *sc;
1080 1.14.8.2 nathanw {
1081 1.14.8.2 nathanw int s;
1082 1.14.8.2 nathanw struct tty *tp = sc->sc_tty;
1083 1.14.8.2 nathanw
1084 1.14.8.2 nathanw
1085 1.14.8.2 nathanw s = splserial();
1086 1.14.8.2 nathanw
1087 1.14.8.2 nathanw /* If we were asserting flow control, then deassert it. */
1088 1.14.8.2 nathanw sc->sc_rx_blocked = 1;
1089 1.14.8.2 nathanw ser_hwiflow(sc, 1);
1090 1.14.8.2 nathanw
1091 1.14.8.2 nathanw /* Clear any break condition set with TIOCSBRK. */
1092 1.14.8.2 nathanw ser_break(sc, 0);
1093 1.14.8.2 nathanw
1094 1.14.8.2 nathanw /*
1095 1.14.8.2 nathanw * Hang up if necessary. Wait a bit, so the other side has time to
1096 1.14.8.2 nathanw * notice even if we immediately open the port again.
1097 1.14.8.2 nathanw */
1098 1.14.8.2 nathanw if (ISSET(tp->t_cflag, HUPCL)) {
1099 1.14.8.2 nathanw ser_modem(sc, 0);
1100 1.14.8.2 nathanw (void) tsleep(sc, TTIPRI, ttclos, hz);
1101 1.14.8.2 nathanw }
1102 1.14.8.2 nathanw
1103 1.14.8.2 nathanw /* Turn off interrupts. */
1104 1.14.8.2 nathanw CLR(sc->sc_imra, IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
1105 1.14.8.2 nathanw CLR(sc->sc_imrb, IB_SCTS|IB_SDCD);
1106 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_imrb, IB_SCTS|IB_SDCD);
1107 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_imra, IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
1108 1.14.8.2 nathanw splx(s);
1109 1.14.8.2 nathanw }
1110 1.14.8.2 nathanw
1111 1.14.8.2 nathanw static void
1112 1.14.8.2 nathanw serrxint(sc, tp)
1113 1.14.8.2 nathanw struct ser_softc *sc;
1114 1.14.8.2 nathanw struct tty *tp;
1115 1.14.8.2 nathanw {
1116 1.14.8.2 nathanw u_int get, cc, scc;
1117 1.14.8.2 nathanw int code;
1118 1.14.8.2 nathanw u_char rsr;
1119 1.14.8.2 nathanw int s;
1120 1.14.8.2 nathanw static int lsrmap[8] = {
1121 1.14.8.2 nathanw 0, TTY_PE,
1122 1.14.8.2 nathanw TTY_FE, TTY_PE|TTY_FE,
1123 1.14.8.2 nathanw TTY_FE, TTY_PE|TTY_FE,
1124 1.14.8.2 nathanw TTY_FE, TTY_PE|TTY_FE
1125 1.14.8.2 nathanw };
1126 1.14.8.2 nathanw
1127 1.14.8.2 nathanw get = sc->sc_rbget;
1128 1.14.8.2 nathanw scc = cc = RXBUFSIZE - sc->sc_rbavail;
1129 1.14.8.2 nathanw
1130 1.14.8.2 nathanw if (cc == RXBUFSIZE) {
1131 1.14.8.2 nathanw sc->sc_floods++;
1132 1.14.8.2 nathanw if (sc->sc_errors++ == 0)
1133 1.14.8.2 nathanw callout_reset(&sc->sc_diag_ch, 60 * hz, serdiag, sc);
1134 1.14.8.2 nathanw }
1135 1.14.8.2 nathanw
1136 1.14.8.2 nathanw while (cc--) {
1137 1.14.8.2 nathanw rsr = sc->sc_lbuf[get];
1138 1.14.8.2 nathanw if (ISSET(rsr, RSR_BREAK)) {
1139 1.14.8.2 nathanw #ifdef DDB
1140 1.14.8.2 nathanw if (ISSET(sc->sc_hwflags, SER_HW_CONSOLE))
1141 1.14.8.2 nathanw Debugger();
1142 1.14.8.2 nathanw #endif
1143 1.14.8.2 nathanw }
1144 1.14.8.2 nathanw else if (ISSET(rsr, RSR_OERR)) {
1145 1.14.8.2 nathanw sc->sc_overflows++;
1146 1.14.8.2 nathanw if (sc->sc_errors++ == 0)
1147 1.14.8.2 nathanw callout_reset(&sc->sc_diag_ch, 60 * hz,
1148 1.14.8.2 nathanw serdiag, sc);
1149 1.14.8.2 nathanw }
1150 1.14.8.2 nathanw code = sc->sc_rbuf[get] |
1151 1.14.8.2 nathanw lsrmap[(rsr & (RSR_BREAK|RSR_FERR|RSR_PERR)) >> 3];
1152 1.14.8.2 nathanw (*tp->t_linesw->l_rint)(code, tp);
1153 1.14.8.2 nathanw get = (get + 1) & RXBUFMASK;
1154 1.14.8.2 nathanw }
1155 1.14.8.2 nathanw
1156 1.14.8.2 nathanw sc->sc_rbget = get;
1157 1.14.8.2 nathanw s = splserial();
1158 1.14.8.2 nathanw sc->sc_rbavail += scc;
1159 1.14.8.2 nathanw /*
1160 1.14.8.2 nathanw * Buffers should be ok again, release possible block, but only if the
1161 1.14.8.2 nathanw * tty layer isn't blocking too.
1162 1.14.8.2 nathanw */
1163 1.14.8.2 nathanw if (sc->sc_rx_blocked && !ISSET(tp->t_state, TS_TBLOCK)) {
1164 1.14.8.2 nathanw sc->sc_rx_blocked = 0;
1165 1.14.8.2 nathanw ser_hwiflow(sc, 0);
1166 1.14.8.2 nathanw }
1167 1.14.8.2 nathanw splx(s);
1168 1.14.8.2 nathanw }
1169 1.14.8.2 nathanw
1170 1.14.8.2 nathanw static void
1171 1.14.8.2 nathanw sertxint(sc, tp)
1172 1.14.8.2 nathanw struct ser_softc *sc;
1173 1.14.8.2 nathanw struct tty *tp;
1174 1.14.8.2 nathanw {
1175 1.14.8.2 nathanw
1176 1.14.8.2 nathanw CLR(tp->t_state, TS_BUSY);
1177 1.14.8.2 nathanw if (ISSET(tp->t_state, TS_FLUSH))
1178 1.14.8.2 nathanw CLR(tp->t_state, TS_FLUSH);
1179 1.14.8.2 nathanw else
1180 1.14.8.2 nathanw ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
1181 1.14.8.2 nathanw (*tp->t_linesw->l_start)(tp);
1182 1.14.8.2 nathanw }
1183 1.14.8.2 nathanw
1184 1.14.8.2 nathanw static void
1185 1.14.8.2 nathanw sermsrint(sc, tp)
1186 1.14.8.2 nathanw struct ser_softc *sc;
1187 1.14.8.2 nathanw struct tty *tp;
1188 1.14.8.2 nathanw {
1189 1.14.8.2 nathanw u_char msr, delta;
1190 1.14.8.2 nathanw int s;
1191 1.14.8.2 nathanw
1192 1.14.8.2 nathanw s = splserial();
1193 1.14.8.2 nathanw msr = sc->sc_msr;
1194 1.14.8.2 nathanw delta = sc->sc_msr_delta;
1195 1.14.8.2 nathanw sc->sc_msr_delta = 0;
1196 1.14.8.2 nathanw splx(s);
1197 1.14.8.2 nathanw
1198 1.14.8.2 nathanw if (ISSET(delta, sc->sc_msr_dcd)) {
1199 1.14.8.2 nathanw /*
1200 1.14.8.2 nathanw * Inform the tty layer that carrier detect changed.
1201 1.14.8.2 nathanw */
1202 1.14.8.2 nathanw (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MCR_DCD));
1203 1.14.8.2 nathanw }
1204 1.14.8.2 nathanw
1205 1.14.8.2 nathanw if (ISSET(delta, sc->sc_msr_cts)) {
1206 1.14.8.2 nathanw /* Block or unblock output according to flow control. */
1207 1.14.8.2 nathanw if (ISSET(msr, sc->sc_msr_cts)) {
1208 1.14.8.2 nathanw sc->sc_tx_stopped = 0;
1209 1.14.8.2 nathanw (*tp->t_linesw->l_start)(tp);
1210 1.14.8.2 nathanw } else {
1211 1.14.8.2 nathanw sc->sc_tx_stopped = 1;
1212 1.14.8.2 nathanw serstop(tp, 0);
1213 1.14.8.2 nathanw }
1214 1.14.8.2 nathanw }
1215 1.14.8.2 nathanw
1216 1.14.8.2 nathanw #ifdef SER_DEBUG
1217 1.14.8.2 nathanw serstatus(sc, "sermsrint");
1218 1.14.8.2 nathanw #endif
1219 1.14.8.2 nathanw }
1220 1.14.8.2 nathanw
1221 1.14.8.2 nathanw void
1222 1.14.8.2 nathanw sersoft(arg)
1223 1.14.8.2 nathanw void *arg;
1224 1.14.8.2 nathanw {
1225 1.14.8.2 nathanw struct ser_softc *sc = arg;
1226 1.14.8.2 nathanw struct tty *tp;
1227 1.14.8.2 nathanw
1228 1.14.8.2 nathanw ser_softintr_scheduled = 0;
1229 1.14.8.2 nathanw
1230 1.14.8.2 nathanw tp = sc->sc_tty;
1231 1.14.8.2 nathanw if (tp == NULL)
1232 1.14.8.2 nathanw return;
1233 1.14.8.2 nathanw
1234 1.14.8.2 nathanw if (!ISSET(tp->t_state, TS_ISOPEN) && (tp->t_wopen == 0))
1235 1.14.8.2 nathanw return;
1236 1.14.8.2 nathanw
1237 1.14.8.2 nathanw if (sc->sc_rx_ready) {
1238 1.14.8.2 nathanw sc->sc_rx_ready = 0;
1239 1.14.8.2 nathanw serrxint(sc, tp);
1240 1.14.8.2 nathanw }
1241 1.14.8.2 nathanw
1242 1.14.8.2 nathanw if (sc->sc_st_check) {
1243 1.14.8.2 nathanw sc->sc_st_check = 0;
1244 1.14.8.2 nathanw sermsrint(sc, tp);
1245 1.14.8.2 nathanw }
1246 1.14.8.2 nathanw
1247 1.14.8.2 nathanw if (sc->sc_tx_done) {
1248 1.14.8.2 nathanw sc->sc_tx_done = 0;
1249 1.14.8.2 nathanw sertxint(sc, tp);
1250 1.14.8.2 nathanw }
1251 1.14.8.2 nathanw }
1252 1.14.8.2 nathanw
1253 1.14.8.2 nathanw int
1254 1.14.8.2 nathanw sermintr(arg)
1255 1.14.8.2 nathanw void *arg;
1256 1.14.8.2 nathanw {
1257 1.14.8.2 nathanw struct ser_softc *sc = arg;
1258 1.14.8.2 nathanw u_char msr, delta;
1259 1.14.8.2 nathanw
1260 1.14.8.2 nathanw msr = ~MFP->mf_gpip;
1261 1.14.8.2 nathanw delta = msr ^ sc->sc_msr;
1262 1.14.8.2 nathanw sc->sc_msr = sc->sc_msr & ~(MCR_CTS|MCR_DCD|MCR_RI);
1263 1.14.8.2 nathanw sc->sc_msr |= msr & (MCR_CTS|MCR_DCD|MCR_RI);
1264 1.14.8.2 nathanw
1265 1.14.8.2 nathanw if (ISSET(delta, sc->sc_msr_mask)) {
1266 1.14.8.2 nathanw sc->sc_msr_delta |= delta;
1267 1.14.8.2 nathanw
1268 1.14.8.2 nathanw /*
1269 1.14.8.2 nathanw * Stop output immediately if we lose the output
1270 1.14.8.2 nathanw * flow control signal or carrier detect.
1271 1.14.8.2 nathanw */
1272 1.14.8.2 nathanw if (ISSET(~msr, sc->sc_msr_mask)) {
1273 1.14.8.2 nathanw sc->sc_tbc = 0;
1274 1.14.8.2 nathanw sc->sc_heldtbc = 0;
1275 1.14.8.2 nathanw #ifdef SER_DEBUG
1276 1.14.8.2 nathanw serstatus(sc, "sermintr ");
1277 1.14.8.2 nathanw #endif
1278 1.14.8.2 nathanw }
1279 1.14.8.2 nathanw
1280 1.14.8.2 nathanw sc->sc_st_check = 1;
1281 1.14.8.2 nathanw }
1282 1.14.8.2 nathanw if (!ser_softintr_scheduled)
1283 1.14.8.2 nathanw add_sicallback((si_farg)sersoft, sc, 0);
1284 1.14.8.2 nathanw return 1;
1285 1.14.8.2 nathanw }
1286 1.14.8.2 nathanw
1287 1.14.8.2 nathanw int
1288 1.14.8.2 nathanw sertrintr(arg)
1289 1.14.8.2 nathanw void *arg;
1290 1.14.8.2 nathanw {
1291 1.14.8.2 nathanw struct ser_softc *sc = arg;
1292 1.14.8.2 nathanw u_int put, cc;
1293 1.14.8.2 nathanw u_char rsr, tsr;
1294 1.14.8.2 nathanw
1295 1.14.8.2 nathanw put = sc->sc_rbput;
1296 1.14.8.2 nathanw cc = sc->sc_rbavail;
1297 1.14.8.2 nathanw
1298 1.14.8.2 nathanw rsr = MFP->mf_rsr;
1299 1.14.8.2 nathanw if (ISSET(rsr, RSR_BFULL|RSR_BREAK)) {
1300 1.14.8.2 nathanw for (; ISSET(rsr, RSR_BFULL|RSR_BREAK) && cc > 0; cc--) {
1301 1.14.8.2 nathanw sc->sc_rbuf[put] = MFP->mf_udr;
1302 1.14.8.2 nathanw sc->sc_lbuf[put] = rsr;
1303 1.14.8.2 nathanw put = (put + 1) & RXBUFMASK;
1304 1.14.8.2 nathanw if ((rsr & RSR_BREAK) && (MFP->mf_rsr & RSR_BREAK))
1305 1.14.8.2 nathanw rsr = 0;
1306 1.14.8.2 nathanw else rsr = MFP->mf_rsr;
1307 1.14.8.2 nathanw }
1308 1.14.8.2 nathanw /*
1309 1.14.8.2 nathanw * Current string of incoming characters ended because
1310 1.14.8.2 nathanw * no more data was available. Schedule a receive event
1311 1.14.8.2 nathanw * if any data was received. Drop any characters that
1312 1.14.8.2 nathanw * we couldn't handle.
1313 1.14.8.2 nathanw */
1314 1.14.8.2 nathanw sc->sc_rbput = put;
1315 1.14.8.2 nathanw sc->sc_rbavail = cc;
1316 1.14.8.2 nathanw sc->sc_rx_ready = 1;
1317 1.14.8.2 nathanw /*
1318 1.14.8.2 nathanw * See if we are in danger of overflowing a buffer. If
1319 1.14.8.2 nathanw * so, use hardware flow control to ease the pressure.
1320 1.14.8.2 nathanw */
1321 1.14.8.2 nathanw if (sc->sc_rx_blocked == 0 &&
1322 1.14.8.2 nathanw cc < sc->sc_r_hiwat) {
1323 1.14.8.2 nathanw sc->sc_rx_blocked = 1;
1324 1.14.8.2 nathanw ser_hwiflow(sc, 1);
1325 1.14.8.2 nathanw }
1326 1.14.8.2 nathanw /*
1327 1.14.8.2 nathanw * If we're out of space, throw away any further input.
1328 1.14.8.2 nathanw */
1329 1.14.8.2 nathanw if (!cc) {
1330 1.14.8.2 nathanw while (ISSET(rsr, RSR_BFULL|RSR_BREAK)) {
1331 1.14.8.2 nathanw rsr = MFP->mf_udr;
1332 1.14.8.2 nathanw rsr = MFP->mf_rsr;
1333 1.14.8.2 nathanw }
1334 1.14.8.2 nathanw }
1335 1.14.8.2 nathanw }
1336 1.14.8.2 nathanw
1337 1.14.8.2 nathanw /*
1338 1.14.8.2 nathanw * Done handling any receive interrupts. See if data can be
1339 1.14.8.2 nathanw * transmitted as well. Schedule tx done event if no data left
1340 1.14.8.2 nathanw * and tty was marked busy.
1341 1.14.8.2 nathanw */
1342 1.14.8.2 nathanw tsr = MFP->mf_tsr;
1343 1.14.8.2 nathanw if (ISSET(tsr, TSR_BE)) {
1344 1.14.8.2 nathanw /*
1345 1.14.8.2 nathanw * If we've delayed a parameter change, do it now, and restart
1346 1.14.8.2 nathanw * output.
1347 1.14.8.2 nathanw */
1348 1.14.8.2 nathanw if (sc->sc_heldchange) {
1349 1.14.8.2 nathanw ser_loadchannelregs(sc);
1350 1.14.8.2 nathanw sc->sc_heldchange = 0;
1351 1.14.8.2 nathanw sc->sc_tbc = sc->sc_heldtbc;
1352 1.14.8.2 nathanw sc->sc_heldtbc = 0;
1353 1.14.8.2 nathanw }
1354 1.14.8.2 nathanw /* Output the next character, if any. */
1355 1.14.8.2 nathanw if (sc->sc_tbc > 0) {
1356 1.14.8.2 nathanw MFP->mf_udr = *sc->sc_tba;
1357 1.14.8.2 nathanw sc->sc_tbc --;
1358 1.14.8.2 nathanw sc->sc_tba ++;
1359 1.14.8.2 nathanw } else if (sc->sc_tx_busy) {
1360 1.14.8.2 nathanw sc->sc_tx_busy = 0;
1361 1.14.8.2 nathanw sc->sc_tx_done = 1;
1362 1.14.8.2 nathanw }
1363 1.14.8.2 nathanw }
1364 1.14.8.2 nathanw
1365 1.14.8.2 nathanw if (!ser_softintr_scheduled)
1366 1.14.8.2 nathanw add_sicallback((si_farg)sersoft, sc, 0);
1367 1.14.8.2 nathanw return 1;
1368 1.14.8.2 nathanw }
1369 1.14.8.2 nathanw
1370 1.14.8.2 nathanw static int
1371 1.14.8.2 nathanw serspeed(speed)
1372 1.14.8.2 nathanw long speed;
1373 1.14.8.2 nathanw {
1374 1.14.8.2 nathanw #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */
1375 1.14.8.2 nathanw
1376 1.14.8.2 nathanw int div, x, err;
1377 1.14.8.2 nathanw
1378 1.14.8.2 nathanw if (speed <= 0)
1379 1.14.8.2 nathanw return (-1);
1380 1.14.8.2 nathanw
1381 1.14.8.2 nathanw for (div = 4; div <= 64; div *= 4) {
1382 1.14.8.2 nathanw x = divrnd((SER_FREQ / div), speed);
1383 1.14.8.2 nathanw
1384 1.14.8.2 nathanw /*
1385 1.14.8.2 nathanw * The value must fit in the timer-d dataregister. If
1386 1.14.8.2 nathanw * not, try another delay-mode.
1387 1.14.8.2 nathanw */
1388 1.14.8.2 nathanw if ((x/2) > 255)
1389 1.14.8.2 nathanw continue;
1390 1.14.8.2 nathanw
1391 1.14.8.2 nathanw /*
1392 1.14.8.2 nathanw * Baudrate to high for the interface or cannot be made
1393 1.14.8.2 nathanw * within tolerance.
1394 1.14.8.2 nathanw */
1395 1.14.8.2 nathanw if (x <= 0)
1396 1.14.8.2 nathanw return (-1);
1397 1.14.8.2 nathanw
1398 1.14.8.2 nathanw err = divrnd((SER_FREQ / div) * 1000, speed * x) - 1000;
1399 1.14.8.2 nathanw if (err < 0)
1400 1.14.8.2 nathanw err = -err;
1401 1.14.8.2 nathanw if (err > SER_TOLERANCE)
1402 1.14.8.2 nathanw continue;
1403 1.14.8.2 nathanw
1404 1.14.8.2 nathanw /*
1405 1.14.8.2 nathanw * Translate 'div' to delay-code
1406 1.14.8.2 nathanw */
1407 1.14.8.2 nathanw if (div == 4)
1408 1.14.8.2 nathanw div = 1;
1409 1.14.8.2 nathanw else if (div == 16)
1410 1.14.8.2 nathanw div = 3;
1411 1.14.8.2 nathanw else if (div == 64)
1412 1.14.8.2 nathanw div = 5;
1413 1.14.8.2 nathanw
1414 1.14.8.2 nathanw return ((x/2) | (div << 8));
1415 1.14.8.2 nathanw }
1416 1.14.8.2 nathanw return (-1);
1417 1.14.8.2 nathanw
1418 1.14.8.3 nathanw #undef divrnd
1419 1.14.8.2 nathanw }
1420 1.14.8.2 nathanw
1421 1.14.8.2 nathanw /*
1422 1.14.8.2 nathanw * Following are all routines needed for SER to act as console
1423 1.14.8.2 nathanw */
1424 1.14.8.2 nathanw #include <dev/cons.h>
1425 1.14.8.2 nathanw
1426 1.14.8.2 nathanw void
1427 1.14.8.2 nathanw sercnprobe(cp)
1428 1.14.8.2 nathanw struct consdev *cp;
1429 1.14.8.2 nathanw {
1430 1.14.8.2 nathanw /*
1431 1.14.8.2 nathanw * Activate serial console when DCD present...
1432 1.14.8.2 nathanw */
1433 1.14.8.2 nathanw if (MFP->mf_gpip & MCR_DCD) {
1434 1.14.8.2 nathanw cp->cn_pri = CN_DEAD;
1435 1.14.8.2 nathanw return;
1436 1.14.8.2 nathanw }
1437 1.14.8.2 nathanw
1438 1.14.8.2 nathanw /* initialize required fields */
1439 1.14.8.4 nathanw /* XXX: LWP What unit? */
1440 1.14.8.4 nathanw cp->cn_dev = makedev(cdevsw_lookup_major(&ser_cdevsw), 0);
1441 1.14.8.4 nathanw #if SERCONSOLE > 0
1442 1.14.8.2 nathanw cp->cn_pri = CN_REMOTE; /* Force a serial port console */
1443 1.14.8.2 nathanw #else
1444 1.14.8.2 nathanw cp->cn_pri = CN_NORMAL;
1445 1.14.8.4 nathanw #endif /* SERCONSOLE > 0 */
1446 1.14.8.2 nathanw }
1447 1.14.8.2 nathanw
1448 1.14.8.2 nathanw void
1449 1.14.8.2 nathanw sercninit(cp)
1450 1.14.8.2 nathanw struct consdev *cp;
1451 1.14.8.2 nathanw {
1452 1.14.8.2 nathanw serinitcons(CONSBAUD);
1453 1.14.8.2 nathanw }
1454 1.14.8.2 nathanw
1455 1.14.8.2 nathanw /*
1456 1.14.8.2 nathanw * Initialize UART to known state.
1457 1.14.8.2 nathanw */
1458 1.14.8.2 nathanw void
1459 1.14.8.2 nathanw serinit(baud)
1460 1.14.8.2 nathanw int baud;
1461 1.14.8.2 nathanw {
1462 1.14.8.2 nathanw int ospeed = serspeed(baud);
1463 1.14.8.2 nathanw
1464 1.14.8.2 nathanw MFP->mf_ucr = UCR_CLKDIV|UCR_8BITS|UCR_STOPB1;
1465 1.14.8.2 nathanw MFP->mf_rsr = RSR_ENAB;
1466 1.14.8.2 nathanw MFP->mf_tsr = TSR_ENAB;
1467 1.14.8.2 nathanw
1468 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_tcdcr, 0x07);
1469 1.14.8.2 nathanw MFP->mf_tddr = ospeed;
1470 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_tcdcr, (ospeed >> 8) & 0x0f);
1471 1.14.8.2 nathanw }
1472 1.14.8.2 nathanw
1473 1.14.8.2 nathanw /*
1474 1.14.8.2 nathanw * Set UART for console use. Do normal init, then enable interrupts.
1475 1.14.8.2 nathanw */
1476 1.14.8.2 nathanw void
1477 1.14.8.2 nathanw serinitcons(baud)
1478 1.14.8.2 nathanw int baud;
1479 1.14.8.2 nathanw {
1480 1.14.8.2 nathanw serinit(baud);
1481 1.14.8.2 nathanw
1482 1.14.8.2 nathanw /* Set rts/dtr */
1483 1.14.8.2 nathanw ym2149_rts(0);
1484 1.14.8.2 nathanw ym2149_dtr(0);
1485 1.14.8.2 nathanw
1486 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imra, (IA_RRDY|IA_RERR|IA_TRDY|IA_TERR));
1487 1.14.8.2 nathanw }
1488 1.14.8.2 nathanw
1489 1.14.8.2 nathanw int
1490 1.14.8.2 nathanw sercngetc(dev)
1491 1.14.8.2 nathanw dev_t dev;
1492 1.14.8.2 nathanw {
1493 1.14.8.2 nathanw u_char stat, c;
1494 1.14.8.2 nathanw int s;
1495 1.14.8.2 nathanw
1496 1.14.8.2 nathanw s = splserial();
1497 1.14.8.2 nathanw while (!ISSET(stat = MFP->mf_rsr, RSR_BFULL)) {
1498 1.14.8.2 nathanw if (!ISSET(stat, RSR_ENAB)) /* XXX */
1499 1.14.8.2 nathanw MFP->mf_rsr |= RSR_ENAB;
1500 1.14.8.2 nathanw if (stat & (RSR_FERR|RSR_PERR|RSR_OERR))
1501 1.14.8.2 nathanw c = MFP->mf_udr;
1502 1.14.8.2 nathanw }
1503 1.14.8.2 nathanw c = MFP->mf_udr;
1504 1.14.8.2 nathanw splx(s);
1505 1.14.8.2 nathanw return c;
1506 1.14.8.2 nathanw }
1507 1.14.8.2 nathanw
1508 1.14.8.2 nathanw u_int s_imra;
1509 1.14.8.2 nathanw u_int s_stat1, s_stat2, s_stat3;
1510 1.14.8.2 nathanw void
1511 1.14.8.2 nathanw sercnputc(dev, c)
1512 1.14.8.2 nathanw dev_t dev;
1513 1.14.8.2 nathanw int c;
1514 1.14.8.2 nathanw {
1515 1.14.8.2 nathanw int timo;
1516 1.14.8.2 nathanw u_char stat, imra;
1517 1.14.8.2 nathanw
1518 1.14.8.2 nathanw /* Mask serial interrupts */
1519 1.14.8.2 nathanw imra = MFP->mf_imra & (IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
1520 1.14.8.2 nathanw single_inst_bclr_b(MFP->mf_imra, imra);
1521 1.14.8.2 nathanw s_imra = imra;
1522 1.14.8.2 nathanw
1523 1.14.8.2 nathanw /* wait for any pending transmission to finish */
1524 1.14.8.2 nathanw timo = 50000;
1525 1.14.8.2 nathanw s_stat1 = MFP->mf_tsr;
1526 1.14.8.2 nathanw while (!ISSET(stat = MFP->mf_tsr, TSR_BE) && --timo)
1527 1.14.8.2 nathanw ;
1528 1.14.8.2 nathanw MFP->mf_udr = c;
1529 1.14.8.2 nathanw /* wait for this transmission to complete */
1530 1.14.8.2 nathanw timo = 1500000;
1531 1.14.8.2 nathanw s_stat2 = MFP->mf_tsr;
1532 1.14.8.2 nathanw while (!ISSET(stat = MFP->mf_tsr, TSR_BE) && --timo)
1533 1.14.8.2 nathanw ;
1534 1.14.8.2 nathanw
1535 1.14.8.2 nathanw s_stat3 = MFP->mf_tsr;
1536 1.14.8.2 nathanw /* Clear pending serial interrupts and re-enable */
1537 1.14.8.2 nathanw MFP->mf_ipra = (u_int8_t)~imra;
1538 1.14.8.2 nathanw single_inst_bset_b(MFP->mf_imra, imra);
1539 1.14.8.2 nathanw }
1540 1.14.8.2 nathanw
1541 1.14.8.2 nathanw void
1542 1.14.8.2 nathanw sercnpollc(dev, on)
1543 1.14.8.2 nathanw dev_t dev;
1544 1.14.8.2 nathanw int on;
1545 1.14.8.2 nathanw {
1546 1.14.8.2 nathanw
1547 1.14.8.2 nathanw }
1548