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ser.c revision 1.14.8.5
      1  1.14.8.5  nathanw /*	$NetBSD: ser.c,v 1.14.8.5 2002/10/18 02:35:56 nathanw Exp $	*/
      2  1.14.8.2  nathanw 
      3  1.14.8.2  nathanw /*-
      4  1.14.8.2  nathanw  * Copyright (c) 1997 The NetBSD Foundation, Inc.
      5  1.14.8.2  nathanw  * All rights reserved.
      6  1.14.8.2  nathanw  *
      7  1.14.8.2  nathanw  * This code is derived from software contributed to The NetBSD Foundation
      8  1.14.8.2  nathanw  * by Leo Weppelman.
      9  1.14.8.2  nathanw  *
     10  1.14.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
     11  1.14.8.2  nathanw  * modification, are permitted provided that the following conditions
     12  1.14.8.2  nathanw  * are met:
     13  1.14.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     14  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     15  1.14.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     17  1.14.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     18  1.14.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     19  1.14.8.2  nathanw  *    must display the following acknowledgement:
     20  1.14.8.2  nathanw  *        This product includes software developed by the NetBSD
     21  1.14.8.2  nathanw  *        Foundation, Inc. and its contributors.
     22  1.14.8.2  nathanw  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.14.8.2  nathanw  *    contributors may be used to endorse or promote products derived
     24  1.14.8.2  nathanw  *    from this software without specific prior written permission.
     25  1.14.8.2  nathanw  *
     26  1.14.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.14.8.2  nathanw  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.14.8.2  nathanw  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.14.8.2  nathanw  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.14.8.2  nathanw  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.14.8.2  nathanw  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.14.8.2  nathanw  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.14.8.2  nathanw  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.14.8.2  nathanw  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.14.8.2  nathanw  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.14.8.2  nathanw  * POSSIBILITY OF SUCH DAMAGE.
     37  1.14.8.2  nathanw  */
     38  1.14.8.2  nathanw /*-
     39  1.14.8.2  nathanw  * Copyright (c) 1993, 1994, 1995, 1996, 1997
     40  1.14.8.2  nathanw  *      Charles M. Hannum.  All rights reserved.
     41  1.14.8.2  nathanw  *
     42  1.14.8.2  nathanw  * Interrupt processing and hardware flow control partly based on code from
     43  1.14.8.2  nathanw  * Onno van der Linden and Gordon Ross.
     44  1.14.8.2  nathanw  *
     45  1.14.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
     46  1.14.8.2  nathanw  * modification, are permitted provided that the following conditions
     47  1.14.8.2  nathanw  * are met:
     48  1.14.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     49  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     50  1.14.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     51  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     52  1.14.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     53  1.14.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     54  1.14.8.2  nathanw  *    must display the following acknowledgement:
     55  1.14.8.2  nathanw  *      This product includes software developed by Charles M. Hannum.
     56  1.14.8.2  nathanw  * 4. The name of the author may not be used to endorse or promote products
     57  1.14.8.2  nathanw  *    derived from this software without specific prior written permission.
     58  1.14.8.2  nathanw  *
     59  1.14.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     60  1.14.8.2  nathanw  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     61  1.14.8.2  nathanw  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     62  1.14.8.2  nathanw  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     63  1.14.8.2  nathanw  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     64  1.14.8.2  nathanw  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     65  1.14.8.2  nathanw  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     66  1.14.8.2  nathanw  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     67  1.14.8.2  nathanw  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     68  1.14.8.2  nathanw  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     69  1.14.8.2  nathanw  */
     70  1.14.8.2  nathanw 
     71  1.14.8.2  nathanw /*
     72  1.14.8.2  nathanw  * Copyright (c) 1991 The Regents of the University of California.
     73  1.14.8.2  nathanw  * All rights reserved.
     74  1.14.8.2  nathanw  *
     75  1.14.8.2  nathanw  * Redistribution and use in source and binary forms, with or without
     76  1.14.8.2  nathanw  * modification, are permitted provided that the following conditions
     77  1.14.8.2  nathanw  * are met:
     78  1.14.8.2  nathanw  * 1. Redistributions of source code must retain the above copyright
     79  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer.
     80  1.14.8.2  nathanw  * 2. Redistributions in binary form must reproduce the above copyright
     81  1.14.8.2  nathanw  *    notice, this list of conditions and the following disclaimer in the
     82  1.14.8.2  nathanw  *    documentation and/or other materials provided with the distribution.
     83  1.14.8.2  nathanw  * 3. All advertising materials mentioning features or use of this software
     84  1.14.8.2  nathanw  *    must display the following acknowledgement:
     85  1.14.8.2  nathanw  *      This product includes software developed by the University of
     86  1.14.8.2  nathanw  *      California, Berkeley and its contributors.
     87  1.14.8.2  nathanw  * 4. Neither the name of the University nor the names of its contributors
     88  1.14.8.2  nathanw  *    may be used to endorse or promote products derived from this software
     89  1.14.8.2  nathanw  *    without specific prior written permission.
     90  1.14.8.2  nathanw  *
     91  1.14.8.2  nathanw  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     92  1.14.8.2  nathanw  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     93  1.14.8.2  nathanw  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     94  1.14.8.2  nathanw  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     95  1.14.8.2  nathanw  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     96  1.14.8.2  nathanw  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     97  1.14.8.2  nathanw  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     98  1.14.8.2  nathanw  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     99  1.14.8.2  nathanw  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
    100  1.14.8.2  nathanw  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
    101  1.14.8.2  nathanw  * SUCH DAMAGE.
    102  1.14.8.2  nathanw  *
    103  1.14.8.2  nathanw  *      @(#)com.c       7.5 (Berkeley) 5/16/91
    104  1.14.8.2  nathanw  */
    105  1.14.8.2  nathanw 
    106  1.14.8.2  nathanw #include "opt_ddb.h"
    107  1.14.8.2  nathanw #include "opt_mbtype.h"
    108  1.14.8.4  nathanw #include "opt_serconsole.h"
    109  1.14.8.2  nathanw 
    110  1.14.8.2  nathanw #include <sys/param.h>
    111  1.14.8.2  nathanw #include <sys/systm.h>
    112  1.14.8.2  nathanw #include <sys/ioctl.h>
    113  1.14.8.2  nathanw #include <sys/select.h>
    114  1.14.8.2  nathanw #include <sys/tty.h>
    115  1.14.8.2  nathanw #include <sys/proc.h>
    116  1.14.8.2  nathanw #include <sys/user.h>
    117  1.14.8.2  nathanw #include <sys/conf.h>
    118  1.14.8.2  nathanw #include <sys/file.h>
    119  1.14.8.2  nathanw #include <sys/uio.h>
    120  1.14.8.2  nathanw #include <sys/kernel.h>
    121  1.14.8.2  nathanw #include <sys/syslog.h>
    122  1.14.8.2  nathanw #include <sys/types.h>
    123  1.14.8.2  nathanw #include <sys/device.h>
    124  1.14.8.2  nathanw 
    125  1.14.8.2  nathanw #include <m68k/asm_single.h>
    126  1.14.8.2  nathanw 
    127  1.14.8.2  nathanw #include <machine/iomap.h>
    128  1.14.8.2  nathanw #include <machine/mfp.h>
    129  1.14.8.2  nathanw #include <atari/atari/intr.h>
    130  1.14.8.2  nathanw #include <atari/dev/serreg.h>
    131  1.14.8.2  nathanw 
    132  1.14.8.2  nathanw #if !defined(_MILANHW_)
    133  1.14.8.2  nathanw #include <atari/dev/ym2149reg.h>
    134  1.14.8.2  nathanw #else
    135  1.14.8.2  nathanw 	/* MILAN has no ym2149 */
    136  1.14.8.2  nathanw #define ym2149_dtr(set) {					\
    137  1.14.8.2  nathanw 	if (set)						\
    138  1.14.8.2  nathanw 		single_inst_bset_b(MFP->mf_gpip, 0x08);		\
    139  1.14.8.2  nathanw 	else single_inst_bclr_b(MFP->mf_gpip, 0x08);		\
    140  1.14.8.2  nathanw }
    141  1.14.8.2  nathanw 
    142  1.14.8.2  nathanw #define ym2149_rts(set) {					\
    143  1.14.8.2  nathanw 	if (set)						\
    144  1.14.8.2  nathanw 		single_inst_bset_b(MFP->mf_gpip, 0x01);		\
    145  1.14.8.2  nathanw 	else single_inst_bclr_b(MFP->mf_gpip, 0x01);		\
    146  1.14.8.2  nathanw }
    147  1.14.8.2  nathanw #endif /* _MILANHW_ */
    148  1.14.8.2  nathanw 
    149  1.14.8.2  nathanw /* #define SER_DEBUG */
    150  1.14.8.2  nathanw 
    151  1.14.8.2  nathanw #define	SERUNIT(x)	(minor(x) & 0x7ffff)
    152  1.14.8.2  nathanw #define	SERDIALOUT(x)	(minor(x) & 0x80000)
    153  1.14.8.2  nathanw 
    154  1.14.8.2  nathanw /* XXX */
    155  1.14.8.2  nathanw #define	CONSBAUD	9600
    156  1.14.8.2  nathanw #define	CONSCFLAG	TTYDEF_CFLAG
    157  1.14.8.2  nathanw /* end XXX */
    158  1.14.8.2  nathanw 
    159  1.14.8.2  nathanw /* Macros to clear/set/test flags. */
    160  1.14.8.2  nathanw #define SET(t, f)	(t) |= (f)
    161  1.14.8.2  nathanw #define CLR(t, f)	(t) &= ~(f)
    162  1.14.8.2  nathanw #define ISSET(t, f)	((t) & (f))
    163  1.14.8.2  nathanw 
    164  1.14.8.2  nathanw #define	splserial()	spl6()
    165  1.14.8.2  nathanw 
    166  1.14.8.2  nathanw /* Buffer size for character buffer */
    167  1.14.8.2  nathanw #define RXBUFSIZE 2048		/* More than enough..			*/
    168  1.14.8.2  nathanw #define RXBUFMASK (RXBUFSIZE-1)	/* Only iff previous is a power of 2	*/
    169  1.14.8.2  nathanw #define RXHIWAT   (RXBUFSIZE >> 2)
    170  1.14.8.2  nathanw 
    171  1.14.8.2  nathanw struct ser_softc {
    172  1.14.8.2  nathanw 	struct device	 sc_dev;
    173  1.14.8.2  nathanw 	struct tty	*sc_tty;
    174  1.14.8.2  nathanw 
    175  1.14.8.2  nathanw 	struct callout sc_diag_ch;
    176  1.14.8.2  nathanw 
    177  1.14.8.2  nathanw 	int		 sc_overflows;
    178  1.14.8.2  nathanw 	int		 sc_floods;
    179  1.14.8.2  nathanw 	int		 sc_errors;
    180  1.14.8.2  nathanw 
    181  1.14.8.2  nathanw 	u_char		 sc_hwflags;
    182  1.14.8.2  nathanw 	u_char		 sc_swflags;
    183  1.14.8.2  nathanw 
    184  1.14.8.2  nathanw 	int		 sc_ospeed;		/* delay + timer-d data	*/
    185  1.14.8.2  nathanw 	u_char		 sc_imra;
    186  1.14.8.2  nathanw 	u_char		 sc_imrb;
    187  1.14.8.2  nathanw 	u_char		 sc_ucr;		/* Uart control		*/
    188  1.14.8.2  nathanw 	u_char		 sc_msr;		/* Modem status		*/
    189  1.14.8.2  nathanw 	u_char		 sc_tsr;		/* Tranceiver status	*/
    190  1.14.8.2  nathanw 	u_char		 sc_rsr;		/* Receiver status	*/
    191  1.14.8.2  nathanw 	u_char		 sc_mcr;		/* (Pseudo) Modem ctrl. */
    192  1.14.8.2  nathanw 
    193  1.14.8.2  nathanw 	u_char		 sc_msr_delta;
    194  1.14.8.2  nathanw 	u_char		 sc_msr_mask;
    195  1.14.8.2  nathanw 	u_char		 sc_mcr_active;
    196  1.14.8.2  nathanw 	u_char		 sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd;
    197  1.14.8.2  nathanw 
    198  1.14.8.2  nathanw 	int		 sc_r_hiwat;
    199  1.14.8.2  nathanw  	volatile u_int	 sc_rbget;
    200  1.14.8.2  nathanw  	volatile u_int	 sc_rbput;
    201  1.14.8.2  nathanw 	volatile u_int	 sc_rbavail;
    202  1.14.8.2  nathanw  	u_char		 sc_rbuf[RXBUFSIZE];
    203  1.14.8.2  nathanw 	u_char		 sc_lbuf[RXBUFSIZE];
    204  1.14.8.2  nathanw 
    205  1.14.8.2  nathanw 	volatile u_char	 sc_rx_blocked;
    206  1.14.8.2  nathanw 	volatile u_char	 sc_rx_ready;
    207  1.14.8.2  nathanw 	volatile u_char	 sc_tx_busy;
    208  1.14.8.2  nathanw 	volatile u_char	 sc_tx_done;
    209  1.14.8.2  nathanw 	volatile u_char	 sc_tx_stopped;
    210  1.14.8.2  nathanw 	volatile u_char	 sc_st_check;
    211  1.14.8.2  nathanw 
    212  1.14.8.2  nathanw  	u_char		*sc_tba;
    213  1.14.8.2  nathanw  	int		 sc_tbc;
    214  1.14.8.2  nathanw 	int		 sc_heldtbc;
    215  1.14.8.2  nathanw 
    216  1.14.8.2  nathanw 	volatile u_char	 sc_heldchange;
    217  1.14.8.2  nathanw };
    218  1.14.8.2  nathanw 
    219  1.14.8.2  nathanw /*
    220  1.14.8.2  nathanw  * For sc_hwflags:
    221  1.14.8.2  nathanw  */
    222  1.14.8.2  nathanw #define	SER_HW_CONSOLE	0x01
    223  1.14.8.2  nathanw 
    224  1.14.8.2  nathanw void	ser_break __P((struct ser_softc *, int));
    225  1.14.8.2  nathanw void	ser_hwiflow __P((struct ser_softc *, int));
    226  1.14.8.2  nathanw void	ser_iflush __P((struct ser_softc *));
    227  1.14.8.2  nathanw void	ser_loadchannelregs __P((struct ser_softc *));
    228  1.14.8.2  nathanw void	ser_modem __P((struct ser_softc *, int));
    229  1.14.8.2  nathanw void	serdiag __P((void *));
    230  1.14.8.2  nathanw int	serhwiflow __P((struct tty *, int));
    231  1.14.8.2  nathanw void	serinit __P((int));
    232  1.14.8.2  nathanw void	serinitcons __P((int));
    233  1.14.8.2  nathanw int	baud;
    234  1.14.8.2  nathanw int	sermintr __P((void *));
    235  1.14.8.2  nathanw int	sertrintr __P((void *));
    236  1.14.8.2  nathanw int	serparam __P((struct tty *, struct termios *));
    237  1.14.8.2  nathanw void	serstart __P((struct tty *));
    238  1.14.8.2  nathanw 
    239  1.14.8.2  nathanw struct consdev;
    240  1.14.8.2  nathanw void	sercnprobe	__P((struct consdev *));
    241  1.14.8.2  nathanw void	sercninit	__P((struct consdev *));
    242  1.14.8.2  nathanw int	sercngetc	__P((dev_t));
    243  1.14.8.2  nathanw void	sercnputc	__P((dev_t, int));
    244  1.14.8.2  nathanw void	sercnpollc	__P((dev_t, int));
    245  1.14.8.2  nathanw 
    246  1.14.8.2  nathanw static void sermsrint __P((struct ser_softc *, struct tty*));
    247  1.14.8.2  nathanw static void serrxint __P((struct ser_softc *, struct tty*));
    248  1.14.8.2  nathanw static void ser_shutdown __P((struct ser_softc *));
    249  1.14.8.2  nathanw static int serspeed __P((long));
    250  1.14.8.2  nathanw static void sersoft __P((void *));
    251  1.14.8.2  nathanw static void sertxint __P((struct ser_softc *, struct tty*));
    252  1.14.8.2  nathanw 
    253  1.14.8.2  nathanw static volatile int ser_softintr_scheduled = 0;
    254  1.14.8.2  nathanw 
    255  1.14.8.2  nathanw /*
    256  1.14.8.2  nathanw  * Autoconfig stuff
    257  1.14.8.2  nathanw  */
    258  1.14.8.2  nathanw static void serattach __P((struct device *, struct device *, void *));
    259  1.14.8.2  nathanw static int  sermatch __P((struct device *, struct cfdata *, void *));
    260  1.14.8.2  nathanw 
    261  1.14.8.5  nathanw CFATTACH_DECL(ser, sizeof(struct ser_softc),
    262  1.14.8.5  nathanw     sermatch, serattach, NULL, NULL);
    263  1.14.8.2  nathanw 
    264  1.14.8.2  nathanw extern struct cfdriver ser_cd;
    265  1.14.8.2  nathanw 
    266  1.14.8.4  nathanw dev_type_open(seropen);
    267  1.14.8.4  nathanw dev_type_close(serclose);
    268  1.14.8.4  nathanw dev_type_read(serread);
    269  1.14.8.4  nathanw dev_type_write(serwrite);
    270  1.14.8.4  nathanw dev_type_ioctl(serioctl);
    271  1.14.8.4  nathanw dev_type_stop(serstop);
    272  1.14.8.4  nathanw dev_type_tty(sertty);
    273  1.14.8.4  nathanw dev_type_poll(serpoll);
    274  1.14.8.4  nathanw 
    275  1.14.8.4  nathanw const struct cdevsw ser_cdevsw = {
    276  1.14.8.4  nathanw 	seropen, serclose, serread, serwrite, serioctl,
    277  1.14.8.4  nathanw 	serstop, sertty, serpoll, nommap, D_TTY
    278  1.14.8.4  nathanw };
    279  1.14.8.4  nathanw 
    280  1.14.8.2  nathanw /*ARGSUSED*/
    281  1.14.8.2  nathanw static	int
    282  1.14.8.2  nathanw sermatch(pdp, cfp, auxp)
    283  1.14.8.2  nathanw struct	device	*pdp;
    284  1.14.8.2  nathanw struct	cfdata	*cfp;
    285  1.14.8.2  nathanw void		*auxp;
    286  1.14.8.2  nathanw {
    287  1.14.8.2  nathanw 	static int	ser_matched = 0;
    288  1.14.8.2  nathanw 
    289  1.14.8.2  nathanw 	/* Match at most one ser unit */
    290  1.14.8.2  nathanw 	if (strcmp((char *)auxp, "ser") || ser_matched)
    291  1.14.8.2  nathanw 		return 0;
    292  1.14.8.2  nathanw 
    293  1.14.8.2  nathanw 	ser_matched = 1;
    294  1.14.8.2  nathanw 	return 1;
    295  1.14.8.2  nathanw }
    296  1.14.8.2  nathanw 
    297  1.14.8.2  nathanw /*ARGSUSED*/
    298  1.14.8.2  nathanw static void
    299  1.14.8.2  nathanw serattach(pdp, dp, auxp)
    300  1.14.8.2  nathanw struct	device *pdp, *dp;
    301  1.14.8.2  nathanw void	*auxp;
    302  1.14.8.2  nathanw {
    303  1.14.8.2  nathanw 	struct ser_softc *sc = (void *)dp;
    304  1.14.8.2  nathanw 
    305  1.14.8.2  nathanw 	if (intr_establish(1, USER_VEC, 0, (hw_ifun_t)sermintr, sc) == NULL)
    306  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (1)\n");
    307  1.14.8.2  nathanw 	if (intr_establish(2, USER_VEC, 0, (hw_ifun_t)sermintr, sc) == NULL)
    308  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (2)\n");
    309  1.14.8.2  nathanw 	if (intr_establish(14, USER_VEC, 0, (hw_ifun_t)sermintr, sc) == NULL)
    310  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (14)\n");
    311  1.14.8.2  nathanw 	if (intr_establish(9, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
    312  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (9)\n");
    313  1.14.8.2  nathanw 	if (intr_establish(10, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
    314  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (10)\n");
    315  1.14.8.2  nathanw 	if (intr_establish(11, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
    316  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (11)\n");
    317  1.14.8.2  nathanw 	if (intr_establish(12, USER_VEC, 0, (hw_ifun_t)sertrintr, sc) == NULL)
    318  1.14.8.2  nathanw 		printf("serattach: Can't establish interrupt (12)\n");
    319  1.14.8.2  nathanw 
    320  1.14.8.2  nathanw 	ym2149_rts(1);
    321  1.14.8.2  nathanw 	ym2149_dtr(1);
    322  1.14.8.2  nathanw 
    323  1.14.8.2  nathanw 	/*
    324  1.14.8.2  nathanw 	 * Enable but mask interrupts...
    325  1.14.8.2  nathanw 	 * XXX: Look at edge-sensitivity for DCD/CTS interrupts.
    326  1.14.8.2  nathanw 	 */
    327  1.14.8.2  nathanw 	MFP->mf_ierb |= IB_SCTS|IB_SDCD;
    328  1.14.8.2  nathanw 	MFP->mf_iera |= IA_RRDY|IA_RERR|IA_TRDY|IA_TERR;
    329  1.14.8.2  nathanw 	MFP->mf_imrb &= ~(IB_SCTS|IB_SDCD);
    330  1.14.8.2  nathanw 	MFP->mf_imra &= ~(IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
    331  1.14.8.2  nathanw 
    332  1.14.8.2  nathanw 	callout_init(&sc->sc_diag_ch);
    333  1.14.8.2  nathanw 
    334  1.14.8.4  nathanw #if SERCONSOLE > 0
    335  1.14.8.2  nathanw 	/*
    336  1.14.8.2  nathanw 	 * Activate serial console when DCD present...
    337  1.14.8.2  nathanw 	 */
    338  1.14.8.2  nathanw 	if (!(MFP->mf_gpip & MCR_DCD))
    339  1.14.8.2  nathanw 		SET(sc->sc_hwflags, SER_HW_CONSOLE);
    340  1.14.8.4  nathanw #endif /* SERCONSOLE > 0 */
    341  1.14.8.2  nathanw 
    342  1.14.8.2  nathanw 	printf("\n");
    343  1.14.8.2  nathanw 	if (ISSET(sc->sc_hwflags, SER_HW_CONSOLE)) {
    344  1.14.8.2  nathanw 		serinit(CONSBAUD);
    345  1.14.8.2  nathanw 		printf("%s: console\n", sc->sc_dev.dv_xname);
    346  1.14.8.2  nathanw 	}
    347  1.14.8.2  nathanw }
    348  1.14.8.2  nathanw 
    349  1.14.8.2  nathanw #ifdef SER_DEBUG
    350  1.14.8.2  nathanw void serstatus __P((struct ser_softc *, char *));
    351  1.14.8.2  nathanw void
    352  1.14.8.2  nathanw serstatus(sc, str)
    353  1.14.8.2  nathanw 	struct ser_softc *sc;
    354  1.14.8.2  nathanw 	char *str;
    355  1.14.8.2  nathanw {
    356  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    357  1.14.8.2  nathanw 
    358  1.14.8.2  nathanw 	printf("%s: %s %sclocal  %sdcd %sts_carr_on %sdtr %stx_stopped\n",
    359  1.14.8.2  nathanw 	    sc->sc_dev.dv_xname, str,
    360  1.14.8.2  nathanw 	    ISSET(tp->t_cflag, CLOCAL) ? "+" : "-",
    361  1.14.8.2  nathanw 	    ISSET(sc->sc_msr, MCR_DCD) ? "+" : "-",
    362  1.14.8.2  nathanw 	    ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-",
    363  1.14.8.2  nathanw 	    ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-",
    364  1.14.8.2  nathanw 	    sc->sc_tx_stopped ? "+" : "-");
    365  1.14.8.2  nathanw 
    366  1.14.8.2  nathanw 	printf("%s: %s %scrtscts %scts %sts_ttstop  %srts %srx_blocked\n",
    367  1.14.8.2  nathanw 	    sc->sc_dev.dv_xname, str,
    368  1.14.8.2  nathanw 	    ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-",
    369  1.14.8.2  nathanw 	    ISSET(sc->sc_msr, MCR_CTS) ? "+" : "-",
    370  1.14.8.2  nathanw 	    ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-",
    371  1.14.8.2  nathanw 	    ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-",
    372  1.14.8.2  nathanw 	    sc->sc_rx_blocked ? "+" : "-");
    373  1.14.8.2  nathanw }
    374  1.14.8.2  nathanw #endif /* SER_DEBUG */
    375  1.14.8.2  nathanw 
    376  1.14.8.2  nathanw int
    377  1.14.8.2  nathanw seropen(dev, flag, mode, p)
    378  1.14.8.2  nathanw 	dev_t dev;
    379  1.14.8.2  nathanw 	int flag, mode;
    380  1.14.8.2  nathanw 	struct proc *p;
    381  1.14.8.2  nathanw {
    382  1.14.8.2  nathanw 	int unit = SERUNIT(dev);
    383  1.14.8.2  nathanw 	struct ser_softc *sc;
    384  1.14.8.2  nathanw 	struct tty *tp;
    385  1.14.8.2  nathanw 	int s, s2;
    386  1.14.8.2  nathanw 	int error = 0;
    387  1.14.8.2  nathanw 
    388  1.14.8.2  nathanw 	if (unit >= ser_cd.cd_ndevs)
    389  1.14.8.2  nathanw 		return (ENXIO);
    390  1.14.8.2  nathanw 	sc = ser_cd.cd_devs[unit];
    391  1.14.8.2  nathanw 	if (!sc)
    392  1.14.8.2  nathanw 		return (ENXIO);
    393  1.14.8.2  nathanw 
    394  1.14.8.2  nathanw 	if (!sc->sc_tty) {
    395  1.14.8.2  nathanw 		tp = sc->sc_tty = ttymalloc();
    396  1.14.8.2  nathanw 		tty_attach(tp);
    397  1.14.8.2  nathanw 	} else
    398  1.14.8.2  nathanw 		tp = sc->sc_tty;
    399  1.14.8.2  nathanw 
    400  1.14.8.2  nathanw 	if (ISSET(tp->t_state, TS_ISOPEN) &&
    401  1.14.8.2  nathanw 	    ISSET(tp->t_state, TS_XCLUDE) &&
    402  1.14.8.2  nathanw 	    p->p_ucred->cr_uid != 0)
    403  1.14.8.2  nathanw 		return (EBUSY);
    404  1.14.8.2  nathanw 
    405  1.14.8.2  nathanw 	s = spltty();
    406  1.14.8.2  nathanw 
    407  1.14.8.2  nathanw 	/*
    408  1.14.8.2  nathanw 	 * Do the following if this is a first open.
    409  1.14.8.2  nathanw 	 */
    410  1.14.8.2  nathanw 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    411  1.14.8.2  nathanw 	    struct termios t;
    412  1.14.8.2  nathanw 
    413  1.14.8.2  nathanw 	    /* Turn on interrupts. */
    414  1.14.8.2  nathanw 	    sc->sc_imra = IA_RRDY|IA_RERR|IA_TRDY|IA_TERR;
    415  1.14.8.2  nathanw 	    sc->sc_imrb = IB_SCTS|IB_SDCD;
    416  1.14.8.2  nathanw 	    single_inst_bset_b(MFP->mf_imra, sc->sc_imra);
    417  1.14.8.2  nathanw 	    single_inst_bset_b(MFP->mf_imrb, sc->sc_imrb);
    418  1.14.8.2  nathanw 
    419  1.14.8.2  nathanw 	    /* Fetch the current modem control status, needed later. */
    420  1.14.8.2  nathanw 	    sc->sc_msr = ~MFP->mf_gpip & (IO_SDCD|IO_SCTS|IO_SRI);
    421  1.14.8.2  nathanw 
    422  1.14.8.2  nathanw 	    /* Add some entry points needed by the tty layer. */
    423  1.14.8.2  nathanw 	    tp->t_oproc = serstart;
    424  1.14.8.2  nathanw 	    tp->t_param = serparam;
    425  1.14.8.2  nathanw 	    tp->t_hwiflow = serhwiflow;
    426  1.14.8.2  nathanw 	    tp->t_dev = dev;
    427  1.14.8.2  nathanw 
    428  1.14.8.2  nathanw 	    /*
    429  1.14.8.2  nathanw 	     * Initialize the termios status to the defaults.  Add in the
    430  1.14.8.2  nathanw 	     * sticky bits from TIOCSFLAGS.
    431  1.14.8.2  nathanw 	     */
    432  1.14.8.2  nathanw 	    t.c_ispeed = 0;
    433  1.14.8.2  nathanw 	    if (ISSET(sc->sc_hwflags, SER_HW_CONSOLE)) {
    434  1.14.8.2  nathanw 		    t.c_ospeed = CONSBAUD;
    435  1.14.8.2  nathanw 		    t.c_cflag  = CONSCFLAG;
    436  1.14.8.2  nathanw 	    }
    437  1.14.8.2  nathanw 	    else {
    438  1.14.8.2  nathanw 		    t.c_ospeed = TTYDEF_SPEED;
    439  1.14.8.2  nathanw 		    t.c_cflag = TTYDEF_CFLAG;
    440  1.14.8.2  nathanw 	    }
    441  1.14.8.2  nathanw 	    if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL))
    442  1.14.8.2  nathanw 		    SET(t.c_cflag, CLOCAL);
    443  1.14.8.2  nathanw 	    if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS))
    444  1.14.8.2  nathanw 		    SET(t.c_cflag, CRTSCTS);
    445  1.14.8.2  nathanw 	    if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF))
    446  1.14.8.2  nathanw 		    SET(t.c_cflag, MDMBUF);
    447  1.14.8.2  nathanw 	    tp->t_iflag = TTYDEF_IFLAG;
    448  1.14.8.2  nathanw 	    tp->t_oflag = TTYDEF_OFLAG;
    449  1.14.8.2  nathanw 	    tp->t_lflag = TTYDEF_LFLAG;
    450  1.14.8.2  nathanw 	    ttychars(tp);
    451  1.14.8.2  nathanw 	    (void) serparam(tp, &t);
    452  1.14.8.2  nathanw 	    ttsetwater(tp);
    453  1.14.8.2  nathanw 
    454  1.14.8.2  nathanw 	    s2 = splserial();
    455  1.14.8.2  nathanw 
    456  1.14.8.2  nathanw 	    /*
    457  1.14.8.2  nathanw 	     * Turn on DTR.  We must always do this, even if carrier is not
    458  1.14.8.2  nathanw 	     * present, because otherwise we'd have to use TIOCSDTR
    459  1.14.8.2  nathanw 	     * immediately after setting CLOCAL.  We will drop DTR only on
    460  1.14.8.2  nathanw 	     * the next high-low transition of DCD, or by explicit request.
    461  1.14.8.2  nathanw 	     */
    462  1.14.8.2  nathanw 	    ser_modem(sc, 1);
    463  1.14.8.2  nathanw 
    464  1.14.8.2  nathanw 	    /* Clear the input ring, and unblock. */
    465  1.14.8.2  nathanw 	    sc->sc_rbput = sc->sc_rbget = 0;
    466  1.14.8.2  nathanw 	    sc->sc_rbavail = RXBUFSIZE;
    467  1.14.8.2  nathanw 	    ser_iflush(sc);
    468  1.14.8.2  nathanw 	    sc->sc_rx_blocked = 0;
    469  1.14.8.2  nathanw 	    ser_hwiflow(sc, 0);
    470  1.14.8.2  nathanw 
    471  1.14.8.2  nathanw #ifdef SER_DEBUG
    472  1.14.8.2  nathanw 	    serstatus(sc, "seropen  ");
    473  1.14.8.2  nathanw #endif
    474  1.14.8.2  nathanw 
    475  1.14.8.2  nathanw 	    splx(s2);
    476  1.14.8.2  nathanw 	}
    477  1.14.8.2  nathanw 
    478  1.14.8.2  nathanw 	splx(s);
    479  1.14.8.2  nathanw 
    480  1.14.8.2  nathanw 	error = ttyopen(tp, SERDIALOUT(dev), ISSET(flag, O_NONBLOCK));
    481  1.14.8.2  nathanw 	if (error)
    482  1.14.8.2  nathanw 		goto bad;
    483  1.14.8.2  nathanw 
    484  1.14.8.2  nathanw 	error = (*tp->t_linesw->l_open)(dev, tp);
    485  1.14.8.2  nathanw         if (error)
    486  1.14.8.2  nathanw 		goto bad;
    487  1.14.8.2  nathanw 
    488  1.14.8.2  nathanw 	return (0);
    489  1.14.8.2  nathanw 
    490  1.14.8.2  nathanw bad:
    491  1.14.8.2  nathanw 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    492  1.14.8.2  nathanw 		/*
    493  1.14.8.2  nathanw 		 * We failed to open the device, and nobody else had it opened.
    494  1.14.8.2  nathanw 		 * Clean up the state as appropriate.
    495  1.14.8.2  nathanw 		 */
    496  1.14.8.2  nathanw 		ser_shutdown(sc);
    497  1.14.8.2  nathanw 	}
    498  1.14.8.2  nathanw 
    499  1.14.8.2  nathanw 	return (error);
    500  1.14.8.2  nathanw }
    501  1.14.8.2  nathanw 
    502  1.14.8.2  nathanw int
    503  1.14.8.2  nathanw serclose(dev, flag, mode, p)
    504  1.14.8.2  nathanw 	dev_t		dev;
    505  1.14.8.2  nathanw 	int		flag, mode;
    506  1.14.8.2  nathanw 	struct proc	*p;
    507  1.14.8.2  nathanw {
    508  1.14.8.2  nathanw 	int unit = SERUNIT(dev);
    509  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[unit];
    510  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    511  1.14.8.2  nathanw 
    512  1.14.8.2  nathanw 	/* XXX This is for cons.c. */
    513  1.14.8.2  nathanw 	if (!ISSET(tp->t_state, TS_ISOPEN))
    514  1.14.8.2  nathanw 		return (0);
    515  1.14.8.2  nathanw 
    516  1.14.8.2  nathanw 	(*tp->t_linesw->l_close)(tp, flag);
    517  1.14.8.2  nathanw 	ttyclose(tp);
    518  1.14.8.2  nathanw 
    519  1.14.8.2  nathanw 	if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) {
    520  1.14.8.2  nathanw 		/*
    521  1.14.8.2  nathanw 		 * Although we got a last close, the device may still be in
    522  1.14.8.2  nathanw 		 * use; e.g. if this was the dialout node, and there are still
    523  1.14.8.2  nathanw 		 * processes waiting for carrier on the non-dialout node.
    524  1.14.8.2  nathanw 		 */
    525  1.14.8.2  nathanw 		ser_shutdown(sc);
    526  1.14.8.2  nathanw 	}
    527  1.14.8.2  nathanw 
    528  1.14.8.2  nathanw 	return (0);
    529  1.14.8.2  nathanw }
    530  1.14.8.2  nathanw 
    531  1.14.8.2  nathanw int
    532  1.14.8.2  nathanw serread(dev, uio, flag)
    533  1.14.8.2  nathanw 	dev_t dev;
    534  1.14.8.2  nathanw 	struct uio *uio;
    535  1.14.8.2  nathanw 	int flag;
    536  1.14.8.2  nathanw {
    537  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
    538  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    539  1.14.8.2  nathanw 
    540  1.14.8.2  nathanw 	return ((*tp->t_linesw->l_read)(tp, uio, flag));
    541  1.14.8.2  nathanw }
    542  1.14.8.2  nathanw 
    543  1.14.8.2  nathanw int
    544  1.14.8.2  nathanw serwrite(dev, uio, flag)
    545  1.14.8.2  nathanw 	dev_t dev;
    546  1.14.8.2  nathanw 	struct uio *uio;
    547  1.14.8.2  nathanw 	int flag;
    548  1.14.8.2  nathanw {
    549  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
    550  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    551  1.14.8.2  nathanw 
    552  1.14.8.2  nathanw 	return ((*tp->t_linesw->l_write)(tp, uio, flag));
    553  1.14.8.2  nathanw }
    554  1.14.8.2  nathanw 
    555  1.14.8.2  nathanw int
    556  1.14.8.2  nathanw serpoll(dev, events, p)
    557  1.14.8.2  nathanw 	dev_t dev;
    558  1.14.8.2  nathanw 	int events;
    559  1.14.8.2  nathanw 	struct proc *p;
    560  1.14.8.2  nathanw {
    561  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
    562  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    563  1.14.8.2  nathanw 
    564  1.14.8.2  nathanw 	return ((*tp->t_linesw->l_poll)(tp, events, p));
    565  1.14.8.2  nathanw }
    566  1.14.8.2  nathanw 
    567  1.14.8.2  nathanw struct tty *
    568  1.14.8.2  nathanw sertty(dev)
    569  1.14.8.2  nathanw 	dev_t dev;
    570  1.14.8.2  nathanw {
    571  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(dev)];
    572  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    573  1.14.8.2  nathanw 
    574  1.14.8.2  nathanw 	return (tp);
    575  1.14.8.2  nathanw }
    576  1.14.8.2  nathanw 
    577  1.14.8.2  nathanw int
    578  1.14.8.2  nathanw serioctl(dev, cmd, data, flag, p)
    579  1.14.8.2  nathanw 	dev_t dev;
    580  1.14.8.2  nathanw 	u_long cmd;
    581  1.14.8.2  nathanw 	caddr_t data;
    582  1.14.8.2  nathanw 	int flag;
    583  1.14.8.2  nathanw 	struct proc *p;
    584  1.14.8.2  nathanw {
    585  1.14.8.2  nathanw 	int unit = SERUNIT(dev);
    586  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[unit];
    587  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
    588  1.14.8.2  nathanw 	int error;
    589  1.14.8.2  nathanw 
    590  1.14.8.2  nathanw 	error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p);
    591  1.14.8.2  nathanw 	if (error != EPASSTHROUGH)
    592  1.14.8.2  nathanw 		return (error);
    593  1.14.8.2  nathanw 
    594  1.14.8.2  nathanw 	error = ttioctl(tp, cmd, data, flag, p);
    595  1.14.8.2  nathanw 	if (error != EPASSTHROUGH)
    596  1.14.8.2  nathanw 		return (error);
    597  1.14.8.2  nathanw 
    598  1.14.8.2  nathanw 	switch (cmd) {
    599  1.14.8.2  nathanw 	case TIOCSBRK:
    600  1.14.8.2  nathanw 		ser_break(sc, 1);
    601  1.14.8.2  nathanw 		break;
    602  1.14.8.2  nathanw 
    603  1.14.8.2  nathanw 	case TIOCCBRK:
    604  1.14.8.2  nathanw 		ser_break(sc, 0);
    605  1.14.8.2  nathanw 		break;
    606  1.14.8.2  nathanw 
    607  1.14.8.2  nathanw 	case TIOCSDTR:
    608  1.14.8.2  nathanw 		ser_modem(sc, 1);
    609  1.14.8.2  nathanw 		break;
    610  1.14.8.2  nathanw 
    611  1.14.8.2  nathanw 	case TIOCCDTR:
    612  1.14.8.2  nathanw 		ser_modem(sc, 0);
    613  1.14.8.2  nathanw 		break;
    614  1.14.8.2  nathanw 
    615  1.14.8.2  nathanw 	case TIOCGFLAGS:
    616  1.14.8.2  nathanw 		*(int *)data = sc->sc_swflags;
    617  1.14.8.2  nathanw 		break;
    618  1.14.8.2  nathanw 
    619  1.14.8.2  nathanw 	case TIOCSFLAGS:
    620  1.14.8.2  nathanw 		error = suser(p->p_ucred, &p->p_acflag);
    621  1.14.8.2  nathanw 		if (error)
    622  1.14.8.2  nathanw 			return (error);
    623  1.14.8.2  nathanw 		sc->sc_swflags = *(int *)data;
    624  1.14.8.2  nathanw 		break;
    625  1.14.8.2  nathanw 
    626  1.14.8.2  nathanw 	case TIOCMSET:
    627  1.14.8.2  nathanw 	case TIOCMBIS:
    628  1.14.8.2  nathanw 	case TIOCMBIC:
    629  1.14.8.2  nathanw 	case TIOCMGET:
    630  1.14.8.2  nathanw 	default:
    631  1.14.8.2  nathanw 		return (EPASSTHROUGH);
    632  1.14.8.2  nathanw 	}
    633  1.14.8.2  nathanw 
    634  1.14.8.2  nathanw #ifdef SER_DEBUG
    635  1.14.8.2  nathanw 		serstatus(sc, "serioctl ");
    636  1.14.8.2  nathanw #endif
    637  1.14.8.2  nathanw 
    638  1.14.8.2  nathanw 	return (0);
    639  1.14.8.2  nathanw }
    640  1.14.8.2  nathanw 
    641  1.14.8.2  nathanw void
    642  1.14.8.2  nathanw ser_break(sc, onoff)
    643  1.14.8.2  nathanw 	struct ser_softc *sc;
    644  1.14.8.2  nathanw 	int onoff;
    645  1.14.8.2  nathanw {
    646  1.14.8.2  nathanw 	int s;
    647  1.14.8.2  nathanw 
    648  1.14.8.2  nathanw 	s = splserial();
    649  1.14.8.2  nathanw 	if (onoff)
    650  1.14.8.2  nathanw 		SET(sc->sc_tsr, TSR_SBREAK);
    651  1.14.8.2  nathanw 	else
    652  1.14.8.2  nathanw 		CLR(sc->sc_tsr, TSR_SBREAK);
    653  1.14.8.2  nathanw 
    654  1.14.8.2  nathanw 	if (!sc->sc_heldchange) {
    655  1.14.8.2  nathanw 		if (sc->sc_tx_busy) {
    656  1.14.8.2  nathanw 			sc->sc_heldtbc = sc->sc_tbc;
    657  1.14.8.2  nathanw 			sc->sc_tbc = 0;
    658  1.14.8.2  nathanw 			sc->sc_heldchange = 1;
    659  1.14.8.2  nathanw 		} else
    660  1.14.8.2  nathanw 			ser_loadchannelregs(sc);
    661  1.14.8.2  nathanw 	}
    662  1.14.8.2  nathanw 	splx(s);
    663  1.14.8.2  nathanw }
    664  1.14.8.2  nathanw 
    665  1.14.8.2  nathanw void
    666  1.14.8.2  nathanw ser_modem(sc, onoff)
    667  1.14.8.2  nathanw 	struct ser_softc *sc;
    668  1.14.8.2  nathanw 	int onoff;
    669  1.14.8.2  nathanw {
    670  1.14.8.2  nathanw 	int s;
    671  1.14.8.2  nathanw 
    672  1.14.8.2  nathanw 	s = splserial();
    673  1.14.8.2  nathanw 	if (onoff)
    674  1.14.8.2  nathanw 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
    675  1.14.8.2  nathanw 	else
    676  1.14.8.2  nathanw 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
    677  1.14.8.2  nathanw 
    678  1.14.8.2  nathanw 	if (!sc->sc_heldchange) {
    679  1.14.8.2  nathanw 		if (sc->sc_tx_busy) {
    680  1.14.8.2  nathanw 			sc->sc_heldtbc = sc->sc_tbc;
    681  1.14.8.2  nathanw 			sc->sc_tbc = 0;
    682  1.14.8.2  nathanw 			sc->sc_heldchange = 1;
    683  1.14.8.2  nathanw 		} else
    684  1.14.8.2  nathanw 			ser_loadchannelregs(sc);
    685  1.14.8.2  nathanw 	}
    686  1.14.8.2  nathanw 	splx(s);
    687  1.14.8.2  nathanw }
    688  1.14.8.2  nathanw 
    689  1.14.8.2  nathanw int
    690  1.14.8.2  nathanw serparam(tp, t)
    691  1.14.8.2  nathanw 	struct tty *tp;
    692  1.14.8.2  nathanw 	struct termios *t;
    693  1.14.8.2  nathanw {
    694  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
    695  1.14.8.2  nathanw 	int ospeed = serspeed(t->c_ospeed);
    696  1.14.8.2  nathanw 	u_char ucr;
    697  1.14.8.2  nathanw 	int s;
    698  1.14.8.2  nathanw 
    699  1.14.8.2  nathanw 	/* check requested parameters */
    700  1.14.8.2  nathanw 	if (ospeed < 0)
    701  1.14.8.2  nathanw 		return (EINVAL);
    702  1.14.8.2  nathanw 	if (t->c_ispeed && t->c_ispeed != t->c_ospeed)
    703  1.14.8.2  nathanw 		return (EINVAL);
    704  1.14.8.2  nathanw 
    705  1.14.8.2  nathanw 	sc->sc_rsr = RSR_ENAB;
    706  1.14.8.2  nathanw 	sc->sc_tsr = TSR_ENAB;
    707  1.14.8.2  nathanw 
    708  1.14.8.2  nathanw 	ucr = UCR_CLKDIV;
    709  1.14.8.2  nathanw 
    710  1.14.8.2  nathanw 	switch (ISSET(t->c_cflag, CSIZE)) {
    711  1.14.8.2  nathanw 	case CS5:
    712  1.14.8.2  nathanw 		SET(ucr, UCR_5BITS);
    713  1.14.8.2  nathanw 		break;
    714  1.14.8.2  nathanw 	case CS6:
    715  1.14.8.2  nathanw 		SET(ucr, UCR_6BITS);
    716  1.14.8.2  nathanw 		break;
    717  1.14.8.2  nathanw 	case CS7:
    718  1.14.8.2  nathanw 		SET(ucr, UCR_7BITS);
    719  1.14.8.2  nathanw 		break;
    720  1.14.8.2  nathanw 	case CS8:
    721  1.14.8.2  nathanw 		SET(ucr, UCR_8BITS);
    722  1.14.8.2  nathanw 		break;
    723  1.14.8.2  nathanw 	}
    724  1.14.8.2  nathanw 	if (ISSET(t->c_cflag, PARENB)) {
    725  1.14.8.2  nathanw 		SET(ucr, UCR_PENAB);
    726  1.14.8.2  nathanw 		if (!ISSET(t->c_cflag, PARODD))
    727  1.14.8.2  nathanw 			SET(ucr, UCR_PEVEN);
    728  1.14.8.2  nathanw 	}
    729  1.14.8.2  nathanw 	if (ISSET(t->c_cflag, CSTOPB))
    730  1.14.8.2  nathanw 		SET(ucr, UCR_STOPB2);
    731  1.14.8.2  nathanw 	else
    732  1.14.8.2  nathanw 		SET(ucr, UCR_STOPB1);
    733  1.14.8.2  nathanw 
    734  1.14.8.2  nathanw 	s = splserial();
    735  1.14.8.2  nathanw 
    736  1.14.8.2  nathanw 	sc->sc_ucr = ucr;
    737  1.14.8.2  nathanw 
    738  1.14.8.2  nathanw 	/*
    739  1.14.8.2  nathanw 	 * For the console, always force CLOCAL and !HUPCL, so that the port
    740  1.14.8.2  nathanw 	 * is always active.
    741  1.14.8.2  nathanw 	 */
    742  1.14.8.2  nathanw 	if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) ||
    743  1.14.8.2  nathanw 	    ISSET(sc->sc_hwflags, SER_HW_CONSOLE)) {
    744  1.14.8.2  nathanw 		SET(t->c_cflag, CLOCAL);
    745  1.14.8.2  nathanw 		CLR(t->c_cflag, HUPCL);
    746  1.14.8.2  nathanw 	}
    747  1.14.8.2  nathanw 
    748  1.14.8.2  nathanw 	/*
    749  1.14.8.2  nathanw 	 * If we're not in a mode that assumes a connection is present, then
    750  1.14.8.2  nathanw 	 * ignore carrier changes.
    751  1.14.8.2  nathanw 	 */
    752  1.14.8.2  nathanw 	if (ISSET(t->c_cflag, CLOCAL | MDMBUF))
    753  1.14.8.2  nathanw 		sc->sc_msr_dcd = 0;
    754  1.14.8.2  nathanw 	else
    755  1.14.8.2  nathanw 		sc->sc_msr_dcd = MCR_DCD;
    756  1.14.8.2  nathanw 	/*
    757  1.14.8.2  nathanw 	 * Set the flow control pins depending on the current flow control
    758  1.14.8.2  nathanw 	 * mode.
    759  1.14.8.2  nathanw 	 */
    760  1.14.8.2  nathanw 	if (ISSET(t->c_cflag, CRTSCTS)) {
    761  1.14.8.2  nathanw 		sc->sc_mcr_dtr = MCR_DTR;
    762  1.14.8.2  nathanw 		sc->sc_mcr_rts = MCR_RTS;
    763  1.14.8.2  nathanw 		sc->sc_msr_cts = MCR_CTS;
    764  1.14.8.2  nathanw 		sc->sc_r_hiwat = RXHIWAT;
    765  1.14.8.2  nathanw 	} else if (ISSET(t->c_cflag, MDMBUF)) {
    766  1.14.8.2  nathanw 		/*
    767  1.14.8.2  nathanw 		 * For DTR/DCD flow control, make sure we don't toggle DTR for
    768  1.14.8.2  nathanw 		 * carrier detection.
    769  1.14.8.2  nathanw 		 */
    770  1.14.8.2  nathanw 		sc->sc_mcr_dtr = 0;
    771  1.14.8.2  nathanw 		sc->sc_mcr_rts = MCR_DTR;
    772  1.14.8.2  nathanw 		sc->sc_msr_cts = MCR_DCD;
    773  1.14.8.2  nathanw 		sc->sc_r_hiwat = RXHIWAT;
    774  1.14.8.2  nathanw 	} else {
    775  1.14.8.2  nathanw 		/*
    776  1.14.8.2  nathanw 		 * If no flow control, then always set RTS.  This will make
    777  1.14.8.2  nathanw 		 * the other side happy if it mistakenly thinks we're doing
    778  1.14.8.2  nathanw 		 * RTS/CTS flow control.
    779  1.14.8.2  nathanw 		 */
    780  1.14.8.2  nathanw 		sc->sc_mcr_dtr = MCR_DTR | MCR_RTS;
    781  1.14.8.2  nathanw 		sc->sc_mcr_rts = 0;
    782  1.14.8.2  nathanw 		sc->sc_msr_cts = 0;
    783  1.14.8.2  nathanw 		sc->sc_r_hiwat = 0;
    784  1.14.8.2  nathanw 		if (ISSET(sc->sc_mcr, MCR_DTR))
    785  1.14.8.2  nathanw 			SET(sc->sc_mcr, MCR_RTS);
    786  1.14.8.2  nathanw 		else
    787  1.14.8.2  nathanw 			CLR(sc->sc_mcr, MCR_RTS);
    788  1.14.8.2  nathanw 	}
    789  1.14.8.2  nathanw 	sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd;
    790  1.14.8.2  nathanw 
    791  1.14.8.2  nathanw #if 0
    792  1.14.8.2  nathanw 	if (ospeed == 0)
    793  1.14.8.2  nathanw 		CLR(sc->sc_mcr, sc->sc_mcr_dtr);
    794  1.14.8.2  nathanw 	else
    795  1.14.8.2  nathanw 		SET(sc->sc_mcr, sc->sc_mcr_dtr);
    796  1.14.8.2  nathanw #endif
    797  1.14.8.2  nathanw 
    798  1.14.8.2  nathanw 	sc->sc_ospeed = ospeed;
    799  1.14.8.2  nathanw 
    800  1.14.8.2  nathanw 	/* and copy to tty */
    801  1.14.8.2  nathanw 	tp->t_ispeed = 0;
    802  1.14.8.2  nathanw 	tp->t_ospeed = t->c_ospeed;
    803  1.14.8.2  nathanw 	tp->t_cflag = t->c_cflag;
    804  1.14.8.2  nathanw 
    805  1.14.8.2  nathanw 	if (!sc->sc_heldchange) {
    806  1.14.8.2  nathanw 		if (sc->sc_tx_busy) {
    807  1.14.8.2  nathanw 			sc->sc_heldtbc = sc->sc_tbc;
    808  1.14.8.2  nathanw 			sc->sc_tbc = 0;
    809  1.14.8.2  nathanw 			sc->sc_heldchange = 1;
    810  1.14.8.2  nathanw 		} else
    811  1.14.8.2  nathanw 			ser_loadchannelregs(sc);
    812  1.14.8.2  nathanw 	}
    813  1.14.8.2  nathanw 
    814  1.14.8.2  nathanw 	splx(s);
    815  1.14.8.2  nathanw 
    816  1.14.8.2  nathanw 	/*
    817  1.14.8.2  nathanw 	 * Update the tty layer's idea of the carrier bit, in case we changed
    818  1.14.8.2  nathanw 	 * CLOCAL or MDMBUF.  We don't hang up here; we only do that if we
    819  1.14.8.2  nathanw 	 * lose carrier while carrier detection is on.
    820  1.14.8.2  nathanw 	 */
    821  1.14.8.2  nathanw 	(void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MCR_DCD));
    822  1.14.8.2  nathanw 
    823  1.14.8.2  nathanw #ifdef SER_DEBUG
    824  1.14.8.2  nathanw 	serstatus(sc, "serparam ");
    825  1.14.8.2  nathanw #endif
    826  1.14.8.2  nathanw 
    827  1.14.8.2  nathanw 	/* XXXXX FIX ME */
    828  1.14.8.2  nathanw 	/* Block or unblock as needed. */
    829  1.14.8.2  nathanw 	if (!ISSET(t->c_cflag, CHWFLOW)) {
    830  1.14.8.2  nathanw 		if (sc->sc_rx_blocked) {
    831  1.14.8.2  nathanw 			sc->sc_rx_blocked = 0;
    832  1.14.8.2  nathanw 			ser_hwiflow(sc, 0);
    833  1.14.8.2  nathanw 		}
    834  1.14.8.2  nathanw 		if (sc->sc_tx_stopped) {
    835  1.14.8.2  nathanw 			sc->sc_tx_stopped = 0;
    836  1.14.8.2  nathanw 			serstart(tp);
    837  1.14.8.2  nathanw 		}
    838  1.14.8.2  nathanw 	} else {
    839  1.14.8.2  nathanw #if 0
    840  1.14.8.2  nathanw 		sermsrint(sc, tp);
    841  1.14.8.2  nathanw #endif
    842  1.14.8.2  nathanw 	}
    843  1.14.8.2  nathanw 
    844  1.14.8.2  nathanw 	return (0);
    845  1.14.8.2  nathanw }
    846  1.14.8.2  nathanw 
    847  1.14.8.2  nathanw void
    848  1.14.8.2  nathanw ser_iflush(sc)
    849  1.14.8.2  nathanw 	struct ser_softc *sc;
    850  1.14.8.2  nathanw {
    851  1.14.8.2  nathanw 	u_char	tmp;
    852  1.14.8.2  nathanw 
    853  1.14.8.2  nathanw 	/* flush any pending I/O */
    854  1.14.8.2  nathanw 	while (ISSET(MFP->mf_rsr, RSR_CIP|RSR_BFULL))
    855  1.14.8.2  nathanw 		tmp = MFP->mf_udr;
    856  1.14.8.2  nathanw }
    857  1.14.8.2  nathanw 
    858  1.14.8.2  nathanw void
    859  1.14.8.2  nathanw ser_loadchannelregs(sc)
    860  1.14.8.2  nathanw 	struct ser_softc *sc;
    861  1.14.8.2  nathanw {
    862  1.14.8.2  nathanw 	/* XXXXX necessary? */
    863  1.14.8.2  nathanw 	ser_iflush(sc);
    864  1.14.8.2  nathanw 
    865  1.14.8.2  nathanw 	/*
    866  1.14.8.2  nathanw 	 * No interrupts please...
    867  1.14.8.2  nathanw 	 */
    868  1.14.8.2  nathanw if((MFP->mf_imra & (IA_RRDY|IA_RERR|IA_TRDY|IA_TERR)) != sc->sc_imra) {
    869  1.14.8.2  nathanw printf("loadchannelregs: mf_imra: %x sc_imra: %x\n", (u_int)MFP->mf_imra,
    870  1.14.8.2  nathanw 						     (u_int)sc->sc_imra);
    871  1.14.8.2  nathanw }
    872  1.14.8.2  nathanw if((MFP->mf_imrb & (IB_SCTS|IB_SDCD)) != sc->sc_imrb) {
    873  1.14.8.2  nathanw printf("loadchannelregs: mf_imrb: %x sc_imrb: %x\n", (u_int)MFP->mf_imrb,
    874  1.14.8.2  nathanw 						     (u_int)sc->sc_imrb);
    875  1.14.8.2  nathanw }
    876  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_imra, IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
    877  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_imrb, IB_SCTS|IB_SDCD);
    878  1.14.8.2  nathanw 
    879  1.14.8.2  nathanw 	MFP->mf_ucr = sc->sc_ucr;
    880  1.14.8.2  nathanw 	MFP->mf_rsr = sc->sc_rsr;
    881  1.14.8.2  nathanw 	MFP->mf_tsr = sc->sc_tsr;
    882  1.14.8.2  nathanw 
    883  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_tcdcr, 0x07);
    884  1.14.8.2  nathanw 	MFP->mf_tddr  = sc->sc_ospeed;
    885  1.14.8.2  nathanw 	single_inst_bset_b(MFP->mf_tcdcr, (sc->sc_ospeed >> 8) & 0x0f);
    886  1.14.8.2  nathanw 
    887  1.14.8.2  nathanw 	sc->sc_mcr_active = sc->sc_mcr;
    888  1.14.8.2  nathanw 
    889  1.14.8.2  nathanw 	if (machineid & ATARI_HADES) {
    890  1.14.8.2  nathanw 		/* PCB fault, wires exchanged..... */
    891  1.14.8.2  nathanw 		ym2149_rts(!(sc->sc_mcr_active & MCR_DTR));
    892  1.14.8.2  nathanw 		ym2149_dtr(!(sc->sc_mcr_active & MCR_RTS));
    893  1.14.8.2  nathanw 	}
    894  1.14.8.2  nathanw 	else {
    895  1.14.8.2  nathanw 		ym2149_rts(!(sc->sc_mcr_active & MCR_RTS));
    896  1.14.8.2  nathanw 		ym2149_dtr(!(sc->sc_mcr_active & MCR_DTR));
    897  1.14.8.2  nathanw 	}
    898  1.14.8.2  nathanw 
    899  1.14.8.2  nathanw 	single_inst_bset_b(MFP->mf_imra, sc->sc_imra);
    900  1.14.8.2  nathanw 	single_inst_bset_b(MFP->mf_imrb, sc->sc_imrb);
    901  1.14.8.2  nathanw }
    902  1.14.8.2  nathanw 
    903  1.14.8.2  nathanw int
    904  1.14.8.2  nathanw serhwiflow(tp, block)
    905  1.14.8.2  nathanw 	struct tty *tp;
    906  1.14.8.2  nathanw 	int block;
    907  1.14.8.2  nathanw {
    908  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
    909  1.14.8.2  nathanw 	int s;
    910  1.14.8.2  nathanw 
    911  1.14.8.2  nathanw 	if (sc->sc_mcr_rts == 0)
    912  1.14.8.2  nathanw 		return (0);
    913  1.14.8.2  nathanw 
    914  1.14.8.2  nathanw 	s = splserial();
    915  1.14.8.2  nathanw 	if (block) {
    916  1.14.8.2  nathanw 		/*
    917  1.14.8.2  nathanw 		 * The tty layer is asking us to block input.
    918  1.14.8.2  nathanw 		 * If we already did it, just return TRUE.
    919  1.14.8.2  nathanw 		 */
    920  1.14.8.2  nathanw 		if (sc->sc_rx_blocked)
    921  1.14.8.2  nathanw 			goto out;
    922  1.14.8.2  nathanw 		sc->sc_rx_blocked = 1;
    923  1.14.8.2  nathanw 	} else {
    924  1.14.8.2  nathanw 		/*
    925  1.14.8.2  nathanw 		 * The tty layer is asking us to resume input.
    926  1.14.8.2  nathanw 		 * The input ring is always empty by now.
    927  1.14.8.2  nathanw 		 */
    928  1.14.8.2  nathanw 		sc->sc_rx_blocked = 0;
    929  1.14.8.2  nathanw 	}
    930  1.14.8.2  nathanw 	ser_hwiflow(sc, block);
    931  1.14.8.2  nathanw out:
    932  1.14.8.2  nathanw 	splx(s);
    933  1.14.8.2  nathanw 	return (1);
    934  1.14.8.2  nathanw }
    935  1.14.8.2  nathanw 
    936  1.14.8.2  nathanw /*
    937  1.14.8.2  nathanw  * (un)block input via hw flowcontrol
    938  1.14.8.2  nathanw  */
    939  1.14.8.2  nathanw void
    940  1.14.8.2  nathanw ser_hwiflow(sc, block)
    941  1.14.8.2  nathanw 	struct ser_softc *sc;
    942  1.14.8.2  nathanw 	int block;
    943  1.14.8.2  nathanw {
    944  1.14.8.2  nathanw 	if (sc->sc_mcr_rts == 0)
    945  1.14.8.2  nathanw 		return;
    946  1.14.8.2  nathanw 
    947  1.14.8.2  nathanw 	if (block) {
    948  1.14.8.2  nathanw 		CLR(sc->sc_mcr, sc->sc_mcr_rts);
    949  1.14.8.2  nathanw 		CLR(sc->sc_mcr_active, sc->sc_mcr_rts);
    950  1.14.8.2  nathanw 	} else {
    951  1.14.8.2  nathanw 		SET(sc->sc_mcr, sc->sc_mcr_rts);
    952  1.14.8.2  nathanw 		SET(sc->sc_mcr_active, sc->sc_mcr_rts);
    953  1.14.8.2  nathanw 	}
    954  1.14.8.2  nathanw 	if (machineid & ATARI_HADES) {
    955  1.14.8.2  nathanw 		/* PCB fault, wires exchanged..... */
    956  1.14.8.2  nathanw 		ym2149_dtr(sc->sc_mcr_active & MCR_RTS);
    957  1.14.8.2  nathanw 	}
    958  1.14.8.2  nathanw 	else {
    959  1.14.8.2  nathanw 		ym2149_rts(sc->sc_mcr_active & MCR_RTS);
    960  1.14.8.2  nathanw 	}
    961  1.14.8.2  nathanw }
    962  1.14.8.2  nathanw 
    963  1.14.8.2  nathanw void
    964  1.14.8.2  nathanw serstart(tp)
    965  1.14.8.2  nathanw 	struct tty *tp;
    966  1.14.8.2  nathanw {
    967  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
    968  1.14.8.2  nathanw 	int s;
    969  1.14.8.2  nathanw 
    970  1.14.8.2  nathanw 	s = spltty();
    971  1.14.8.2  nathanw 	if (ISSET(tp->t_state, TS_BUSY))
    972  1.14.8.2  nathanw 		goto out;
    973  1.14.8.2  nathanw 	if (ISSET(tp->t_state, TS_TIMEOUT | TS_TTSTOP))
    974  1.14.8.2  nathanw 		goto stopped;
    975  1.14.8.2  nathanw 
    976  1.14.8.2  nathanw 	if (sc->sc_tx_stopped)
    977  1.14.8.2  nathanw 		goto stopped;
    978  1.14.8.2  nathanw 
    979  1.14.8.2  nathanw 	if (tp->t_outq.c_cc <= tp->t_lowat) {
    980  1.14.8.2  nathanw 		if (ISSET(tp->t_state, TS_ASLEEP)) {
    981  1.14.8.2  nathanw 			CLR(tp->t_state, TS_ASLEEP);
    982  1.14.8.2  nathanw 			wakeup(&tp->t_outq);
    983  1.14.8.2  nathanw 		}
    984  1.14.8.2  nathanw 		selwakeup(&tp->t_wsel);
    985  1.14.8.2  nathanw 		if (tp->t_outq.c_cc == 0)
    986  1.14.8.2  nathanw 			goto stopped;
    987  1.14.8.2  nathanw 	}
    988  1.14.8.2  nathanw 
    989  1.14.8.2  nathanw 	/* Grab the first contiguous region of buffer space. */
    990  1.14.8.2  nathanw 	{
    991  1.14.8.2  nathanw 		u_char *tba;
    992  1.14.8.2  nathanw 		int tbc;
    993  1.14.8.2  nathanw 
    994  1.14.8.2  nathanw 		tba = tp->t_outq.c_cf;
    995  1.14.8.2  nathanw 		tbc = ndqb(&tp->t_outq, 0);
    996  1.14.8.2  nathanw 
    997  1.14.8.2  nathanw 		(void)splserial();
    998  1.14.8.2  nathanw 
    999  1.14.8.2  nathanw 		sc->sc_tba = tba;
   1000  1.14.8.2  nathanw 		sc->sc_tbc = tbc;
   1001  1.14.8.2  nathanw 	}
   1002  1.14.8.2  nathanw 
   1003  1.14.8.2  nathanw 	SET(tp->t_state, TS_BUSY);
   1004  1.14.8.2  nathanw 	sc->sc_tx_busy = 1;
   1005  1.14.8.2  nathanw 
   1006  1.14.8.2  nathanw 	/* Enable transmit completion interrupts if necessary. */
   1007  1.14.8.2  nathanw 	if (!ISSET(sc->sc_imra, IA_TRDY)) {
   1008  1.14.8.2  nathanw 		SET(sc->sc_imra, IA_TRDY|IA_TERR);
   1009  1.14.8.2  nathanw 		single_inst_bset_b(MFP->mf_imra, IA_TRDY|IA_TERR);
   1010  1.14.8.2  nathanw 	}
   1011  1.14.8.2  nathanw 
   1012  1.14.8.2  nathanw 	/* Output the first char */
   1013  1.14.8.2  nathanw 	MFP->mf_udr = *sc->sc_tba;
   1014  1.14.8.2  nathanw 	sc->sc_tbc --;
   1015  1.14.8.2  nathanw 	sc->sc_tba ++;
   1016  1.14.8.2  nathanw 
   1017  1.14.8.2  nathanw 	splx(s);
   1018  1.14.8.2  nathanw 	return;
   1019  1.14.8.2  nathanw 
   1020  1.14.8.2  nathanw stopped:
   1021  1.14.8.2  nathanw 	/* Disable transmit completion interrupts if necessary. */
   1022  1.14.8.2  nathanw 	if (ISSET(sc->sc_imra, IA_TRDY)) {
   1023  1.14.8.2  nathanw 		CLR(sc->sc_imra, IA_TRDY|IA_TERR);
   1024  1.14.8.2  nathanw 		single_inst_bclr_b(MFP->mf_imra, IA_TRDY|IA_TERR);
   1025  1.14.8.2  nathanw 	}
   1026  1.14.8.2  nathanw out:
   1027  1.14.8.2  nathanw 	splx(s);
   1028  1.14.8.2  nathanw 	return;
   1029  1.14.8.2  nathanw }
   1030  1.14.8.2  nathanw 
   1031  1.14.8.2  nathanw /*
   1032  1.14.8.2  nathanw  * Stop output on a line.
   1033  1.14.8.2  nathanw  */
   1034  1.14.8.2  nathanw void
   1035  1.14.8.2  nathanw serstop(tp, flag)
   1036  1.14.8.2  nathanw 	struct tty *tp;
   1037  1.14.8.2  nathanw 	int flag;
   1038  1.14.8.2  nathanw {
   1039  1.14.8.2  nathanw 	struct ser_softc *sc = ser_cd.cd_devs[SERUNIT(tp->t_dev)];
   1040  1.14.8.2  nathanw 	int s;
   1041  1.14.8.2  nathanw 
   1042  1.14.8.2  nathanw 	s = splserial();
   1043  1.14.8.2  nathanw 	if (ISSET(tp->t_state, TS_BUSY)) {
   1044  1.14.8.2  nathanw 		/* Stop transmitting at the next chunk. */
   1045  1.14.8.2  nathanw 		sc->sc_tbc = 0;
   1046  1.14.8.2  nathanw 		sc->sc_heldtbc = 0;
   1047  1.14.8.2  nathanw 		if (!ISSET(tp->t_state, TS_TTSTOP))
   1048  1.14.8.2  nathanw 			SET(tp->t_state, TS_FLUSH);
   1049  1.14.8.2  nathanw 	}
   1050  1.14.8.2  nathanw 	splx(s);
   1051  1.14.8.2  nathanw }
   1052  1.14.8.2  nathanw 
   1053  1.14.8.2  nathanw void
   1054  1.14.8.2  nathanw serdiag(arg)
   1055  1.14.8.2  nathanw 	void *arg;
   1056  1.14.8.2  nathanw {
   1057  1.14.8.2  nathanw 	struct ser_softc *sc = arg;
   1058  1.14.8.2  nathanw 	int overflows, floods;
   1059  1.14.8.2  nathanw 	int s;
   1060  1.14.8.2  nathanw 
   1061  1.14.8.2  nathanw 	s = splserial();
   1062  1.14.8.2  nathanw 	overflows = sc->sc_overflows;
   1063  1.14.8.2  nathanw 	sc->sc_overflows = 0;
   1064  1.14.8.2  nathanw 	floods = sc->sc_floods;
   1065  1.14.8.2  nathanw 	sc->sc_floods = 0;
   1066  1.14.8.2  nathanw 	sc->sc_errors = 0;
   1067  1.14.8.2  nathanw 	splx(s);
   1068  1.14.8.2  nathanw 
   1069  1.14.8.2  nathanw 	log(LOG_WARNING,
   1070  1.14.8.2  nathanw 	    "%s: %d silo overflow%s, %d ibuf flood%s\n",
   1071  1.14.8.2  nathanw 	    sc->sc_dev.dv_xname,
   1072  1.14.8.2  nathanw 	    overflows, overflows == 1 ? "" : "s",
   1073  1.14.8.2  nathanw 	    floods, floods == 1 ? "" : "s");
   1074  1.14.8.2  nathanw }
   1075  1.14.8.2  nathanw 
   1076  1.14.8.2  nathanw static
   1077  1.14.8.2  nathanw void ser_shutdown(sc)
   1078  1.14.8.2  nathanw 	struct ser_softc *sc;
   1079  1.14.8.2  nathanw {
   1080  1.14.8.2  nathanw 	int	s;
   1081  1.14.8.2  nathanw 	struct tty *tp = sc->sc_tty;
   1082  1.14.8.2  nathanw 
   1083  1.14.8.2  nathanw 
   1084  1.14.8.2  nathanw 	s = splserial();
   1085  1.14.8.2  nathanw 
   1086  1.14.8.2  nathanw 	/* If we were asserting flow control, then deassert it. */
   1087  1.14.8.2  nathanw 	sc->sc_rx_blocked = 1;
   1088  1.14.8.2  nathanw 	ser_hwiflow(sc, 1);
   1089  1.14.8.2  nathanw 
   1090  1.14.8.2  nathanw 	/* Clear any break condition set with TIOCSBRK. */
   1091  1.14.8.2  nathanw 	ser_break(sc, 0);
   1092  1.14.8.2  nathanw 
   1093  1.14.8.2  nathanw 	/*
   1094  1.14.8.2  nathanw 	 * Hang up if necessary.  Wait a bit, so the other side has time to
   1095  1.14.8.2  nathanw 	 * notice even if we immediately open the port again.
   1096  1.14.8.2  nathanw 	 */
   1097  1.14.8.2  nathanw 	if (ISSET(tp->t_cflag, HUPCL)) {
   1098  1.14.8.2  nathanw 		ser_modem(sc, 0);
   1099  1.14.8.2  nathanw 		(void) tsleep(sc, TTIPRI, ttclos, hz);
   1100  1.14.8.2  nathanw 	}
   1101  1.14.8.2  nathanw 
   1102  1.14.8.2  nathanw 	/* Turn off interrupts. */
   1103  1.14.8.2  nathanw 	CLR(sc->sc_imra, IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
   1104  1.14.8.2  nathanw 	CLR(sc->sc_imrb, IB_SCTS|IB_SDCD);
   1105  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_imrb, IB_SCTS|IB_SDCD);
   1106  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_imra, IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
   1107  1.14.8.2  nathanw 	splx(s);
   1108  1.14.8.2  nathanw }
   1109  1.14.8.2  nathanw 
   1110  1.14.8.2  nathanw static void
   1111  1.14.8.2  nathanw serrxint(sc, tp)
   1112  1.14.8.2  nathanw 	struct ser_softc	*sc;
   1113  1.14.8.2  nathanw 	struct tty		*tp;
   1114  1.14.8.2  nathanw {
   1115  1.14.8.2  nathanw 	u_int	get, cc, scc;
   1116  1.14.8.2  nathanw 	int	code;
   1117  1.14.8.2  nathanw 	u_char	rsr;
   1118  1.14.8.2  nathanw 	int	s;
   1119  1.14.8.2  nathanw 	static int lsrmap[8] = {
   1120  1.14.8.2  nathanw 		0,      TTY_PE,
   1121  1.14.8.2  nathanw 		TTY_FE, TTY_PE|TTY_FE,
   1122  1.14.8.2  nathanw 		TTY_FE, TTY_PE|TTY_FE,
   1123  1.14.8.2  nathanw 		TTY_FE, TTY_PE|TTY_FE
   1124  1.14.8.2  nathanw 	};
   1125  1.14.8.2  nathanw 
   1126  1.14.8.2  nathanw 	get = sc->sc_rbget;
   1127  1.14.8.2  nathanw 	scc = cc = RXBUFSIZE - sc->sc_rbavail;
   1128  1.14.8.2  nathanw 
   1129  1.14.8.2  nathanw 	if (cc == RXBUFSIZE) {
   1130  1.14.8.2  nathanw 		sc->sc_floods++;
   1131  1.14.8.2  nathanw 		if (sc->sc_errors++ == 0)
   1132  1.14.8.2  nathanw 			callout_reset(&sc->sc_diag_ch, 60 * hz, serdiag, sc);
   1133  1.14.8.2  nathanw 	}
   1134  1.14.8.2  nathanw 
   1135  1.14.8.2  nathanw 	while (cc--) {
   1136  1.14.8.2  nathanw 		rsr = sc->sc_lbuf[get];
   1137  1.14.8.2  nathanw 		if (ISSET(rsr, RSR_BREAK)) {
   1138  1.14.8.2  nathanw #ifdef DDB
   1139  1.14.8.2  nathanw 			if (ISSET(sc->sc_hwflags, SER_HW_CONSOLE))
   1140  1.14.8.2  nathanw 				Debugger();
   1141  1.14.8.2  nathanw #endif
   1142  1.14.8.2  nathanw 		}
   1143  1.14.8.2  nathanw 		else if (ISSET(rsr, RSR_OERR)) {
   1144  1.14.8.2  nathanw 			sc->sc_overflows++;
   1145  1.14.8.2  nathanw 			if (sc->sc_errors++ == 0)
   1146  1.14.8.2  nathanw 				callout_reset(&sc->sc_diag_ch, 60 * hz,
   1147  1.14.8.2  nathanw 				    serdiag, sc);
   1148  1.14.8.2  nathanw 		}
   1149  1.14.8.2  nathanw 		code = sc->sc_rbuf[get] |
   1150  1.14.8.2  nathanw 		    lsrmap[(rsr & (RSR_BREAK|RSR_FERR|RSR_PERR)) >> 3];
   1151  1.14.8.2  nathanw 		(*tp->t_linesw->l_rint)(code, tp);
   1152  1.14.8.2  nathanw 		get = (get + 1) & RXBUFMASK;
   1153  1.14.8.2  nathanw 	}
   1154  1.14.8.2  nathanw 
   1155  1.14.8.2  nathanw 	sc->sc_rbget = get;
   1156  1.14.8.2  nathanw 	s = splserial();
   1157  1.14.8.2  nathanw 	sc->sc_rbavail += scc;
   1158  1.14.8.2  nathanw 	/*
   1159  1.14.8.2  nathanw 	 * Buffers should be ok again, release possible block, but only if the
   1160  1.14.8.2  nathanw 	 * tty layer isn't blocking too.
   1161  1.14.8.2  nathanw 	 */
   1162  1.14.8.2  nathanw 	if (sc->sc_rx_blocked && !ISSET(tp->t_state, TS_TBLOCK)) {
   1163  1.14.8.2  nathanw 		sc->sc_rx_blocked = 0;
   1164  1.14.8.2  nathanw 		ser_hwiflow(sc, 0);
   1165  1.14.8.2  nathanw 	}
   1166  1.14.8.2  nathanw 	splx(s);
   1167  1.14.8.2  nathanw }
   1168  1.14.8.2  nathanw 
   1169  1.14.8.2  nathanw static void
   1170  1.14.8.2  nathanw sertxint(sc, tp)
   1171  1.14.8.2  nathanw 	struct ser_softc	*sc;
   1172  1.14.8.2  nathanw 	struct tty		*tp;
   1173  1.14.8.2  nathanw {
   1174  1.14.8.2  nathanw 
   1175  1.14.8.2  nathanw 	CLR(tp->t_state, TS_BUSY);
   1176  1.14.8.2  nathanw 	if (ISSET(tp->t_state, TS_FLUSH))
   1177  1.14.8.2  nathanw 		CLR(tp->t_state, TS_FLUSH);
   1178  1.14.8.2  nathanw 	else
   1179  1.14.8.2  nathanw 		ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf));
   1180  1.14.8.2  nathanw 	(*tp->t_linesw->l_start)(tp);
   1181  1.14.8.2  nathanw }
   1182  1.14.8.2  nathanw 
   1183  1.14.8.2  nathanw static void
   1184  1.14.8.2  nathanw sermsrint(sc, tp)
   1185  1.14.8.2  nathanw 	struct ser_softc	*sc;
   1186  1.14.8.2  nathanw 	struct tty		*tp;
   1187  1.14.8.2  nathanw {
   1188  1.14.8.2  nathanw 	u_char msr, delta;
   1189  1.14.8.2  nathanw 	int s;
   1190  1.14.8.2  nathanw 
   1191  1.14.8.2  nathanw 	s = splserial();
   1192  1.14.8.2  nathanw 	msr = sc->sc_msr;
   1193  1.14.8.2  nathanw 	delta = sc->sc_msr_delta;
   1194  1.14.8.2  nathanw 	sc->sc_msr_delta = 0;
   1195  1.14.8.2  nathanw 	splx(s);
   1196  1.14.8.2  nathanw 
   1197  1.14.8.2  nathanw 	if (ISSET(delta, sc->sc_msr_dcd)) {
   1198  1.14.8.2  nathanw 		/*
   1199  1.14.8.2  nathanw 		 * Inform the tty layer that carrier detect changed.
   1200  1.14.8.2  nathanw 		 */
   1201  1.14.8.2  nathanw 		(void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MCR_DCD));
   1202  1.14.8.2  nathanw 	}
   1203  1.14.8.2  nathanw 
   1204  1.14.8.2  nathanw 	if (ISSET(delta, sc->sc_msr_cts)) {
   1205  1.14.8.2  nathanw 		/* Block or unblock output according to flow control. */
   1206  1.14.8.2  nathanw 		if (ISSET(msr, sc->sc_msr_cts)) {
   1207  1.14.8.2  nathanw 			sc->sc_tx_stopped = 0;
   1208  1.14.8.2  nathanw 			(*tp->t_linesw->l_start)(tp);
   1209  1.14.8.2  nathanw 		} else {
   1210  1.14.8.2  nathanw 			sc->sc_tx_stopped = 1;
   1211  1.14.8.2  nathanw 			serstop(tp, 0);
   1212  1.14.8.2  nathanw 		}
   1213  1.14.8.2  nathanw 	}
   1214  1.14.8.2  nathanw 
   1215  1.14.8.2  nathanw #ifdef SER_DEBUG
   1216  1.14.8.2  nathanw 	serstatus(sc, "sermsrint");
   1217  1.14.8.2  nathanw #endif
   1218  1.14.8.2  nathanw }
   1219  1.14.8.2  nathanw 
   1220  1.14.8.2  nathanw void
   1221  1.14.8.2  nathanw sersoft(arg)
   1222  1.14.8.2  nathanw 	void *arg;
   1223  1.14.8.2  nathanw {
   1224  1.14.8.2  nathanw 	struct ser_softc *sc = arg;
   1225  1.14.8.2  nathanw 	struct tty	*tp;
   1226  1.14.8.2  nathanw 
   1227  1.14.8.2  nathanw 	ser_softintr_scheduled = 0;
   1228  1.14.8.2  nathanw 
   1229  1.14.8.2  nathanw 	tp = sc->sc_tty;
   1230  1.14.8.2  nathanw 	if (tp == NULL)
   1231  1.14.8.2  nathanw 		return;
   1232  1.14.8.2  nathanw 
   1233  1.14.8.2  nathanw 	if (!ISSET(tp->t_state, TS_ISOPEN) && (tp->t_wopen == 0))
   1234  1.14.8.2  nathanw 		return;
   1235  1.14.8.2  nathanw 
   1236  1.14.8.2  nathanw 	if (sc->sc_rx_ready) {
   1237  1.14.8.2  nathanw 		sc->sc_rx_ready = 0;
   1238  1.14.8.2  nathanw 		serrxint(sc, tp);
   1239  1.14.8.2  nathanw 	}
   1240  1.14.8.2  nathanw 
   1241  1.14.8.2  nathanw 	if (sc->sc_st_check) {
   1242  1.14.8.2  nathanw 		sc->sc_st_check = 0;
   1243  1.14.8.2  nathanw 		sermsrint(sc, tp);
   1244  1.14.8.2  nathanw 	}
   1245  1.14.8.2  nathanw 
   1246  1.14.8.2  nathanw 	if (sc->sc_tx_done) {
   1247  1.14.8.2  nathanw 		sc->sc_tx_done = 0;
   1248  1.14.8.2  nathanw 		sertxint(sc, tp);
   1249  1.14.8.2  nathanw 	}
   1250  1.14.8.2  nathanw }
   1251  1.14.8.2  nathanw 
   1252  1.14.8.2  nathanw int
   1253  1.14.8.2  nathanw sermintr(arg)
   1254  1.14.8.2  nathanw void	*arg;
   1255  1.14.8.2  nathanw {
   1256  1.14.8.2  nathanw 	struct ser_softc *sc = arg;
   1257  1.14.8.2  nathanw 	u_char	msr, delta;
   1258  1.14.8.2  nathanw 
   1259  1.14.8.2  nathanw 	msr = ~MFP->mf_gpip;
   1260  1.14.8.2  nathanw 	delta = msr ^ sc->sc_msr;
   1261  1.14.8.2  nathanw 	sc->sc_msr  = sc->sc_msr & ~(MCR_CTS|MCR_DCD|MCR_RI);
   1262  1.14.8.2  nathanw 	sc->sc_msr |= msr & (MCR_CTS|MCR_DCD|MCR_RI);
   1263  1.14.8.2  nathanw 
   1264  1.14.8.2  nathanw 	if (ISSET(delta, sc->sc_msr_mask)) {
   1265  1.14.8.2  nathanw 		sc->sc_msr_delta |= delta;
   1266  1.14.8.2  nathanw 
   1267  1.14.8.2  nathanw 		/*
   1268  1.14.8.2  nathanw 		 * Stop output immediately if we lose the output
   1269  1.14.8.2  nathanw 		 * flow control signal or carrier detect.
   1270  1.14.8.2  nathanw 		 */
   1271  1.14.8.2  nathanw 		if (ISSET(~msr, sc->sc_msr_mask)) {
   1272  1.14.8.2  nathanw 			sc->sc_tbc = 0;
   1273  1.14.8.2  nathanw 			sc->sc_heldtbc = 0;
   1274  1.14.8.2  nathanw #ifdef SER_DEBUG
   1275  1.14.8.2  nathanw 			serstatus(sc, "sermintr  ");
   1276  1.14.8.2  nathanw #endif
   1277  1.14.8.2  nathanw 		}
   1278  1.14.8.2  nathanw 
   1279  1.14.8.2  nathanw 		sc->sc_st_check = 1;
   1280  1.14.8.2  nathanw 	}
   1281  1.14.8.2  nathanw 	if (!ser_softintr_scheduled)
   1282  1.14.8.2  nathanw 		add_sicallback((si_farg)sersoft, sc, 0);
   1283  1.14.8.2  nathanw 	return 1;
   1284  1.14.8.2  nathanw }
   1285  1.14.8.2  nathanw 
   1286  1.14.8.2  nathanw int
   1287  1.14.8.2  nathanw sertrintr(arg)
   1288  1.14.8.2  nathanw 	void	*arg;
   1289  1.14.8.2  nathanw {
   1290  1.14.8.2  nathanw 	struct ser_softc *sc = arg;
   1291  1.14.8.2  nathanw 	u_int	put, cc;
   1292  1.14.8.2  nathanw 	u_char	rsr, tsr;
   1293  1.14.8.2  nathanw 
   1294  1.14.8.2  nathanw 	put = sc->sc_rbput;
   1295  1.14.8.2  nathanw 	cc = sc->sc_rbavail;
   1296  1.14.8.2  nathanw 
   1297  1.14.8.2  nathanw 	rsr = MFP->mf_rsr;
   1298  1.14.8.2  nathanw 	if (ISSET(rsr, RSR_BFULL|RSR_BREAK)) {
   1299  1.14.8.2  nathanw 		for (; ISSET(rsr, RSR_BFULL|RSR_BREAK) && cc > 0; cc--) {
   1300  1.14.8.2  nathanw 			sc->sc_rbuf[put] = MFP->mf_udr;
   1301  1.14.8.2  nathanw 			sc->sc_lbuf[put] = rsr;
   1302  1.14.8.2  nathanw 			put = (put + 1) & RXBUFMASK;
   1303  1.14.8.2  nathanw 			if ((rsr & RSR_BREAK) && (MFP->mf_rsr & RSR_BREAK))
   1304  1.14.8.2  nathanw 				rsr = 0;
   1305  1.14.8.2  nathanw 			else rsr = MFP->mf_rsr;
   1306  1.14.8.2  nathanw 		}
   1307  1.14.8.2  nathanw 		/*
   1308  1.14.8.2  nathanw 		 * Current string of incoming characters ended because
   1309  1.14.8.2  nathanw 		 * no more data was available. Schedule a receive event
   1310  1.14.8.2  nathanw 		 * if any data was received. Drop any characters that
   1311  1.14.8.2  nathanw 		 * we couldn't handle.
   1312  1.14.8.2  nathanw 		 */
   1313  1.14.8.2  nathanw 		sc->sc_rbput    = put;
   1314  1.14.8.2  nathanw 		sc->sc_rbavail  = cc;
   1315  1.14.8.2  nathanw 		sc->sc_rx_ready = 1;
   1316  1.14.8.2  nathanw 		/*
   1317  1.14.8.2  nathanw 		 * See if we are in danger of overflowing a buffer. If
   1318  1.14.8.2  nathanw 		 * so, use hardware flow control to ease the pressure.
   1319  1.14.8.2  nathanw 		 */
   1320  1.14.8.2  nathanw 		if (sc->sc_rx_blocked == 0 &&
   1321  1.14.8.2  nathanw 		    cc < sc->sc_r_hiwat) {
   1322  1.14.8.2  nathanw 			sc->sc_rx_blocked = 1;
   1323  1.14.8.2  nathanw 			ser_hwiflow(sc, 1);
   1324  1.14.8.2  nathanw 		}
   1325  1.14.8.2  nathanw 		/*
   1326  1.14.8.2  nathanw 		 * If we're out of space, throw away any further input.
   1327  1.14.8.2  nathanw 		 */
   1328  1.14.8.2  nathanw 		if (!cc) {
   1329  1.14.8.2  nathanw 			while (ISSET(rsr, RSR_BFULL|RSR_BREAK)) {
   1330  1.14.8.2  nathanw 				rsr = MFP->mf_udr;
   1331  1.14.8.2  nathanw 				rsr = MFP->mf_rsr;
   1332  1.14.8.2  nathanw 			}
   1333  1.14.8.2  nathanw 		}
   1334  1.14.8.2  nathanw 	}
   1335  1.14.8.2  nathanw 
   1336  1.14.8.2  nathanw 	/*
   1337  1.14.8.2  nathanw 	 * Done handling any receive interrupts. See if data can be
   1338  1.14.8.2  nathanw 	 * transmitted as well. Schedule tx done event if no data left
   1339  1.14.8.2  nathanw 	 * and tty was marked busy.
   1340  1.14.8.2  nathanw 	 */
   1341  1.14.8.2  nathanw 	tsr = MFP->mf_tsr;
   1342  1.14.8.2  nathanw 	if (ISSET(tsr, TSR_BE)) {
   1343  1.14.8.2  nathanw 		/*
   1344  1.14.8.2  nathanw 		 * If we've delayed a parameter change, do it now, and restart
   1345  1.14.8.2  nathanw 		 * output.
   1346  1.14.8.2  nathanw 		 */
   1347  1.14.8.2  nathanw 		if (sc->sc_heldchange) {
   1348  1.14.8.2  nathanw 			ser_loadchannelregs(sc);
   1349  1.14.8.2  nathanw 			sc->sc_heldchange = 0;
   1350  1.14.8.2  nathanw 			sc->sc_tbc = sc->sc_heldtbc;
   1351  1.14.8.2  nathanw 			sc->sc_heldtbc = 0;
   1352  1.14.8.2  nathanw 		}
   1353  1.14.8.2  nathanw 		/* Output the next character, if any. */
   1354  1.14.8.2  nathanw 		if (sc->sc_tbc > 0) {
   1355  1.14.8.2  nathanw 			MFP->mf_udr = *sc->sc_tba;
   1356  1.14.8.2  nathanw 			sc->sc_tbc --;
   1357  1.14.8.2  nathanw 			sc->sc_tba ++;
   1358  1.14.8.2  nathanw 		} else if (sc->sc_tx_busy) {
   1359  1.14.8.2  nathanw 			sc->sc_tx_busy = 0;
   1360  1.14.8.2  nathanw 			sc->sc_tx_done = 1;
   1361  1.14.8.2  nathanw 		}
   1362  1.14.8.2  nathanw 	}
   1363  1.14.8.2  nathanw 
   1364  1.14.8.2  nathanw 	if (!ser_softintr_scheduled)
   1365  1.14.8.2  nathanw 		add_sicallback((si_farg)sersoft, sc, 0);
   1366  1.14.8.2  nathanw 	return 1;
   1367  1.14.8.2  nathanw }
   1368  1.14.8.2  nathanw 
   1369  1.14.8.2  nathanw static int
   1370  1.14.8.2  nathanw serspeed(speed)
   1371  1.14.8.2  nathanw 	long speed;
   1372  1.14.8.2  nathanw {
   1373  1.14.8.2  nathanw #define	divrnd(n, q)	(((n)*2/(q)+1)/2)	/* divide and round off */
   1374  1.14.8.2  nathanw 
   1375  1.14.8.2  nathanw 	int div, x, err;
   1376  1.14.8.2  nathanw 
   1377  1.14.8.2  nathanw 	if (speed <= 0)
   1378  1.14.8.2  nathanw 		return (-1);
   1379  1.14.8.2  nathanw 
   1380  1.14.8.2  nathanw 	for (div = 4; div <= 64; div *= 4) {
   1381  1.14.8.2  nathanw 		x = divrnd((SER_FREQ / div), speed);
   1382  1.14.8.2  nathanw 
   1383  1.14.8.2  nathanw 		/*
   1384  1.14.8.2  nathanw 		 * The value must fit in the timer-d dataregister. If
   1385  1.14.8.2  nathanw 		 * not, try another delay-mode.
   1386  1.14.8.2  nathanw 		 */
   1387  1.14.8.2  nathanw 		if ((x/2) > 255)
   1388  1.14.8.2  nathanw 			continue;
   1389  1.14.8.2  nathanw 
   1390  1.14.8.2  nathanw 		/*
   1391  1.14.8.2  nathanw 		 * Baudrate to high for the interface or cannot be made
   1392  1.14.8.2  nathanw 		 * within tolerance.
   1393  1.14.8.2  nathanw 		 */
   1394  1.14.8.2  nathanw 		if (x <= 0)
   1395  1.14.8.2  nathanw 			return (-1);
   1396  1.14.8.2  nathanw 
   1397  1.14.8.2  nathanw 		err = divrnd((SER_FREQ / div) * 1000, speed * x) - 1000;
   1398  1.14.8.2  nathanw 		if (err < 0)
   1399  1.14.8.2  nathanw 			err = -err;
   1400  1.14.8.2  nathanw 		if (err > SER_TOLERANCE)
   1401  1.14.8.2  nathanw 			continue;
   1402  1.14.8.2  nathanw 
   1403  1.14.8.2  nathanw 		/*
   1404  1.14.8.2  nathanw 		 * Translate 'div' to delay-code
   1405  1.14.8.2  nathanw 		 */
   1406  1.14.8.2  nathanw 		if (div == 4)
   1407  1.14.8.2  nathanw 			div = 1;
   1408  1.14.8.2  nathanw 		else if (div == 16)
   1409  1.14.8.2  nathanw 			div = 3;
   1410  1.14.8.2  nathanw 		else if (div == 64)
   1411  1.14.8.2  nathanw 			div = 5;
   1412  1.14.8.2  nathanw 
   1413  1.14.8.2  nathanw 		return ((x/2) | (div << 8));
   1414  1.14.8.2  nathanw 	}
   1415  1.14.8.2  nathanw 	return (-1);
   1416  1.14.8.2  nathanw 
   1417  1.14.8.3  nathanw #undef	divrnd
   1418  1.14.8.2  nathanw }
   1419  1.14.8.2  nathanw 
   1420  1.14.8.2  nathanw /*
   1421  1.14.8.2  nathanw  * Following are all routines needed for SER to act as console
   1422  1.14.8.2  nathanw  */
   1423  1.14.8.2  nathanw #include <dev/cons.h>
   1424  1.14.8.2  nathanw 
   1425  1.14.8.2  nathanw void
   1426  1.14.8.2  nathanw sercnprobe(cp)
   1427  1.14.8.2  nathanw 	struct consdev *cp;
   1428  1.14.8.2  nathanw {
   1429  1.14.8.2  nathanw 	/*
   1430  1.14.8.2  nathanw 	 * Activate serial console when DCD present...
   1431  1.14.8.2  nathanw 	 */
   1432  1.14.8.2  nathanw 	if (MFP->mf_gpip & MCR_DCD) {
   1433  1.14.8.2  nathanw 		cp->cn_pri = CN_DEAD;
   1434  1.14.8.2  nathanw 		return;
   1435  1.14.8.2  nathanw 	}
   1436  1.14.8.2  nathanw 
   1437  1.14.8.2  nathanw 	/* initialize required fields */
   1438  1.14.8.4  nathanw 	/* XXX: LWP What unit? */
   1439  1.14.8.4  nathanw 	cp->cn_dev = makedev(cdevsw_lookup_major(&ser_cdevsw), 0);
   1440  1.14.8.4  nathanw #if SERCONSOLE > 0
   1441  1.14.8.2  nathanw 	cp->cn_pri = CN_REMOTE;	/* Force a serial port console */
   1442  1.14.8.2  nathanw #else
   1443  1.14.8.2  nathanw 	cp->cn_pri = CN_NORMAL;
   1444  1.14.8.4  nathanw #endif /* SERCONSOLE > 0 */
   1445  1.14.8.2  nathanw }
   1446  1.14.8.2  nathanw 
   1447  1.14.8.2  nathanw void
   1448  1.14.8.2  nathanw sercninit(cp)
   1449  1.14.8.2  nathanw 	struct consdev *cp;
   1450  1.14.8.2  nathanw {
   1451  1.14.8.2  nathanw 	serinitcons(CONSBAUD);
   1452  1.14.8.2  nathanw }
   1453  1.14.8.2  nathanw 
   1454  1.14.8.2  nathanw /*
   1455  1.14.8.2  nathanw  * Initialize UART to known state.
   1456  1.14.8.2  nathanw  */
   1457  1.14.8.2  nathanw void
   1458  1.14.8.2  nathanw serinit(baud)
   1459  1.14.8.2  nathanw int	baud;
   1460  1.14.8.2  nathanw {
   1461  1.14.8.2  nathanw 	int ospeed = serspeed(baud);
   1462  1.14.8.2  nathanw 
   1463  1.14.8.2  nathanw 	MFP->mf_ucr = UCR_CLKDIV|UCR_8BITS|UCR_STOPB1;
   1464  1.14.8.2  nathanw 	MFP->mf_rsr = RSR_ENAB;
   1465  1.14.8.2  nathanw 	MFP->mf_tsr = TSR_ENAB;
   1466  1.14.8.2  nathanw 
   1467  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_tcdcr, 0x07);
   1468  1.14.8.2  nathanw 	MFP->mf_tddr  = ospeed;
   1469  1.14.8.2  nathanw 	single_inst_bset_b(MFP->mf_tcdcr, (ospeed >> 8) & 0x0f);
   1470  1.14.8.2  nathanw }
   1471  1.14.8.2  nathanw 
   1472  1.14.8.2  nathanw /*
   1473  1.14.8.2  nathanw  * Set UART for console use. Do normal init, then enable interrupts.
   1474  1.14.8.2  nathanw  */
   1475  1.14.8.2  nathanw void
   1476  1.14.8.2  nathanw serinitcons(baud)
   1477  1.14.8.2  nathanw int	baud;
   1478  1.14.8.2  nathanw {
   1479  1.14.8.2  nathanw 	serinit(baud);
   1480  1.14.8.2  nathanw 
   1481  1.14.8.2  nathanw 	/* Set rts/dtr */
   1482  1.14.8.2  nathanw 	ym2149_rts(0);
   1483  1.14.8.2  nathanw 	ym2149_dtr(0);
   1484  1.14.8.2  nathanw 
   1485  1.14.8.2  nathanw 	single_inst_bset_b(MFP->mf_imra, (IA_RRDY|IA_RERR|IA_TRDY|IA_TERR));
   1486  1.14.8.2  nathanw }
   1487  1.14.8.2  nathanw 
   1488  1.14.8.2  nathanw int
   1489  1.14.8.2  nathanw sercngetc(dev)
   1490  1.14.8.2  nathanw 	dev_t dev;
   1491  1.14.8.2  nathanw {
   1492  1.14.8.2  nathanw 	u_char	stat, c;
   1493  1.14.8.2  nathanw 	int	s;
   1494  1.14.8.2  nathanw 
   1495  1.14.8.2  nathanw 	s = splserial();
   1496  1.14.8.2  nathanw 	while (!ISSET(stat = MFP->mf_rsr, RSR_BFULL)) {
   1497  1.14.8.2  nathanw 		if (!ISSET(stat, RSR_ENAB)) /* XXX */
   1498  1.14.8.2  nathanw 			MFP->mf_rsr |= RSR_ENAB;
   1499  1.14.8.2  nathanw 		if (stat & (RSR_FERR|RSR_PERR|RSR_OERR))
   1500  1.14.8.2  nathanw 			c = MFP->mf_udr;
   1501  1.14.8.2  nathanw 	}
   1502  1.14.8.2  nathanw 	c = MFP->mf_udr;
   1503  1.14.8.2  nathanw 	splx(s);
   1504  1.14.8.2  nathanw 	return c;
   1505  1.14.8.2  nathanw }
   1506  1.14.8.2  nathanw 
   1507  1.14.8.2  nathanw u_int s_imra;
   1508  1.14.8.2  nathanw u_int s_stat1, s_stat2, s_stat3;
   1509  1.14.8.2  nathanw void
   1510  1.14.8.2  nathanw sercnputc(dev, c)
   1511  1.14.8.2  nathanw 	dev_t dev;
   1512  1.14.8.2  nathanw 	int c;
   1513  1.14.8.2  nathanw {
   1514  1.14.8.2  nathanw 	int	timo;
   1515  1.14.8.2  nathanw 	u_char	stat, imra;
   1516  1.14.8.2  nathanw 
   1517  1.14.8.2  nathanw 	/* Mask serial interrupts */
   1518  1.14.8.2  nathanw 	imra  = MFP->mf_imra & (IA_RRDY|IA_RERR|IA_TRDY|IA_TERR);
   1519  1.14.8.2  nathanw 	single_inst_bclr_b(MFP->mf_imra, imra);
   1520  1.14.8.2  nathanw s_imra = imra;
   1521  1.14.8.2  nathanw 
   1522  1.14.8.2  nathanw 	/* wait for any pending transmission to finish */
   1523  1.14.8.2  nathanw 	timo = 50000;
   1524  1.14.8.2  nathanw s_stat1 = MFP->mf_tsr;
   1525  1.14.8.2  nathanw 	while (!ISSET(stat = MFP->mf_tsr, TSR_BE) && --timo)
   1526  1.14.8.2  nathanw 		;
   1527  1.14.8.2  nathanw 	MFP->mf_udr = c;
   1528  1.14.8.2  nathanw 	/* wait for this transmission to complete */
   1529  1.14.8.2  nathanw 	timo = 1500000;
   1530  1.14.8.2  nathanw s_stat2 = MFP->mf_tsr;
   1531  1.14.8.2  nathanw 	while (!ISSET(stat = MFP->mf_tsr, TSR_BE) && --timo)
   1532  1.14.8.2  nathanw 		;
   1533  1.14.8.2  nathanw 
   1534  1.14.8.2  nathanw s_stat3 = MFP->mf_tsr;
   1535  1.14.8.2  nathanw 	/* Clear pending serial interrupts and re-enable */
   1536  1.14.8.2  nathanw 	MFP->mf_ipra = (u_int8_t)~imra;
   1537  1.14.8.2  nathanw 	single_inst_bset_b(MFP->mf_imra, imra);
   1538  1.14.8.2  nathanw }
   1539  1.14.8.2  nathanw 
   1540  1.14.8.2  nathanw void
   1541  1.14.8.2  nathanw sercnpollc(dev, on)
   1542  1.14.8.2  nathanw 	dev_t dev;
   1543  1.14.8.2  nathanw 	int on;
   1544  1.14.8.2  nathanw {
   1545  1.14.8.2  nathanw 
   1546  1.14.8.2  nathanw }
   1547