zs.c revision 1.56.2.1
1 /* $NetBSD: zs.c,v 1.56.2.1 2008/06/23 04:30:12 wrstuden Exp $ */ 2 3 /* 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This software was developed by the Computer Systems Engineering group 8 * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 9 * contributed to Berkeley. 10 * 11 * 12 * All advertising materials mentioning features or use of this software 13 * must display the following acknowledgement: 14 * This product includes software developed by the University of 15 * California, Lawrence Berkeley Laboratory. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions 19 * are met: 20 * 1. Redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer. 22 * 2. Redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the 24 * documentation and/or other materials provided with the distribution. 25 * 3. Neither the name of the University nor the names of its contributors 26 * may be used to endorse or promote products derived from this software 27 * without specific prior written permission. 28 * 29 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 30 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 31 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 32 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 33 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 34 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 35 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 36 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 37 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 38 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 39 * SUCH DAMAGE. 40 * 41 * @(#)zs.c 8.1 (Berkeley) 7/19/93 42 */ 43 44 /*- 45 * Copyright (c) 1995 The NetBSD Foundation, Inc. (Atari modifications) 46 * All rights reserved. 47 * 48 * This code is derived from software contributed to The NetBSD Foundation 49 * by Leo Weppelman. 50 * 51 * Redistribution and use in source and binary forms, with or without 52 * modification, are permitted provided that the following conditions 53 * are met: 54 * 1. Redistributions of source code must retain the above copyright 55 * notice, this list of conditions and the following disclaimer. 56 * 2. Redistributions in binary form must reproduce the above copyright 57 * notice, this list of conditions and the following disclaimer in the 58 * documentation and/or other materials provided with the distribution. 59 * 60 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 61 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 62 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 63 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 64 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 65 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 66 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 67 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 68 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 69 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 70 * POSSIBILITY OF SUCH DAMAGE. 71 */ 72 73 /* 74 * Zilog Z8530 (ZSCC) driver. 75 * 76 * Runs two tty ports (modem2 and serial2) on zs0. 77 * 78 * This driver knows far too much about chip to usage mappings. 79 */ 80 81 #include <sys/cdefs.h> 82 __KERNEL_RCSID(0, "$NetBSD: zs.c,v 1.56.2.1 2008/06/23 04:30:12 wrstuden Exp $"); 83 84 #include <sys/param.h> 85 #include <sys/systm.h> 86 #include <sys/proc.h> 87 #include <sys/device.h> 88 #include <sys/conf.h> 89 #include <sys/file.h> 90 #include <sys/ioctl.h> 91 #include <sys/malloc.h> 92 #include <sys/tty.h> 93 #include <sys/time.h> 94 #include <sys/kernel.h> 95 #include <sys/syslog.h> 96 #include <sys/kauth.h> 97 98 #include <machine/cpu.h> 99 #include <machine/iomap.h> 100 #include <machine/scu.h> 101 #include <machine/mfp.h> 102 #include <atari/dev/ym2149reg.h> 103 104 #include <dev/ic/z8530reg.h> 105 #include <atari/dev/zsvar.h> 106 #include "zs.h" 107 #if NZS > 1 108 #error "This driver supports only 1 85C30!" 109 #endif 110 111 #if NZS > 0 112 113 #define PCLK (8053976) /* PCLK pin input clock rate */ 114 #define PCLK_HD (9600 * 1536) /* PCLK on Hades pin input clock rate */ 115 116 #define splzs spl5 117 118 /* 119 * Software state per found chip. 120 */ 121 struct zs_softc { 122 struct device zi_dev; /* base device */ 123 volatile struct zsdevice *zi_zs; /* chip registers */ 124 struct zs_chanstate zi_cs[2]; /* chan A and B software state */ 125 }; 126 127 static u_char cb_scheduled = 0; /* Already asked for callback? */ 128 /* 129 * Define the registers for a closed port 130 */ 131 static u_char zs_init_regs[16] = { 132 /* 0 */ 0, 133 /* 1 */ 0, 134 /* 2 */ 0x60, 135 /* 3 */ 0, 136 /* 4 */ 0, 137 /* 5 */ 0, 138 /* 6 */ 0, 139 /* 7 */ 0, 140 /* 8 */ 0, 141 /* 9 */ ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT, 142 /* 10 */ ZSWR10_NRZ, 143 /* 11 */ ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD, 144 /* 12 */ 0, 145 /* 13 */ 0, 146 /* 14 */ ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA, 147 /* 15 */ 0 148 }; 149 150 /* 151 * Define the machine dependant clock frequencies 152 * If BRgen feeds sender/receiver we always use a 153 * divisor 16, therefor the division by 16 can as 154 * well be done here. 155 */ 156 static u_long zs_freqs_tt[] = { 157 /* 158 * Atari TT, RTxCB is generated by TT-MFP timer C, 159 * which is set to 307.2 kHz during initialisation 160 * and never changed afterwards. 161 */ 162 PCLK/16, /* BRgen, PCLK, divisor 16 */ 163 229500, /* BRgen, RTxCA, divisor 16 */ 164 3672000, /* RTxCA, from PCLK4 */ 165 0, /* TRxCA, external */ 166 167 PCLK/16, /* BRgen, PCLK, divisor 16 */ 168 19200, /* BRgen, RTxCB, divisor 16 */ 169 307200, /* RTxCB, from TT-MFP TCO */ 170 2457600 /* TRxCB, from BCLK */ 171 }; 172 173 static u_long zs_freqs_falcon[] = { 174 /* 175 * Atari Falcon, XXX no specs available, this might be wrong 176 */ 177 PCLK/16, /* BRgen, PCLK, divisor 16 */ 178 229500, /* BRgen, RTxCA, divisor 16 */ 179 3672000, /* RTxCA, ??? */ 180 0, /* TRxCA, external */ 181 182 PCLK/16, /* BRgen, PCLK, divisor 16 */ 183 229500, /* BRgen, RTxCB, divisor 16 */ 184 3672000, /* RTxCB, ??? */ 185 2457600 /* TRxCB, ??? */ 186 }; 187 188 static u_long zs_freqs_hades[] = { 189 /* 190 * XXX: Channel-A unchecked!!!!! 191 */ 192 PCLK_HD/16, /* BRgen, PCLK, divisor 16 */ 193 229500, /* BRgen, RTxCA, divisor 16 */ 194 3672000, /* RTxCA, from PCLK4 */ 195 0, /* TRxCA, external */ 196 197 PCLK_HD/16, /* BRgen, PCLK, divisor 16 */ 198 235550, /* BRgen, RTxCB, divisor 16 */ 199 3768800, /* RTxCB, 3.7688MHz */ 200 3768800 /* TRxCB, 3.7688MHz */ 201 }; 202 203 static u_long zs_freqs_generic[] = { 204 /* 205 * other machines, assume only PCLK is available 206 */ 207 PCLK/16, /* BRgen, PCLK, divisor 16 */ 208 0, /* BRgen, RTxCA, divisor 16 */ 209 0, /* RTxCA, unknown */ 210 0, /* TRxCA, unknown */ 211 212 PCLK/16, /* BRgen, PCLK, divisor 16 */ 213 0, /* BRgen, RTxCB, divisor 16 */ 214 0, /* RTxCB, unknown */ 215 0 /* TRxCB, unknown */ 216 }; 217 static u_long *zs_frequencies; 218 219 /* Definition of the driver for autoconfig. */ 220 static int zsmatch __P((struct device *, struct cfdata *, void *)); 221 static void zsattach __P((struct device *, struct device *, void *)); 222 223 CFATTACH_DECL(zs, sizeof(struct zs_softc), 224 zsmatch, zsattach, NULL, NULL); 225 226 extern struct cfdriver zs_cd; 227 228 /* {b,c}devsw[] function prototypes */ 229 dev_type_open(zsopen); 230 dev_type_close(zsclose); 231 dev_type_read(zsread); 232 dev_type_write(zswrite); 233 dev_type_ioctl(zsioctl); 234 dev_type_stop(zsstop); 235 dev_type_tty(zstty); 236 dev_type_poll(zspoll); 237 238 const struct cdevsw zs_cdevsw = { 239 zsopen, zsclose, zsread, zswrite, zsioctl, 240 zsstop, zstty, zspoll, nommap, ttykqfilter, D_TTY 241 }; 242 243 /* Interrupt handlers. */ 244 int zshard __P((long)); 245 static int zssoft __P((long)); 246 static int zsrint __P((struct zs_chanstate *, volatile struct zschan *)); 247 static int zsxint __P((struct zs_chanstate *, volatile struct zschan *)); 248 static int zssint __P((struct zs_chanstate *, volatile struct zschan *)); 249 250 static struct zs_chanstate *zslist; 251 252 /* Routines called from other code. */ 253 static void zsstart __P((struct tty *)); 254 255 /* Routines purely local to this driver. */ 256 static void zsoverrun __P((int, long *, const char *)); 257 static int zsparam __P((struct tty *, struct termios *)); 258 static int zsbaudrate __P((int, int, int *, int *, int *, int *)); 259 static int zs_modem __P((struct zs_chanstate *, int, int)); 260 static void zs_loadchannelregs __P((volatile struct zschan *, u_char *)); 261 static void zs_shutdown __P((struct zs_chanstate *)); 262 263 static int zsshortcuts; /* number of "shortcut" software interrupts */ 264 265 static int 266 zsmatch(pdp, cfp, auxp) 267 struct device *pdp; 268 struct cfdata *cfp; 269 void *auxp; 270 { 271 static int zs_matched = 0; 272 273 if(strcmp("zs", auxp) || zs_matched) 274 return(0); 275 zs_matched = 1; 276 return(1); 277 } 278 279 /* 280 * Attach a found zs. 281 */ 282 static void 283 zsattach(parent, dev, aux) 284 struct device *parent; 285 struct device *dev; 286 void *aux; 287 { 288 register struct zs_softc *zi; 289 register struct zs_chanstate *cs; 290 register volatile struct zsdevice *addr; 291 char tmp; 292 293 addr = (struct zsdevice *)AD_SCC; 294 zi = (struct zs_softc *)dev; 295 zi->zi_zs = addr; 296 cs = zi->zi_cs; 297 298 /* 299 * Get the command register into a known state. 300 */ 301 tmp = addr->zs_chan[ZS_CHAN_A].zc_csr; 302 tmp = addr->zs_chan[ZS_CHAN_A].zc_csr; 303 tmp = addr->zs_chan[ZS_CHAN_B].zc_csr; 304 tmp = addr->zs_chan[ZS_CHAN_B].zc_csr; 305 306 /* 307 * Do a hardware reset. 308 */ 309 ZS_WRITE(&addr->zs_chan[ZS_CHAN_A], 9, ZSWR9_HARD_RESET); 310 delay(50000); /*enough ? */ 311 ZS_WRITE(&addr->zs_chan[ZS_CHAN_A], 9, 0); 312 313 /* 314 * Initialize both channels 315 */ 316 zs_loadchannelregs(&addr->zs_chan[ZS_CHAN_A], zs_init_regs); 317 zs_loadchannelregs(&addr->zs_chan[ZS_CHAN_B], zs_init_regs); 318 319 if(machineid & ATARI_TT) { 320 /* 321 * ininitialise TT-MFP timer C: 307200Hz 322 * timer C and D share one control register: 323 * bits 0-2 control timer D 324 * bits 4-6 control timer C 325 */ 326 int cr = MFP2->mf_tcdcr & 7; 327 MFP2->mf_tcdcr = cr; /* stop timer C */ 328 MFP2->mf_tcdr = 1; /* counter 1 */ 329 cr |= T_Q004 << 4; /* divisor 4 */ 330 MFP2->mf_tcdcr = cr; /* start timer C */ 331 /* 332 * enable scc related interrupts 333 */ 334 SCU->vme_mask |= SCU_SCC; 335 336 zs_frequencies = zs_freqs_tt; 337 } else if (machineid & ATARI_FALCON) { 338 zs_frequencies = zs_freqs_falcon; 339 } else if (machineid & ATARI_HADES) { 340 zs_frequencies = zs_freqs_hades; 341 } else { 342 zs_frequencies = zs_freqs_generic; 343 } 344 345 /* link into interrupt list with order (A,B) (B=A+1) */ 346 cs[0].cs_next = &cs[1]; 347 cs[1].cs_next = zslist; 348 zslist = cs; 349 350 cs->cs_unit = 0; 351 cs->cs_zc = &addr->zs_chan[ZS_CHAN_A]; 352 cs++; 353 cs->cs_unit = 1; 354 cs->cs_zc = &addr->zs_chan[ZS_CHAN_B]; 355 356 printf(": serial2 on channel a and modem2 on channel b\n"); 357 } 358 359 /* 360 * Open a zs serial port. 361 */ 362 int 363 zsopen(dev, flags, mode, l) 364 dev_t dev; 365 int flags; 366 int mode; 367 struct lwp *l; 368 { 369 register struct tty *tp; 370 register struct zs_chanstate *cs; 371 struct zs_softc *zi; 372 int unit = ZS_UNIT(dev); 373 int zs = unit >> 1; 374 int error, s; 375 376 zi = device_lookup_private(&zs_cd, zs); 377 if (zi == NULL) 378 return (ENXIO); 379 cs = &zi->zi_cs[unit & 1]; 380 381 /* 382 * When port A (ser02) is selected on the TT, make sure 383 * the port is enabled. 384 */ 385 if((machineid & ATARI_TT) && !(unit & 1)) 386 ym2149_ser2(1); 387 388 if (cs->cs_rbuf == NULL) { 389 cs->cs_rbuf = malloc(ZLRB_RING_SIZE * sizeof(int), M_DEVBUF, 390 M_WAITOK); 391 } 392 393 tp = cs->cs_ttyp; 394 if(tp == NULL) { 395 cs->cs_ttyp = tp = ttymalloc(); 396 tty_attach(tp); 397 tp->t_dev = dev; 398 tp->t_oproc = zsstart; 399 tp->t_param = zsparam; 400 } 401 402 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 403 return (EBUSY); 404 405 s = spltty(); 406 407 /* 408 * Do the following iff this is a first open. 409 */ 410 if (!(tp->t_state & TS_ISOPEN) && tp->t_wopen == 0) { 411 if(tp->t_ispeed == 0) { 412 tp->t_iflag = TTYDEF_IFLAG; 413 tp->t_oflag = TTYDEF_OFLAG; 414 tp->t_cflag = TTYDEF_CFLAG; 415 tp->t_lflag = TTYDEF_LFLAG; 416 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 417 } 418 ttychars(tp); 419 ttsetwater(tp); 420 421 (void)zsparam(tp, &tp->t_termios); 422 423 /* 424 * Turn on DTR. We must always do this, even if carrier is not 425 * present, because otherwise we'd have to use TIOCSDTR 426 * immediately after setting CLOCAL, which applications do not 427 * expect. We always assert DTR while the device is open 428 * unless explicitly requested to deassert it. 429 */ 430 zs_modem(cs, ZSWR5_RTS|ZSWR5_DTR, DMSET); 431 /* May never get a status intr. if DCD already on. -gwr */ 432 if((cs->cs_rr0 = cs->cs_zc->zc_csr) & ZSRR0_DCD) 433 tp->t_state |= TS_CARR_ON; 434 if(cs->cs_softcar) 435 tp->t_state |= TS_CARR_ON; 436 } 437 438 splx(s); 439 440 error = ttyopen(tp, ZS_DIALOUT(dev), (flags & O_NONBLOCK)); 441 if (error) 442 goto bad; 443 444 error = tp->t_linesw->l_open(dev, tp); 445 if(error) 446 goto bad; 447 return (0); 448 449 bad: 450 if (!(tp->t_state & TS_ISOPEN) && tp->t_wopen == 0) { 451 /* 452 * We failed to open the device, and nobody else had it opened. 453 * Clean up the state as appropriate. 454 */ 455 zs_shutdown(cs); 456 } 457 return(error); 458 } 459 460 /* 461 * Close a zs serial port. 462 */ 463 int 464 zsclose(dev, flags, mode, l) 465 dev_t dev; 466 int flags; 467 int mode; 468 struct lwp *l; 469 { 470 register struct zs_chanstate *cs; 471 register struct tty *tp; 472 struct zs_softc *zi; 473 int unit = ZS_UNIT(dev); 474 475 zi = device_lookup_private(&zs_cd, unit >> 1); 476 cs = &zi->zi_cs[unit & 1]; 477 tp = cs->cs_ttyp; 478 479 tp->t_linesw->l_close(tp, flags); 480 ttyclose(tp); 481 482 if (!(tp->t_state & TS_ISOPEN) && tp->t_wopen == 0) { 483 /* 484 * Although we got a last close, the device may still be in 485 * use; e.g. if this was the dialout node, and there are still 486 * processes waiting for carrier on the non-dialout node. 487 */ 488 zs_shutdown(cs); 489 } 490 return (0); 491 } 492 493 /* 494 * Read/write zs serial port. 495 */ 496 int 497 zsread(dev, uio, flags) 498 dev_t dev; 499 struct uio *uio; 500 int flags; 501 { 502 register struct zs_chanstate *cs; 503 register struct zs_softc *zi; 504 register struct tty *tp; 505 int unit; 506 507 unit = ZS_UNIT(dev); 508 zi = device_lookup_private(&zs_cd, unit >> 1); 509 cs = &zi->zi_cs[unit & 1]; 510 tp = cs->cs_ttyp; 511 512 return(tp->t_linesw->l_read(tp, uio, flags)); 513 } 514 515 int 516 zswrite(dev, uio, flags) 517 dev_t dev; 518 struct uio *uio; 519 int flags; 520 { 521 register struct zs_chanstate *cs; 522 register struct zs_softc *zi; 523 register struct tty *tp; 524 int unit; 525 526 unit = ZS_UNIT(dev); 527 zi = device_lookup_private(&zs_cd, unit >> 1); 528 cs = &zi->zi_cs[unit & 1]; 529 tp = cs->cs_ttyp; 530 531 return(tp->t_linesw->l_write(tp, uio, flags)); 532 } 533 534 int 535 zspoll(dev, events, l) 536 dev_t dev; 537 int events; 538 struct lwp *l; 539 { 540 register struct zs_chanstate *cs; 541 register struct zs_softc *zi; 542 register struct tty *tp; 543 int unit; 544 545 unit = ZS_UNIT(dev); 546 zi = device_lookup_private(&zs_cd, unit >> 1); 547 cs = &zi->zi_cs[unit & 1]; 548 tp = cs->cs_ttyp; 549 550 return ((*tp->t_linesw->l_poll)(tp, events, l)); 551 } 552 553 struct tty * 554 zstty(dev) 555 dev_t dev; 556 { 557 register struct zs_chanstate *cs; 558 register struct zs_softc *zi; 559 int unit; 560 561 unit = ZS_UNIT(dev); 562 zi = device_lookup_private(&zs_cd, unit >> 1); 563 cs = &zi->zi_cs[unit & 1]; 564 return(cs->cs_ttyp); 565 } 566 567 /* 568 * ZS hardware interrupt. Scan all ZS channels. NB: we know here that 569 * channels are kept in (A,B) pairs. 570 * 571 * Do just a little, then get out; set a software interrupt if more 572 * work is needed. 573 * 574 * We deliberately ignore the vectoring Zilog gives us, and match up 575 * only the number of `reset interrupt under service' operations, not 576 * the order. 577 */ 578 579 int 580 zshard(sr) 581 long sr; 582 { 583 register struct zs_chanstate *a; 584 #define b (a + 1) 585 register volatile struct zschan *zc; 586 register int rr3, intflags = 0, v, i; 587 588 do { 589 intflags &= ~4; 590 for(a = zslist; a != NULL; a = b->cs_next) { 591 rr3 = ZS_READ(a->cs_zc, 3); 592 if(rr3 & (ZSRR3_IP_A_RX|ZSRR3_IP_A_TX|ZSRR3_IP_A_STAT)) { 593 intflags |= 4|2; 594 zc = a->cs_zc; 595 i = a->cs_rbput; 596 if(rr3 & ZSRR3_IP_A_RX && (v = zsrint(a, zc)) != 0) { 597 a->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 598 intflags |= 1; 599 } 600 if(rr3 & ZSRR3_IP_A_TX && (v = zsxint(a, zc)) != 0) { 601 a->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 602 intflags |= 1; 603 } 604 if(rr3 & ZSRR3_IP_A_STAT && (v = zssint(a, zc)) != 0) { 605 a->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 606 intflags |= 1; 607 } 608 a->cs_rbput = i; 609 } 610 if(rr3 & (ZSRR3_IP_B_RX|ZSRR3_IP_B_TX|ZSRR3_IP_B_STAT)) { 611 intflags |= 4|2; 612 zc = b->cs_zc; 613 i = b->cs_rbput; 614 if(rr3 & ZSRR3_IP_B_RX && (v = zsrint(b, zc)) != 0) { 615 b->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 616 intflags |= 1; 617 } 618 if(rr3 & ZSRR3_IP_B_TX && (v = zsxint(b, zc)) != 0) { 619 b->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 620 intflags |= 1; 621 } 622 if(rr3 & ZSRR3_IP_B_STAT && (v = zssint(b, zc)) != 0) { 623 b->cs_rbuf[i++ & ZLRB_RING_MASK] = v; 624 intflags |= 1; 625 } 626 b->cs_rbput = i; 627 } 628 } 629 } while(intflags & 4); 630 #undef b 631 632 if(intflags & 1) { 633 if(BASEPRI(sr)) { 634 spl1(); 635 zsshortcuts++; 636 return(zssoft(sr)); 637 } 638 else if(!cb_scheduled) { 639 cb_scheduled++; 640 add_sicallback((si_farg)zssoft, 0, 0); 641 } 642 } 643 return(intflags & 2); 644 } 645 646 static int 647 zsrint(cs, zc) 648 register struct zs_chanstate *cs; 649 register volatile struct zschan *zc; 650 { 651 register int c; 652 653 /* 654 * First read the status, because read of the received char 655 * destroy the status of this char. 656 */ 657 c = ZS_READ(zc, 1); 658 c |= (zc->zc_data << 8); 659 660 /* clear receive error & interrupt condition */ 661 zc->zc_csr = ZSWR0_RESET_ERRORS; 662 zc->zc_csr = ZSWR0_CLR_INTR; 663 664 return(ZRING_MAKE(ZRING_RINT, c)); 665 } 666 667 static int 668 zsxint(cs, zc) 669 register struct zs_chanstate *cs; 670 register volatile struct zschan *zc; 671 { 672 register int i = cs->cs_tbc; 673 674 if(i == 0) { 675 zc->zc_csr = ZSWR0_RESET_TXINT; 676 zc->zc_csr = ZSWR0_CLR_INTR; 677 return(ZRING_MAKE(ZRING_XINT, 0)); 678 } 679 cs->cs_tbc = i - 1; 680 zc->zc_data = *cs->cs_tba++; 681 zc->zc_csr = ZSWR0_CLR_INTR; 682 return (0); 683 } 684 685 static int 686 zssint(cs, zc) 687 register struct zs_chanstate *cs; 688 register volatile struct zschan *zc; 689 { 690 register int rr0; 691 692 rr0 = zc->zc_csr; 693 zc->zc_csr = ZSWR0_RESET_STATUS; 694 zc->zc_csr = ZSWR0_CLR_INTR; 695 /* 696 * The chip's hardware flow control is, as noted in zsreg.h, 697 * busted---if the DCD line goes low the chip shuts off the 698 * receiver (!). If we want hardware CTS flow control but do 699 * not have it, and carrier is now on, turn HFC on; if we have 700 * HFC now but carrier has gone low, turn it off. 701 */ 702 if(rr0 & ZSRR0_DCD) { 703 if(cs->cs_ttyp->t_cflag & CCTS_OFLOW && 704 (cs->cs_creg[3] & ZSWR3_HFC) == 0) { 705 cs->cs_creg[3] |= ZSWR3_HFC; 706 ZS_WRITE(zc, 3, cs->cs_creg[3]); 707 } 708 } 709 else { 710 if (cs->cs_creg[3] & ZSWR3_HFC) { 711 cs->cs_creg[3] &= ~ZSWR3_HFC; 712 ZS_WRITE(zc, 3, cs->cs_creg[3]); 713 } 714 } 715 return(ZRING_MAKE(ZRING_SINT, rr0)); 716 } 717 718 /* 719 * Print out a ring or fifo overrun error message. 720 */ 721 static void 722 zsoverrun(unit, ptime, what) 723 int unit; 724 long *ptime; 725 const char *what; 726 { 727 time_t cur_sec = time_second; 728 729 if(*ptime != cur_sec) { 730 *ptime = cur_sec; 731 log(LOG_WARNING, "zs%d%c: %s overrun\n", unit >> 1, 732 (unit & 1) + 'a', what); 733 } 734 } 735 736 /* 737 * ZS software interrupt. Scan all channels for deferred interrupts. 738 */ 739 int 740 zssoft(sr) 741 long sr; 742 { 743 register struct zs_chanstate *cs; 744 register volatile struct zschan *zc; 745 register struct linesw *line; 746 register struct tty *tp; 747 register int get, n, c, cc, unit, s; 748 int retval = 0; 749 750 cb_scheduled = 0; 751 s = spltty(); 752 for(cs = zslist; cs != NULL; cs = cs->cs_next) { 753 get = cs->cs_rbget; 754 again: 755 n = cs->cs_rbput; /* atomic */ 756 if(get == n) /* nothing more on this line */ 757 continue; 758 retval = 1; 759 unit = cs->cs_unit; /* set up to handle interrupts */ 760 zc = cs->cs_zc; 761 tp = cs->cs_ttyp; 762 line = tp->t_linesw; 763 /* 764 * Compute the number of interrupts in the receive ring. 765 * If the count is overlarge, we lost some events, and 766 * must advance to the first valid one. It may get 767 * overwritten if more data are arriving, but this is 768 * too expensive to check and gains nothing (we already 769 * lost out; all we can do at this point is trade one 770 * kind of loss for another). 771 */ 772 n -= get; 773 if(n > ZLRB_RING_SIZE) { 774 zsoverrun(unit, &cs->cs_rotime, "ring"); 775 get += n - ZLRB_RING_SIZE; 776 n = ZLRB_RING_SIZE; 777 } 778 while(--n >= 0) { 779 /* race to keep ahead of incoming interrupts */ 780 c = cs->cs_rbuf[get++ & ZLRB_RING_MASK]; 781 switch (ZRING_TYPE(c)) { 782 783 case ZRING_RINT: 784 c = ZRING_VALUE(c); 785 if(c & ZSRR1_DO) 786 zsoverrun(unit, &cs->cs_fotime, "fifo"); 787 cc = c >> 8; 788 if(c & ZSRR1_FE) 789 cc |= TTY_FE; 790 if(c & ZSRR1_PE) 791 cc |= TTY_PE; 792 line->l_rint(cc, tp); 793 break; 794 795 case ZRING_XINT: 796 /* 797 * Transmit done: change registers and resume, 798 * or clear BUSY. 799 */ 800 if(cs->cs_heldchange) { 801 int sps; 802 803 sps = splzs(); 804 c = zc->zc_csr; 805 if((c & ZSRR0_DCD) == 0) 806 cs->cs_preg[3] &= ~ZSWR3_HFC; 807 bcopy((void *)cs->cs_preg, 808 (void *)cs->cs_creg, 16); 809 zs_loadchannelregs(zc, cs->cs_creg); 810 splx(sps); 811 cs->cs_heldchange = 0; 812 if(cs->cs_heldtbc 813 && (tp->t_state & TS_TTSTOP) == 0) { 814 cs->cs_tbc = cs->cs_heldtbc - 1; 815 zc->zc_data = *cs->cs_tba++; 816 goto again; 817 } 818 } 819 tp->t_state &= ~TS_BUSY; 820 if(tp->t_state & TS_FLUSH) 821 tp->t_state &= ~TS_FLUSH; 822 else ndflush(&tp->t_outq,cs->cs_tba 823 - tp->t_outq.c_cf); 824 line->l_start(tp); 825 break; 826 827 case ZRING_SINT: 828 /* 829 * Status line change. HFC bit is run in 830 * hardware interrupt, to avoid locking 831 * at splzs here. 832 */ 833 c = ZRING_VALUE(c); 834 if((c ^ cs->cs_rr0) & ZSRR0_DCD) { 835 cc = (c & ZSRR0_DCD) != 0; 836 if(line->l_modem(tp, cc) == 0) 837 zs_modem(cs, ZSWR5_RTS|ZSWR5_DTR, 838 cc ? DMBIS : DMBIC); 839 } 840 cs->cs_rr0 = c; 841 break; 842 843 default: 844 log(LOG_ERR, "zs%d%c: bad ZRING_TYPE (%x)\n", 845 unit >> 1, (unit & 1) + 'a', c); 846 break; 847 } 848 } 849 cs->cs_rbget = get; 850 goto again; 851 } 852 splx(s); 853 return (retval); 854 } 855 856 int 857 zsioctl(dev, cmd, data, flag, l) 858 dev_t dev; 859 u_long cmd; 860 void * data; 861 int flag; 862 struct lwp *l; 863 { 864 int unit = ZS_UNIT(dev); 865 struct zs_softc *zi = device_lookup_private(&zs_cd, unit >> 1); 866 register struct tty *tp = zi->zi_cs[unit & 1].cs_ttyp; 867 register int error, s; 868 register struct zs_chanstate *cs = &zi->zi_cs[unit & 1]; 869 870 error = tp->t_linesw->l_ioctl(tp, cmd, data, flag, l); 871 if(error != EPASSTHROUGH) 872 return(error); 873 874 error = ttioctl(tp, cmd, data, flag, l); 875 if(error !=EPASSTHROUGH) 876 return (error); 877 878 switch (cmd) { 879 case TIOCSBRK: 880 s = splzs(); 881 cs->cs_preg[5] |= ZSWR5_BREAK; 882 cs->cs_creg[5] |= ZSWR5_BREAK; 883 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 884 splx(s); 885 break; 886 case TIOCCBRK: 887 s = splzs(); 888 cs->cs_preg[5] &= ~ZSWR5_BREAK; 889 cs->cs_creg[5] &= ~ZSWR5_BREAK; 890 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 891 splx(s); 892 break; 893 case TIOCGFLAGS: { 894 int bits = 0; 895 896 if(cs->cs_softcar) 897 bits |= TIOCFLAG_SOFTCAR; 898 if(cs->cs_creg[15] & ZSWR15_DCD_IE) 899 bits |= TIOCFLAG_CLOCAL; 900 if(cs->cs_creg[3] & ZSWR3_HFC) 901 bits |= TIOCFLAG_CRTSCTS; 902 *(int *)data = bits; 903 break; 904 } 905 case TIOCSFLAGS: { 906 int userbits = 0; 907 908 error = kauth_authorize_device_tty(l->l_cred, 909 KAUTH_DEVICE_TTY_PRIVSET, tp); 910 if(error != 0) 911 return (EPERM); 912 913 userbits = *(int *)data; 914 915 /* 916 * can have `local' or `softcar', and `rtscts' or `mdmbuf' 917 # defaulting to software flow control. 918 */ 919 if(userbits & TIOCFLAG_SOFTCAR && userbits & TIOCFLAG_CLOCAL) 920 return(EINVAL); 921 if(userbits & TIOCFLAG_MDMBUF) /* don't support this (yet?) */ 922 return(ENODEV); 923 924 s = splzs(); 925 if((userbits & TIOCFLAG_SOFTCAR)) { 926 cs->cs_softcar = 1; /* turn on softcar */ 927 cs->cs_preg[15] &= ~ZSWR15_DCD_IE; /* turn off dcd */ 928 cs->cs_creg[15] &= ~ZSWR15_DCD_IE; 929 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 930 } 931 else if(userbits & TIOCFLAG_CLOCAL) { 932 cs->cs_softcar = 0; /* turn off softcar */ 933 cs->cs_preg[15] |= ZSWR15_DCD_IE; /* turn on dcd */ 934 cs->cs_creg[15] |= ZSWR15_DCD_IE; 935 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 936 tp->t_termios.c_cflag |= CLOCAL; 937 } 938 if(userbits & TIOCFLAG_CRTSCTS) { 939 cs->cs_preg[15] |= ZSWR15_CTS_IE; 940 cs->cs_creg[15] |= ZSWR15_CTS_IE; 941 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 942 cs->cs_preg[3] |= ZSWR3_HFC; 943 cs->cs_creg[3] |= ZSWR3_HFC; 944 ZS_WRITE(cs->cs_zc, 3, cs->cs_creg[3]); 945 tp->t_termios.c_cflag |= CRTSCTS; 946 } 947 else { 948 /* no mdmbuf, so we must want software flow control */ 949 cs->cs_preg[15] &= ~ZSWR15_CTS_IE; 950 cs->cs_creg[15] &= ~ZSWR15_CTS_IE; 951 ZS_WRITE(cs->cs_zc, 15, cs->cs_creg[15]); 952 cs->cs_preg[3] &= ~ZSWR3_HFC; 953 cs->cs_creg[3] &= ~ZSWR3_HFC; 954 ZS_WRITE(cs->cs_zc, 3, cs->cs_creg[3]); 955 tp->t_termios.c_cflag &= ~CRTSCTS; 956 } 957 splx(s); 958 break; 959 } 960 case TIOCSDTR: 961 zs_modem(cs, ZSWR5_DTR, DMBIS); 962 break; 963 case TIOCCDTR: 964 zs_modem(cs, ZSWR5_DTR, DMBIC); 965 break; 966 case TIOCMGET: 967 zs_modem(cs, 0, DMGET); 968 break; 969 case TIOCMSET: 970 case TIOCMBIS: 971 case TIOCMBIC: 972 default: 973 return (EPASSTHROUGH); 974 } 975 return (0); 976 } 977 978 /* 979 * Start or restart transmission. 980 */ 981 static void 982 zsstart(tp) 983 register struct tty *tp; 984 { 985 register struct zs_chanstate *cs; 986 register int s, nch; 987 int unit = ZS_UNIT(tp->t_dev); 988 struct zs_softc *zi = device_lookup_private(&zs_cd, unit >> 1); 989 990 cs = &zi->zi_cs[unit & 1]; 991 s = spltty(); 992 993 /* 994 * If currently active or delaying, no need to do anything. 995 */ 996 if(tp->t_state & (TS_TIMEOUT | TS_BUSY | TS_TTSTOP)) 997 goto out; 998 999 /* 1000 * If there are sleepers, and output has drained below low 1001 * water mark, awaken. 1002 */ 1003 ttypull(tp); 1004 1005 nch = ndqb(&tp->t_outq, 0); /* XXX */ 1006 if(nch) { 1007 register char *p = tp->t_outq.c_cf; 1008 1009 /* mark busy, enable tx done interrupts, & send first byte */ 1010 tp->t_state |= TS_BUSY; 1011 (void) splzs(); 1012 cs->cs_preg[1] |= ZSWR1_TIE; 1013 cs->cs_creg[1] |= ZSWR1_TIE; 1014 ZS_WRITE(cs->cs_zc, 1, cs->cs_creg[1]); 1015 cs->cs_zc->zc_data = *p; 1016 cs->cs_tba = p + 1; 1017 cs->cs_tbc = nch - 1; 1018 } else { 1019 /* 1020 * Nothing to send, turn off transmit done interrupts. 1021 * This is useful if something is doing polled output. 1022 */ 1023 (void) splzs(); 1024 cs->cs_preg[1] &= ~ZSWR1_TIE; 1025 cs->cs_creg[1] &= ~ZSWR1_TIE; 1026 ZS_WRITE(cs->cs_zc, 1, cs->cs_creg[1]); 1027 } 1028 out: 1029 splx(s); 1030 } 1031 1032 /* 1033 * Stop output, e.g., for ^S or output flush. 1034 */ 1035 void 1036 zsstop(tp, flag) 1037 register struct tty *tp; 1038 int flag; 1039 { 1040 register struct zs_chanstate *cs; 1041 register int s, unit = ZS_UNIT(tp->t_dev); 1042 struct zs_softc *zi = device_lookup_private(&zs_cd, unit >> 1); 1043 1044 cs = &zi->zi_cs[unit & 1]; 1045 s = splzs(); 1046 if(tp->t_state & TS_BUSY) { 1047 /* 1048 * Device is transmitting; must stop it. 1049 */ 1050 cs->cs_tbc = 0; 1051 if ((tp->t_state & TS_TTSTOP) == 0) 1052 tp->t_state |= TS_FLUSH; 1053 } 1054 splx(s); 1055 } 1056 1057 static void 1058 zs_shutdown(cs) 1059 struct zs_chanstate *cs; 1060 { 1061 struct tty *tp = cs->cs_ttyp; 1062 int s; 1063 1064 s = splzs(); 1065 1066 /* 1067 * Hang up if necessary. Wait a bit, so the other side has time to 1068 * notice even if we immediately open the port again. 1069 */ 1070 if(tp->t_cflag & HUPCL) { 1071 zs_modem(cs, 0, DMSET); 1072 (void)tsleep((void *)cs, TTIPRI, ttclos, hz); 1073 } 1074 1075 /* Clear any break condition set with TIOCSBRK. */ 1076 if(cs->cs_creg[5] & ZSWR5_BREAK) { 1077 cs->cs_preg[5] &= ~ZSWR5_BREAK; 1078 cs->cs_creg[5] &= ~ZSWR5_BREAK; 1079 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 1080 } 1081 1082 /* 1083 * Drop all lines and cancel interrupts 1084 */ 1085 zs_loadchannelregs(cs->cs_zc, zs_init_regs); 1086 splx(s); 1087 } 1088 1089 /* 1090 * Set ZS tty parameters from termios. 1091 * 1092 * This routine makes use of the fact that only registers 1093 * 1, 3, 4, 5, 9, 10, 11, 12, 13, 14, and 15 are written. 1094 */ 1095 static int 1096 zsparam(tp, t) 1097 register struct tty *tp; 1098 register struct termios *t; 1099 { 1100 int unit = ZS_UNIT(tp->t_dev); 1101 struct zs_softc *zi = device_lookup_private(&zs_cd, unit >> 1); 1102 register struct zs_chanstate *cs = &zi->zi_cs[unit & 1]; 1103 int cdiv = 0, /* XXX gcc4 -Wuninitialized */ 1104 clkm = 0, /* XXX gcc4 -Wuninitialized */ 1105 brgm = 0, /* XXX gcc4 -Wuninitialized */ 1106 tcon = 0; /* XXX gcc4 -Wuninitialized */ 1107 register int tmp, tmp5, cflag, s; 1108 1109 tmp = t->c_ospeed; 1110 tmp5 = t->c_ispeed; 1111 if(tmp < 0 || (tmp5 && tmp5 != tmp)) 1112 return(EINVAL); 1113 if(tmp == 0) { 1114 /* stty 0 => drop DTR and RTS */ 1115 zs_modem(cs, 0, DMSET); 1116 return(0); 1117 } 1118 tmp = zsbaudrate(unit, tmp, &cdiv, &clkm, &brgm, &tcon); 1119 if (tmp < 0) 1120 return(EINVAL); 1121 tp->t_ispeed = tp->t_ospeed = tmp; 1122 1123 cflag = tp->t_cflag = t->c_cflag; 1124 if (cflag & CSTOPB) 1125 cdiv |= ZSWR4_TWOSB; 1126 else 1127 cdiv |= ZSWR4_ONESB; 1128 if (!(cflag & PARODD)) 1129 cdiv |= ZSWR4_EVENP; 1130 if (cflag & PARENB) 1131 cdiv |= ZSWR4_PARENB; 1132 1133 switch(cflag & CSIZE) { 1134 case CS5: 1135 tmp = ZSWR3_RX_5; 1136 tmp5 = ZSWR5_TX_5; 1137 break; 1138 case CS6: 1139 tmp = ZSWR3_RX_6; 1140 tmp5 = ZSWR5_TX_6; 1141 break; 1142 case CS7: 1143 tmp = ZSWR3_RX_7; 1144 tmp5 = ZSWR5_TX_7; 1145 break; 1146 case CS8: 1147 default: 1148 tmp = ZSWR3_RX_8; 1149 tmp5 = ZSWR5_TX_8; 1150 break; 1151 } 1152 tmp |= ZSWR3_RX_ENABLE; 1153 tmp5 |= ZSWR5_TX_ENABLE | ZSWR5_DTR | ZSWR5_RTS; 1154 1155 /* 1156 * Block interrupts so that state will not 1157 * be altered until we are done setting it up. 1158 */ 1159 s = splzs(); 1160 cs->cs_preg[4] = cdiv; 1161 cs->cs_preg[11] = clkm; 1162 cs->cs_preg[12] = tcon; 1163 cs->cs_preg[13] = tcon >> 8; 1164 cs->cs_preg[14] = brgm; 1165 cs->cs_preg[1] = ZSWR1_RIE | ZSWR1_TIE | ZSWR1_SIE; 1166 cs->cs_preg[9] = ZSWR9_MASTER_IE | ZSWR9_VECTOR_INCL_STAT; 1167 cs->cs_preg[10] = ZSWR10_NRZ; 1168 cs->cs_preg[15] = ZSWR15_BREAK_IE | ZSWR15_DCD_IE; 1169 1170 /* 1171 * Output hardware flow control on the chip is horrendous: if 1172 * carrier detect drops, the receiver is disabled. Hence we 1173 * can only do this when the carrier is on. 1174 */ 1175 if(cflag & CCTS_OFLOW && cs->cs_zc->zc_csr & ZSRR0_DCD) 1176 tmp |= ZSWR3_HFC; 1177 cs->cs_preg[3] = tmp; 1178 cs->cs_preg[5] = tmp5; 1179 1180 /* 1181 * If nothing is being transmitted, set up new current values, 1182 * else mark them as pending. 1183 */ 1184 if(cs->cs_heldchange == 0) { 1185 if (cs->cs_ttyp->t_state & TS_BUSY) { 1186 cs->cs_heldtbc = cs->cs_tbc; 1187 cs->cs_tbc = 0; 1188 cs->cs_heldchange = 1; 1189 } else { 1190 bcopy((void *)cs->cs_preg, (void *)cs->cs_creg, 16); 1191 zs_loadchannelregs(cs->cs_zc, cs->cs_creg); 1192 } 1193 } 1194 splx(s); 1195 return (0); 1196 } 1197 1198 /* 1199 * search for the best matching baudrate 1200 */ 1201 static int 1202 zsbaudrate(unit, wanted, divisor, clockmode, brgenmode, timeconst) 1203 int unit, wanted, *divisor, *clockmode, *brgenmode, *timeconst; 1204 { 1205 int bestdiff, bestbps, source; 1206 1207 bestdiff = bestbps = 0; 1208 unit = (unit & 1) << 2; 1209 for (source = 0; source < 4; ++source) { 1210 long freq = zs_frequencies[unit + source]; 1211 int diff, bps, div, clkm, brgm, tcon; 1212 1213 bps = div = clkm = brgm = tcon = 0; 1214 switch (source) { 1215 case 0: /* BRgen, PCLK */ 1216 brgm = ZSWR14_BAUD_ENA|ZSWR14_BAUD_FROM_PCLK; 1217 break; 1218 case 1: /* BRgen, RTxC */ 1219 brgm = ZSWR14_BAUD_ENA; 1220 break; 1221 case 2: /* RTxC */ 1222 clkm = ZSWR11_RXCLK_RTXC|ZSWR11_TXCLK_RTXC; 1223 break; 1224 case 3: /* TRxC */ 1225 clkm = ZSWR11_RXCLK_TRXC|ZSWR11_TXCLK_TRXC; 1226 break; 1227 } 1228 switch (source) { 1229 case 0: 1230 case 1: 1231 div = ZSWR4_CLK_X16; 1232 clkm = ZSWR11_RXCLK_BAUD|ZSWR11_TXCLK_BAUD; 1233 tcon = BPS_TO_TCONST(freq, wanted); 1234 if (tcon < 0) 1235 tcon = 0; 1236 bps = TCONST_TO_BPS(freq, tcon); 1237 break; 1238 case 2: 1239 case 3: 1240 { int b1 = freq / 16, d1 = abs(b1 - wanted); 1241 int b2 = freq / 32, d2 = abs(b2 - wanted); 1242 int b3 = freq / 64, d3 = abs(b3 - wanted); 1243 1244 if (d1 < d2 && d1 < d3) { 1245 div = ZSWR4_CLK_X16; 1246 bps = b1; 1247 } else if (d2 < d3 && d2 < d1) { 1248 div = ZSWR4_CLK_X32; 1249 bps = b2; 1250 } else { 1251 div = ZSWR4_CLK_X64; 1252 bps = b3; 1253 } 1254 brgm = tcon = 0; 1255 break; 1256 } 1257 } 1258 diff = abs(bps - wanted); 1259 if (!source || diff < bestdiff) { 1260 *divisor = div; 1261 *clockmode = clkm; 1262 *brgenmode = brgm; 1263 *timeconst = tcon; 1264 bestbps = bps; 1265 bestdiff = diff; 1266 if (diff == 0) 1267 break; 1268 } 1269 } 1270 /* Allow deviations upto 5% */ 1271 if (20 * bestdiff > wanted) 1272 return -1; 1273 return bestbps; 1274 } 1275 1276 /* 1277 * Raise or lower modem control (DTR/RTS) signals. If a character is 1278 * in transmission, the change is deferred. 1279 */ 1280 static int 1281 zs_modem(cs, bits, how) 1282 struct zs_chanstate *cs; 1283 int bits, how; 1284 { 1285 int s, mbits; 1286 1287 bits &= ZSWR5_DTR | ZSWR5_RTS; 1288 1289 s = splzs(); 1290 mbits = cs->cs_preg[5] & (ZSWR5_DTR | ZSWR5_RTS); 1291 1292 switch(how) { 1293 case DMSET: 1294 mbits = bits; 1295 break; 1296 case DMBIS: 1297 mbits |= bits; 1298 break; 1299 case DMBIC: 1300 mbits &= ~bits; 1301 break; 1302 case DMGET: 1303 splx(s); 1304 return(mbits); 1305 } 1306 1307 cs->cs_preg[5] = (cs->cs_preg[5] & ~(ZSWR5_DTR | ZSWR5_RTS)) | mbits; 1308 if(cs->cs_heldchange == 0) { 1309 if(cs->cs_ttyp->t_state & TS_BUSY) { 1310 cs->cs_heldtbc = cs->cs_tbc; 1311 cs->cs_tbc = 0; 1312 cs->cs_heldchange = 1; 1313 } 1314 else { 1315 ZS_WRITE(cs->cs_zc, 5, cs->cs_creg[5]); 1316 } 1317 } 1318 splx(s); 1319 return(0); 1320 } 1321 1322 /* 1323 * Write the given register set to the given zs channel in the proper order. 1324 * The channel must not be transmitting at the time. The receiver will 1325 * be disabled for the time it takes to write all the registers. 1326 */ 1327 static void 1328 zs_loadchannelregs(zc, reg) 1329 volatile struct zschan *zc; 1330 u_char *reg; 1331 { 1332 int i; 1333 1334 zc->zc_csr = ZSM_RESET_ERR; /* reset error condition */ 1335 i = zc->zc_data; /* drain fifo */ 1336 i = zc->zc_data; 1337 i = zc->zc_data; 1338 ZS_WRITE(zc, 4, reg[4]); 1339 ZS_WRITE(zc, 10, reg[10]); 1340 ZS_WRITE(zc, 3, reg[3] & ~ZSWR3_RX_ENABLE); 1341 ZS_WRITE(zc, 5, reg[5] & ~ZSWR5_TX_ENABLE); 1342 ZS_WRITE(zc, 1, reg[1]); 1343 ZS_WRITE(zc, 9, reg[9]); 1344 ZS_WRITE(zc, 11, reg[11]); 1345 ZS_WRITE(zc, 12, reg[12]); 1346 ZS_WRITE(zc, 13, reg[13]); 1347 ZS_WRITE(zc, 14, reg[14]); 1348 ZS_WRITE(zc, 15, reg[15]); 1349 ZS_WRITE(zc, 3, reg[3]); 1350 ZS_WRITE(zc, 5, reg[5]); 1351 } 1352 #endif /* NZS > 1 */ 1353
Indexes created Wed Oct 01 15:09:59 GMT 2025