pte.h revision 1.5.2.1
1 /* $NetBSD: pte.h,v 1.5.2.1 2004/08/03 10:33:26 skrll Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1986, 1990 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * the Systems Programming Group of the University of Utah Computer 9 * Science Department. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: Utah $Hdr: pte.h 1.11 89/09/03$ 36 * 37 * @(#)pte.h 7.3 (Berkeley) 5/8/91 38 */ 39 /* 40 * Copyright (c) 1988 University of Utah. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * the Systems Programming Group of the University of Utah Computer 44 * Science Department. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by the University of 57 * California, Berkeley and its contributors. 58 * 4. Neither the name of the University nor the names of its contributors 59 * may be used to endorse or promote products derived from this software 60 * without specific prior written permission. 61 * 62 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * SUCH DAMAGE. 73 * 74 * from: Utah $Hdr: pte.h 1.11 89/09/03$ 75 * 76 * @(#)pte.h 7.3 (Berkeley) 5/8/91 77 */ 78 79 #ifndef _MACHINE_PTE_H_ 80 #define _MACHINE_PTE_H_ 81 82 /* 83 * ATARI hardware segment/page table entries 84 */ 85 86 struct pte { 87 u_int pte; 88 }; 89 90 typedef u_int pt_entry_t; 91 92 struct ste { 93 u_int ste; 94 }; 95 96 typedef u_int st_entry_t; 97 98 #define PT_ENTRY_NULL ((pt_entry_t *) 0) 99 #define ST_ENTRY_NULL ((st_entry_t *) 0) 100 101 #define SG_V 0x00000002 /* segment is valid */ 102 #define SG_NV 0x00000000 103 #define SG_PROT 0x00000004 /* access protection mask */ 104 #define SG_RO 0x00000004 105 #define SG_RW 0x00000000 106 #define SG_U 0x00000008 /* modified bit (68040) */ 107 #define SG_FRAME 0xffffe000 108 #define SG_IMASK 0xff000000 109 #define SG_ISHIFT 24 110 #define SG_PMASK 0x00ffe000 111 #define SG_PSHIFT 13 112 113 /* 68040 additions */ 114 #define SG4_MASK1 0xfe000000 /* pointer table 1 index mask */ 115 #define SG4_SHIFT1 25 116 #define SG4_MASK2 0x01fc0000 /* pointer table 2 index mask */ 117 #define SG4_SHIFT2 18 118 #define SG4_MASK3 0x0003e000 /* page table index mask */ 119 #define SG4_SHIFT3 13 120 #define SG4_ADDR1 0xfffffe00 /* pointer table address mask */ 121 #define SG4_ADDR2 0xffffff80 /* page table address mask */ 122 #define SG4_LEV1SIZE 128 /* entries in pointer table 1 */ 123 #define SG4_LEV2SIZE 128 /* entries in pointer table 2 */ 124 #define SG4_LEV3SIZE 32 /* entries in page table */ 125 126 #define PG_V 0x00000001 127 #define PG_NV 0x00000000 128 #define PG_PROT 0x00000004 129 #define PG_U 0x00000008 130 #define PG_M 0x00000010 131 /* 132 * XXX The Milan uses the U0 pin to switch the pci-bridge between little & big 133 * endian mode. That's why I moved the 'wired' flag to U1 leo 10Apr/2001. 134 */ 135 #if 0 136 #define PG_W 0x00000100 137 #else 138 #define PG_W 0x00000200 139 #endif 140 #define PG_RO 0x00000004 141 #define PG_RW 0x00000000 142 #define PG_FRAME 0xffffe000 143 #define PG_CI 0x00000040 144 #define PG_SHIFT 13 145 #define PG_PFNUM(x) (((x) & PG_FRAME) >> PG_SHIFT) 146 147 /* 68040 additions */ 148 #define PG_CMASK 0x00000060 /* cache mode mask */ 149 #define PG_CWT 0x00000000 /* writethrough caching */ 150 #define PG_CCB 0x00000020 /* copyback caching */ 151 #define PG_CIS 0x00000040 /* cache inhibited serialized */ 152 #define PG_CIN 0x00000060 /* cache inhibited nonserialized */ 153 #define PG_SO 0x00000080 /* supervisor only */ 154 155 #define ATARI_STSIZE (MAXUL2SIZE*SG4_LEV2SIZE*sizeof(st_entry_t)) 156 157 /* 158 * ATARI_MAX_COREUPT maximum number of incore user page tables 159 * ATARI_USER_PTSIZE the number of bytes for user pagetables 160 * ATARI_PTBASE the VA start of the map from which upt's are allocated 161 * ATARI_PTSIZE the size of the map from which upt's are allocated 162 * ATARI_KPTSIZE size of kernel page table 163 * ATARI_MAX_KPTSIZE the most number of bytes for kpt pages 164 * ATARI_MAX_PTSIZE the number of bytes to map everything 165 */ 166 #define ATARI_MAX_COREUPT 1024 167 #define ATARI_UPTSIZE roundup(VM_MAXUSER_ADDRESS / NPTEPG, PAGE_SIZE) 168 #define ATARI_UPTBASE 0x10000000 169 #define ATARI_UPTMAXSIZE \ 170 roundup((ATARI_MAX_COREUPT * ATARI_UPTSIZE), PAGE_SIZE) 171 #define ATARI_MAX_KPTSIZE \ 172 (ATARI_MAX_COREUPT * ATARI_UPTSIZE / NPTEPG) 173 #define ATARI_KPTSIZE \ 174 roundup((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / NPTEPG, PAGE_SIZE) 175 #define ATARI_MAX_PTSIZE roundup(0xffffffff / NPTEPG, PAGE_SIZE) 176 177 /* 178 * Kernel virtual address to page table entry and to physical address. 179 */ 180 #define kvtopte(va) \ 181 (&Sysmap[((unsigned)(va) - VM_MIN_KERNEL_ADDRESS) >> PGSHIFT]) 182 #define ptetokv(pt) \ 183 ((((u_int *)(pt) - Sysmap) << PGSHIFT) + VM_MIN_KERNEL_ADDRESS) 184 #define kvtophys(va) \ 185 ((kvtopte(va)->pg_pfnum << PGSHIFT) | ((int)(va) & PGOFSET)) 186 187 188 #endif /* !_MACHINE_PTE_H_ */ 189
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