fdcisa.c revision 1.2
1 /* $NetBSD: fdcisa.c,v 1.2 2002/01/07 21:47:00 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /*- 40 * Copyright (c) 1990 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * This code is derived from software contributed to Berkeley by 44 * Don Ahn. 45 * 46 * Redistribution and use in source and binary forms, with or without 47 * modification, are permitted provided that the following conditions 48 * are met: 49 * 1. Redistributions of source code must retain the above copyright 50 * notice, this list of conditions and the following disclaimer. 51 * 2. Redistributions in binary form must reproduce the above copyright 52 * notice, this list of conditions and the following disclaimer in the 53 * documentation and/or other materials provided with the distribution. 54 * 3. All advertising materials mentioning features or use of this software 55 * must display the following acknowledgement: 56 * This product includes software developed by the University of 57 * California, Berkeley and its contributors. 58 * 4. Neither the name of the University nor the names of its contributors 59 * may be used to endorse or promote products derived from this software 60 * without specific prior written permission. 61 * 62 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 63 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 64 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 65 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 66 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 67 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 68 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 69 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 70 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 71 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 72 * SUCH DAMAGE. 73 * 74 * @(#)fd.c 7.4 (Berkeley) 5/25/91 75 */ 76 #include <sys/param.h> 77 #include <sys/systm.h> 78 #include <sys/callout.h> 79 #include <sys/device.h> 80 81 #include <machine/bus.h> 82 83 #include <dev/isa/isavar.h> 84 #include <dev/isa/isadmavar.h> 85 #include <dev/isa/fdreg.h> 86 #include <dev/isa/fdcvar.h> 87 88 #include <atari/atari/device.h> 89 90 91 /* controller driver configuration */ 92 int fdc_isa_probe __P((struct device *, struct cfdata *, void *)); 93 void fdc_isa_attach __P((struct device *, struct device *, void *)); 94 95 struct fdc_isa_softc { 96 struct fdc_softc sc_fdc; /* base fdc device */ 97 bus_space_handle_t sc_baseioh; /* base I/O handle */ 98 }; 99 100 struct cfattach fdcisa_ca = { 101 sizeof(struct fdc_isa_softc), fdc_isa_probe, fdc_isa_attach 102 }; 103 104 int 105 fdc_isa_probe(parent, cfp, aux) 106 struct device *parent; 107 struct cfdata *cfp; 108 void *aux; 109 { 110 struct isa_attach_args *ia = aux; 111 static int fdc_matched = 0; 112 bus_space_tag_t iot; 113 bus_space_handle_t ioh, ctl_ioh, base_ioh; 114 int iobase; 115 116 if (!atari_realconfig) 117 return 0; 118 119 /* Match only once */ 120 if (fdc_matched) 121 return 0; 122 123 iot = ia->ia_iot; 124 125 if (ia->ia_nio < 1) 126 return (0); 127 if (ia->ia_nirq < 1) 128 return (0); 129 if (ia->ia_ndrq < 1) 130 return (0); 131 132 if (ISA_DIRECT_CONFIG(ia)) 133 return (0); 134 135 /* Disallow wildcarded I/O addresses. */ 136 if (ia->ia_io[0].ir_addr == ISACF_PORT_DEFAULT) 137 return (0); 138 139 /* Don't allow wildcarded IRQ/DRQ. */ 140 if (ia->ia_irq[0].ir_irq == ISACF_IRQ_DEFAULT) 141 return (0); 142 143 if (ia->ia_drq[0].ir_drq == ISACF_DRQ_DEFAULT) 144 return (0); 145 146 /* Map the i/o space. */ 147 iobase = ia->ia_io[0].ir_addr; 148 if (bus_space_map(iot, iobase, 6 /* FDC_NPORT */, 0, &base_ioh)) { 149 printf("fdcisaprobe: cannot map io-area\n"); 150 return 0; 151 } 152 if (bus_space_subregion(iot, base_ioh, 2, 4, &ioh)) { 153 bus_space_unmap(iot, base_ioh, 6); 154 return (0); 155 } 156 157 if (bus_space_map(iot, iobase + fdctl + 2, 1, 0, &ctl_ioh)) { 158 bus_space_unmap(iot, base_ioh, 6); 159 return (0); 160 } 161 162 /* Not needed for the rest of the probe. */ 163 bus_space_unmap(iot, ctl_ioh, 1); 164 165 /* reset */ 166 bus_space_write_1(iot, ioh, fdout, 0); 167 delay(100); 168 bus_space_write_1(iot, ioh, fdout, FDO_FRST); 169 170 /* see if it can handle a command */ 171 if (out_fdc(iot, ioh, NE7CMD_SPECIFY) < 0) 172 goto out; 173 out_fdc(iot, ioh, 0xdf); 174 out_fdc(iot, ioh, 2); 175 176 fdc_matched = 1; 177 ia->ia_nio = 1; 178 ia->ia_io[0].ir_size = FDC_NPORT; 179 180 ia->ia_nirq = 1; 181 ia->ia_ndrq = 1; 182 183 ia->ia_niomem = 0; 184 185 out: 186 bus_space_unmap(iot, base_ioh, 6 /* FDC_NPORT */); 187 188 return fdc_matched; 189 } 190 191 void 192 fdc_isa_attach(parent, self, aux) 193 struct device *parent, *self; 194 void *aux; 195 { 196 struct fdc_softc *fdc = (void *)self; 197 struct fdc_isa_softc *isc = (void *)self; 198 struct isa_attach_args *ia = aux; 199 printf("\n"); 200 201 fdc->sc_iot = ia->ia_iot; 202 fdc->sc_ic = ia->ia_ic; 203 fdc->sc_drq = ia->ia_drq[0].ir_drq; 204 205 if (bus_space_map(fdc->sc_iot, ia->ia_io[0].ir_addr, 206 6 /* FDC_NPORT */, 0, &isc->sc_baseioh)) { 207 printf("%s: unable to map I/O space\n", fdc->sc_dev.dv_xname); 208 return; 209 } 210 211 if (bus_space_subregion(fdc->sc_iot, isc->sc_baseioh, 2, 4, 212 &fdc->sc_ioh)) { 213 printf("%s: unable to subregion I/O space\n", 214 fdc->sc_dev.dv_xname); 215 return; 216 } 217 218 if (bus_space_map(fdc->sc_iot, ia->ia_io[0].ir_addr + fdctl + 2, 1, 0, 219 &fdc->sc_fdctlioh)) { 220 printf("%s: unable to map CTL I/O space\n", 221 fdc->sc_dev.dv_xname); 222 return; 223 } 224 225 fdc->sc_ih = isa_intr_establish(ia->ia_ic, ia->ia_irq[0].ir_irq, 226 IST_EDGE, IPL_BIO, fdcintr, fdc); 227 228 fdcattach(fdc); 229 } 230
Indexes created Fri Sep 26 20:09:58 GMT 2025