isa_milan.c revision 1.1
1 /* $NetBSD: isa_milan.c,v 1.1 2001/04/24 06:39:48 leo Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Leo Weppelman. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/types.h> 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/device.h> 43 44 #include <dev/isa/isavar.h> 45 #include <dev/isa/isareg.h> 46 47 #include <machine/iomap.h> 48 49 void isa_bus_init(void); 50 #if 0 51 static void init_icu(void); 52 #endif 53 static void set_icus(void); 54 static void calc_imask(void); 55 56 /* 57 * Bitmask of currently enabled isa interrupts. Used by set_icus(). 58 */ 59 static u_int16_t imask_enable = 0xffff; 60 61 #define IRQ_SLAVE 2 62 63 /* 64 * Interrupt routing table 65 */ 66 #define MILAN_MAX_ISA_INTS 16 67 68 static isa_intr_info_t milan_isa_iinfo[MILAN_MAX_ISA_INTS]; 69 70 void 71 isa_bus_init() 72 { 73 #if 0 74 init_icu(); 75 #endif 76 set_icus(); 77 } 78 79 #if 0 80 static void 81 init_icu() 82 { 83 #define ICU_OFFSET 0 84 85 u_int8_t *icu; 86 87 icu = (u_int8_t*)(AD_8259_MASTER); 88 89 icu[0] = 0x11; /* reset; program device, four bytes */ 90 icu[1] = ICU_OFFSET; /* starting at this vector index */ 91 icu[1] = (1 << IRQ_SLAVE); /* slave on line 2 */ 92 icu[1] = 1; /* 8086 mode */ 93 icu[1] = 0xff; /* leave interrupts masked */ 94 95 icu = (u_int8_t*)(AD_8259_SLAVE); 96 97 icu[0] = 0x11; /* reset; program device, four bytes */ 98 icu[1] = ICU_OFFSET + 8; /* starting at this vector index */ 99 icu[1] = IRQ_SLAVE; /* slave on line 2 */ 100 icu[1] = 1; /* 8086 mode */ 101 icu[1] = 0xff; /* leave interrupts masked */ 102 } 103 #endif 104 105 static void 106 set_icus() 107 { 108 u_int8_t *icu; 109 110 icu = (u_int8_t*)AD_8259_MASTER; 111 icu[1] = imask_enable & 0xff; 112 icu = (u_int8_t*)AD_8259_SLAVE; 113 icu[1] = (imask_enable >> 8) & 0xff; 114 } 115 116 static void 117 calc_imask() 118 { 119 int irq; 120 u_int16_t nmask = 0; 121 122 for (irq = 0; irq < MILAN_MAX_ISA_INTS; irq++) { 123 if (milan_isa_iinfo[irq].ifunc != NULL) 124 nmask |= 1 << irq; 125 if (nmask >= 0x100) 126 nmask |= 1 << IRQ_SLAVE; 127 } 128 imask_enable = ~nmask; 129 set_icus(); 130 } 131 132 133 void milan_isa_intr(int); 134 void 135 milan_isa_intr(vector) 136 int vector; 137 { 138 isa_intr_info_t *iinfo_p; 139 140 if(vector != 6) 141 printf("milan_isa_intr: vector: %d\n", vector); 142 if (vector >= MILAN_MAX_ISA_INTS) { 143 printf("milan_isa_intr: Bogus vector %d\n", vector); 144 return; 145 } 146 /* DEBUGGING LWP */ 147 if (vector == 1) { /* Keyboard */ 148 printf("kbd scancode: 0x%x, 0x%x, 0x%x, 0x%x\n", 149 *((u_char *)(pci_io_addr + 0x60)), 150 *((u_char *)(pci_io_addr + 0x61)), 151 *((u_char *)(pci_io_addr + 0x62)), 152 *((u_char *)(pci_io_addr + 0x63))); 153 } 154 155 /* Acknowledge interrupt XXX 0x20 == EOI */ 156 if (vector > 7) 157 *((u_char *)AD_8259_SLAVE) = 0x20; 158 *((u_char *)AD_8259_MASTER) = 0x20; 159 160 iinfo_p = &milan_isa_iinfo[vector]; 161 if (iinfo_p->ifunc == NULL) 162 printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n", 163 vector, imask_enable); 164 else (void) (iinfo_p->ifunc)(iinfo_p->iarg); 165 } 166 167 168 /* 169 * Try to allocate a free interrupt... On the Milan, we have available: 170 * 5, 9, 10, 11, 13. Or in a bitmask: 0x1720. 171 */ 172 #define MILAN_AVAIL_ISA_INTS 0x1720 173 174 int 175 isa_intr_alloc(ic, mask, type, irq) 176 isa_chipset_tag_t ic; 177 int mask; 178 int type; 179 int *irq; 180 { 181 int i; 182 183 /* 184 * The Hades only supports edge triggered interrupts! 185 * XXX: Find out about the Milan.... 186 */ 187 if (type != IST_EDGE) 188 return 1; 189 190 /* 191 * Say no to impossible questions... 192 */ 193 if (!(mask &= MILAN_AVAIL_ISA_INTS)) 194 return 1; 195 196 for (i = 0; i < MILAN_MAX_ISA_INTS; i++) { 197 if (mask & (1<<i)) { 198 if (milan_isa_iinfo[i].ifunc == NULL) { 199 *irq = i; 200 return 0; 201 } 202 } 203 } 204 return (1); 205 } 206 207 void * 208 isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg) 209 isa_chipset_tag_t ic; 210 int irq, type, level; 211 int (*ih_fun) __P((void *)); 212 void *ih_arg; 213 { 214 isa_intr_info_t *iinfo_p; 215 216 /* 217 * The Hades only supports edge triggered interrupts! 218 * XXX: Find out oubout the Milan... 219 */ 220 if (type != IST_EDGE) 221 return NULL; 222 223 iinfo_p = &milan_isa_iinfo[irq]; 224 225 if (iinfo_p->ifunc != NULL) { 226 printf("isa_intr_establish: interrupt %d was already " 227 "established\n", irq); 228 return NULL; 229 } 230 231 iinfo_p->slot = 0; /* Unused on Milan */ 232 iinfo_p->ihand = NULL; /* Unused on Milan */ 233 iinfo_p->ipl = level; 234 iinfo_p->ifunc = ih_fun; 235 iinfo_p->iarg = ih_arg; 236 printf("Irq %d established\n", irq); 237 238 calc_imask(); 239 return(iinfo_p); 240 } 241 242 void 243 isa_intr_disestablish(ic, handler) 244 isa_chipset_tag_t ic; 245 void *handler; 246 { 247 isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler; 248 249 if (iinfo_p->ifunc == NULL) 250 panic("isa_intr_disestablish: interrupt was not established\n"); 251 252 iinfo_p->ifunc = NULL; 253 calc_imask(); 254 } 255
Indexes created Fri Oct 03 15:10:06 GMT 2025