isa_milan.c revision 1.2 1 /* $NetBSD: isa_milan.c,v 1.2 2001/05/16 08:45:50 leo Exp $ */
2
3 /*-
4 * Copyright (c) 2001 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Leo Weppelman.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/device.h>
43
44 #include <dev/isa/isavar.h>
45 #include <dev/isa/isareg.h>
46
47 #include <machine/iomap.h>
48
49 void isa_bus_init(void);
50 #if 0
51 static void init_icu(void);
52 #endif
53 static void set_icus(void);
54 static void calc_imask(void);
55
56 /*
57 * Bitmask of currently enabled isa interrupts. Used by set_icus().
58 */
59 static u_int16_t imask_enable = 0xffff;
60
61 #define IRQ_SLAVE 2
62
63 /*
64 * Interrupt routing table
65 */
66 #define MILAN_MAX_ISA_INTS 16
67
68 static isa_intr_info_t milan_isa_iinfo[MILAN_MAX_ISA_INTS];
69
70 void
71 isa_bus_init()
72 {
73 #if 0
74 init_icu();
75 #endif
76 set_icus();
77 }
78
79 #if 0
80 /*
81 * XXX: For some reason, this does not work at all... (Leo).
82 */
83 static void
84 init_icu()
85 {
86 #define ICU_OFFSET 0
87
88 u_int8_t *icu;
89
90 icu = (u_int8_t*)(AD_8259_MASTER);
91
92 icu[0] = 0x11; /* reset; program device, four bytes */
93 icu[1] = ICU_OFFSET; /* starting at this vector index */
94 icu[1] = (1 << IRQ_SLAVE); /* slave on line 2 */
95 icu[1] = 1; /* 8086 mode */
96 icu[1] = 0xff; /* leave interrupts masked */
97
98 icu = (u_int8_t*)(AD_8259_SLAVE);
99
100 icu[0] = 0x11; /* reset; program device, four bytes */
101 icu[1] = ICU_OFFSET + 8; /* starting at this vector index */
102 icu[1] = IRQ_SLAVE; /* slave on line 2 */
103 icu[1] = 1; /* 8086 mode */
104 icu[1] = 0xff; /* leave interrupts masked */
105 }
106 #endif
107
108 static void
109 set_icus()
110 {
111 u_int8_t *icu;
112
113 icu = (u_int8_t*)AD_8259_MASTER;
114 icu[1] = imask_enable & 0xff;
115 icu = (u_int8_t*)AD_8259_SLAVE;
116 icu[1] = (imask_enable >> 8) & 0xff;
117 }
118
119 static void
120 calc_imask()
121 {
122 int irq;
123 u_int16_t nmask = 0;
124
125 for (irq = 0; irq < MILAN_MAX_ISA_INTS; irq++) {
126 if (milan_isa_iinfo[irq].ifunc != NULL)
127 nmask |= 1 << irq;
128 if (nmask >= 0x100)
129 nmask |= 1 << IRQ_SLAVE;
130 }
131 imask_enable = ~nmask;
132 set_icus();
133 }
134
135
136 void milan_isa_intr(int);
137 void
138 milan_isa_intr(vector)
139 int vector;
140 {
141 isa_intr_info_t *iinfo_p;
142
143 if (vector >= MILAN_MAX_ISA_INTS) {
144 printf("milan_isa_intr: Bogus vector %d\n", vector);
145 return;
146 }
147
148 /* Acknowledge interrupt XXX 0x20 == EOI */
149 if (vector > 7)
150 *((u_char *)AD_8259_SLAVE) = 0x20;
151 *((u_char *)AD_8259_MASTER) = 0x20;
152
153 iinfo_p = &milan_isa_iinfo[vector];
154 if (iinfo_p->ifunc == NULL)
155 printf("milan_isa_intr: Stray interrupt: %d (mask:%04x)\n",
156 vector, imask_enable);
157 else (void) (iinfo_p->ifunc)(iinfo_p->iarg);
158 }
159
160
161 /*
162 * Try to allocate a free interrupt... On the Milan, we have available:
163 * 5, 9, 10, 11, 13. Or in a bitmask: 0x1720.
164 */
165 #define MILAN_AVAIL_ISA_INTS 0x1720
166
167 int
168 isa_intr_alloc(ic, mask, type, irq)
169 isa_chipset_tag_t ic;
170 int mask;
171 int type;
172 int *irq;
173 {
174 int i;
175
176 /*
177 * The Hades only supports edge triggered interrupts!
178 * XXX: Find out about the Milan....
179 */
180 if (type != IST_EDGE)
181 return 1;
182
183 /*
184 * Say no to impossible questions...
185 */
186 if (!(mask &= MILAN_AVAIL_ISA_INTS))
187 return 1;
188
189 for (i = 0; i < MILAN_MAX_ISA_INTS; i++) {
190 if (mask & (1<<i)) {
191 if (milan_isa_iinfo[i].ifunc == NULL) {
192 *irq = i;
193 return 0;
194 }
195 }
196 }
197 return (1);
198 }
199
200 void *
201 isa_intr_establish(ic, irq, type, level, ih_fun, ih_arg)
202 isa_chipset_tag_t ic;
203 int irq, type, level;
204 int (*ih_fun) __P((void *));
205 void *ih_arg;
206 {
207 isa_intr_info_t *iinfo_p;
208
209 /*
210 * The Hades only supports edge triggered interrupts!
211 * XXX: Find out oubout the Milan...
212 */
213 if (type != IST_EDGE)
214 return NULL;
215
216 iinfo_p = &milan_isa_iinfo[irq];
217
218 if (iinfo_p->ifunc != NULL) {
219 printf("isa_intr_establish: interrupt %d was already "
220 "established\n", irq);
221 return NULL;
222 }
223
224 iinfo_p->slot = 0; /* Unused on Milan */
225 iinfo_p->ihand = NULL; /* Unused on Milan */
226 iinfo_p->ipl = level;
227 iinfo_p->ifunc = ih_fun;
228 iinfo_p->iarg = ih_arg;
229
230 calc_imask();
231 return(iinfo_p);
232 }
233
234 void
235 isa_intr_disestablish(ic, handler)
236 isa_chipset_tag_t ic;
237 void *handler;
238 {
239 isa_intr_info_t *iinfo_p = (isa_intr_info_t *)handler;
240
241 if (iinfo_p->ifunc == NULL)
242 panic("isa_intr_disestablish: interrupt was not established\n");
243
244 iinfo_p->ifunc = NULL;
245 calc_imask();
246 }
247