pci_hades.c revision 1.4 1 1.4 thorpej /* $NetBSD: pci_hades.c,v 1.4 2003/04/01 23:47:03 thorpej Exp $ */
2 1.1 leo
3 1.1 leo /*
4 1.1 leo * Copyright (c) 1996 Leo Weppelman. All rights reserved.
5 1.1 leo * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
6 1.1 leo * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 1.1 leo *
8 1.1 leo * Redistribution and use in source and binary forms, with or without
9 1.1 leo * modification, are permitted provided that the following conditions
10 1.1 leo * are met:
11 1.1 leo * 1. Redistributions of source code must retain the above copyright
12 1.1 leo * notice, this list of conditions and the following disclaimer.
13 1.1 leo * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 leo * notice, this list of conditions and the following disclaimer in the
15 1.1 leo * documentation and/or other materials provided with the distribution.
16 1.1 leo * 3. All advertising materials mentioning features or use of this software
17 1.1 leo * must display the following acknowledgement:
18 1.1 leo * This product includes software developed by Charles M. Hannum.
19 1.1 leo * 4. The name of the author may not be used to endorse or promote products
20 1.1 leo * derived from this software without specific prior written permission.
21 1.1 leo *
22 1.1 leo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 1.1 leo * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 1.1 leo * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 1.1 leo * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 1.1 leo * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 1.1 leo * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 1.1 leo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 1.1 leo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 1.1 leo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 1.1 leo * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 1.1 leo */
33 1.1 leo
34 1.1 leo #include <sys/types.h>
35 1.1 leo #include <sys/param.h>
36 1.1 leo #include <sys/systm.h>
37 1.1 leo #include <sys/device.h>
38 1.1 leo
39 1.4 thorpej #include <uvm/uvm_extern.h>
40 1.4 thorpej
41 1.1 leo #include <machine/bus.h>
42 1.1 leo
43 1.1 leo #include <dev/pci/pcivar.h>
44 1.1 leo #include <dev/pci/pcireg.h>
45 1.1 leo
46 1.1 leo #include <machine/cpu.h>
47 1.1 leo #include <machine/iomap.h>
48 1.1 leo #include <machine/mfp.h>
49 1.1 leo #include <machine/bswap.h>
50 1.1 leo
51 1.1 leo #include <atari/atari/device.h>
52 1.1 leo #include <atari/pci/pci_vga.h>
53 1.2 leo #include <atari/dev/grf_etreg.h>
54 1.1 leo
55 1.1 leo int
56 1.1 leo pci_bus_maxdevs(pc, busno)
57 1.1 leo pci_chipset_tag_t pc;
58 1.1 leo int busno;
59 1.1 leo {
60 1.1 leo return (4);
61 1.1 leo }
62 1.1 leo
63 1.1 leo static int pci_config_offset __P((pcitag_t));
64 1.1 leo
65 1.1 leo /*
66 1.4 thorpej * Atari_init.c maps the config areas PAGE_SIZE bytes apart....
67 1.1 leo */
68 1.1 leo static int pci_config_offset(tag)
69 1.1 leo pcitag_t tag;
70 1.1 leo {
71 1.1 leo int device;
72 1.1 leo
73 1.1 leo device = (tag >> 11) & 0x1f;
74 1.4 thorpej return(device * PAGE_SIZE);
75 1.1 leo }
76 1.1 leo
77 1.1 leo pcireg_t
78 1.1 leo pci_conf_read(pc, tag, reg)
79 1.1 leo pci_chipset_tag_t pc;
80 1.1 leo pcitag_t tag;
81 1.1 leo int reg;
82 1.1 leo {
83 1.1 leo u_long data;
84 1.1 leo
85 1.1 leo data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
86 1.1 leo return (bswap32(data));
87 1.1 leo }
88 1.1 leo
89 1.1 leo void
90 1.1 leo pci_conf_write(pc, tag, reg, data)
91 1.1 leo pci_chipset_tag_t pc;
92 1.1 leo pcitag_t tag;
93 1.1 leo int reg;
94 1.1 leo pcireg_t data;
95 1.1 leo {
96 1.1 leo *((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
97 1.1 leo = bswap32(data);
98 1.1 leo }
99 1.1 leo
100 1.1 leo /*
101 1.1 leo * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
102 1.1 leo * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
103 1.1 leo * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
104 1.1 leo * to the slot position.
105 1.1 leo */
106 1.1 leo static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
107 1.1 leo
108 1.1 leo static int iifun __P((int, int));
109 1.1 leo
110 1.1 leo static int
111 1.1 leo iifun(slot, sr)
112 1.1 leo int slot;
113 1.1 leo int sr;
114 1.1 leo {
115 1.1 leo pci_intr_info_t *iinfo_p;
116 1.1 leo int s;
117 1.1 leo
118 1.1 leo iinfo_p = &iinfo[slot];
119 1.1 leo
120 1.1 leo /*
121 1.1 leo * Disable the interrupts
122 1.1 leo */
123 1.1 leo MFP2->mf_imrb &= ~iinfo_p->imask;
124 1.1 leo
125 1.1 leo if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
126 1.1 leo /*
127 1.1 leo * We're running at a too high priority now.
128 1.1 leo */
129 1.1 leo add_sicallback((si_farg)iifun, (void*)slot, 0);
130 1.1 leo }
131 1.1 leo else {
132 1.1 leo s = splx(iinfo_p->ipl);
133 1.1 leo (void) (iinfo_p->ifunc)(iinfo_p->iarg);
134 1.1 leo splx(s);
135 1.1 leo
136 1.1 leo /*
137 1.1 leo * Re-enable interrupts after handling
138 1.1 leo */
139 1.1 leo MFP2->mf_imrb |= iinfo_p->imask;
140 1.1 leo }
141 1.1 leo return 1;
142 1.1 leo }
143 1.1 leo
144 1.1 leo void *
145 1.1 leo pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
146 1.1 leo pci_chipset_tag_t pc;
147 1.1 leo pci_intr_handle_t ih;
148 1.1 leo int level;
149 1.1 leo int (*ih_fun) __P((void *));
150 1.1 leo void *ih_arg;
151 1.1 leo {
152 1.1 leo pci_intr_info_t *iinfo_p;
153 1.1 leo struct intrhand *ihand;
154 1.1 leo int slot;
155 1.1 leo
156 1.1 leo slot = ih;
157 1.1 leo iinfo_p = &iinfo[slot];
158 1.1 leo
159 1.1 leo if (iinfo_p->ipl > 0)
160 1.3 provos panic("pci_intr_establish: interrupt was already established");
161 1.1 leo
162 1.1 leo ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
163 1.1 leo (hw_ifun_t)iifun, (void *)slot);
164 1.1 leo if (ihand != NULL) {
165 1.1 leo iinfo_p->ipl = level;
166 1.1 leo iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
167 1.1 leo iinfo_p->ifunc = ih_fun;
168 1.1 leo iinfo_p->iarg = ih_arg;
169 1.1 leo iinfo_p->ihand = ihand;
170 1.1 leo
171 1.1 leo /*
172 1.1 leo * Enable (unmask) the interrupt
173 1.1 leo */
174 1.1 leo MFP2->mf_imrb |= iinfo_p->imask;
175 1.1 leo MFP2->mf_ierb |= iinfo_p->imask;
176 1.1 leo return(iinfo_p);
177 1.1 leo }
178 1.1 leo return NULL;
179 1.1 leo }
180 1.1 leo
181 1.1 leo void
182 1.1 leo pci_intr_disestablish(pc, cookie)
183 1.1 leo pci_chipset_tag_t pc;
184 1.1 leo void *cookie;
185 1.1 leo {
186 1.1 leo pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
187 1.1 leo
188 1.1 leo if (iinfo->ipl < 0)
189 1.3 provos panic("pci_intr_disestablish: interrupt was not established");
190 1.1 leo
191 1.1 leo MFP2->mf_imrb &= ~iinfo->imask;
192 1.1 leo MFP2->mf_ierb &= ~iinfo->imask;
193 1.1 leo (void) intr_disestablish(iinfo_p->ihand);
194 1.1 leo iinfo_p->ipl = -1;
195 1.2 leo }
196 1.2 leo
197 1.2 leo /*
198 1.2 leo * XXX: Why are we repeating this everywhere! (Leo)
199 1.2 leo */
200 1.2 leo #define PCI_LINMEMBASE 0x0e000000
201 1.2 leo
202 1.2 leo static u_char crt_tab[] = {
203 1.2 leo 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
204 1.2 leo 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
205 1.2 leo 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
206 1.2 leo 0xff };
207 1.2 leo
208 1.2 leo static u_char seq_tab[] = {
209 1.2 leo 0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 };
210 1.2 leo
211 1.2 leo static u_char attr_tab[] = {
212 1.2 leo 0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 };
213 1.2 leo
214 1.2 leo static u_char gdc_tab[] = {
215 1.2 leo 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff };
216 1.2 leo
217 1.2 leo void
218 1.2 leo ati_vga_init(pc, tag, id, ba, fb)
219 1.2 leo pci_chipset_tag_t pc;
220 1.2 leo pcitag_t tag;
221 1.2 leo int id;
222 1.2 leo volatile u_char *ba;
223 1.2 leo u_char *fb;
224 1.2 leo {
225 1.2 leo int i, csr;
226 1.2 leo
227 1.2 leo /* Turn on the card */
228 1.2 leo pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
229 1.2 leo csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
230 1.2 leo csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
231 1.2 leo csr |= PCI_COMMAND_MASTER_ENABLE;
232 1.2 leo pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
233 1.2 leo
234 1.2 leo /*
235 1.2 leo * Make sure we're allowed to write all crt-registers and reload them.
236 1.2 leo */
237 1.2 leo WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
238 1.2 leo
239 1.2 leo for (i = 0; i < 0x18; i++)
240 1.2 leo WCrt(ba, i, crt_tab[i]);
241 1.2 leo for (i = 0; i < 8; i++)
242 1.2 leo WSeq(ba, i, seq_tab[i]);
243 1.2 leo for (i = 0; i < 9; i++)
244 1.2 leo WGfx(ba, i, gdc_tab[i]);
245 1.2 leo for (i = 0x10; i < 0x18; i++)
246 1.2 leo WAttr(ba, i, attr_tab[i - 0x10]);
247 1.2 leo WAttr(ba, 0x20, 0);
248 1.1 leo }
249