pci_hades.c revision 1.1.2.1 1 /* $NetBSD: pci_hades.c,v 1.1.2.1 2001/06/21 19:20:35 nathanw Exp $ */
2
3 /*
4 * Copyright (c) 1996 Leo Weppelman. All rights reserved.
5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles M. Hannum.
19 * 4. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <sys/types.h>
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38
39 #include <machine/bus.h>
40
41 #include <dev/pci/pcivar.h>
42 #include <dev/pci/pcireg.h>
43
44 #include <machine/cpu.h>
45 #include <machine/iomap.h>
46 #include <machine/mfp.h>
47 #include <machine/bswap.h>
48
49 #include <atari/atari/device.h>
50 #include <atari/pci/pci_vga.h>
51
52 int
53 pci_bus_maxdevs(pc, busno)
54 pci_chipset_tag_t pc;
55 int busno;
56 {
57 return (4);
58 }
59
60 static int pci_config_offset __P((pcitag_t));
61
62 /*
63 * Atari_init.c maps the config areas NBPG bytes apart....
64 */
65 static int pci_config_offset(tag)
66 pcitag_t tag;
67 {
68 int device;
69
70 device = (tag >> 11) & 0x1f;
71 return(device * NBPG);
72 }
73
74 pcireg_t
75 pci_conf_read(pc, tag, reg)
76 pci_chipset_tag_t pc;
77 pcitag_t tag;
78 int reg;
79 {
80 u_long data;
81
82 data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
83 return (bswap32(data));
84 }
85
86 void
87 pci_conf_write(pc, tag, reg, data)
88 pci_chipset_tag_t pc;
89 pcitag_t tag;
90 int reg;
91 pcireg_t data;
92 {
93 *((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
94 = bswap32(data);
95 }
96
97 /*
98 * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
99 * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
100 * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
101 * to the slot position.
102 */
103 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
104
105 static int iifun __P((int, int));
106
107 static int
108 iifun(slot, sr)
109 int slot;
110 int sr;
111 {
112 pci_intr_info_t *iinfo_p;
113 int s;
114
115 iinfo_p = &iinfo[slot];
116
117 /*
118 * Disable the interrupts
119 */
120 MFP2->mf_imrb &= ~iinfo_p->imask;
121
122 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
123 /*
124 * We're running at a too high priority now.
125 */
126 add_sicallback((si_farg)iifun, (void*)slot, 0);
127 }
128 else {
129 s = splx(iinfo_p->ipl);
130 (void) (iinfo_p->ifunc)(iinfo_p->iarg);
131 splx(s);
132
133 /*
134 * Re-enable interrupts after handling
135 */
136 MFP2->mf_imrb |= iinfo_p->imask;
137 }
138 return 1;
139 }
140
141 void *
142 pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
143 pci_chipset_tag_t pc;
144 pci_intr_handle_t ih;
145 int level;
146 int (*ih_fun) __P((void *));
147 void *ih_arg;
148 {
149 pci_intr_info_t *iinfo_p;
150 struct intrhand *ihand;
151 int slot;
152
153 slot = ih;
154 iinfo_p = &iinfo[slot];
155
156 if (iinfo_p->ipl > 0)
157 panic("pci_intr_establish: interrupt was already established\n");
158
159 ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
160 (hw_ifun_t)iifun, (void *)slot);
161 if (ihand != NULL) {
162 iinfo_p->ipl = level;
163 iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
164 iinfo_p->ifunc = ih_fun;
165 iinfo_p->iarg = ih_arg;
166 iinfo_p->ihand = ihand;
167
168 /*
169 * Enable (unmask) the interrupt
170 */
171 MFP2->mf_imrb |= iinfo_p->imask;
172 MFP2->mf_ierb |= iinfo_p->imask;
173 return(iinfo_p);
174 }
175 return NULL;
176 }
177
178 void
179 pci_intr_disestablish(pc, cookie)
180 pci_chipset_tag_t pc;
181 void *cookie;
182 {
183 pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
184
185 if (iinfo->ipl < 0)
186 panic("pci_intr_disestablish: interrupt was not established\n");
187
188 MFP2->mf_imrb &= ~iinfo->imask;
189 MFP2->mf_ierb &= ~iinfo->imask;
190 (void) intr_disestablish(iinfo_p->ihand);
191 iinfo_p->ipl = -1;
192 }
193