pci_hades.c revision 1.12.2.1
1 /* $NetBSD: pci_hades.c,v 1.12.2.1 2012/04/17 00:06:09 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Leo Weppelman. All rights reserved. 5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Charles M. Hannum. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: pci_hades.c,v 1.12.2.1 2012/04/17 00:06:09 yamt Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 42 #include <uvm/uvm_extern.h> 43 44 #include <sys/bus.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 49 #include <machine/cpu.h> 50 #include <machine/iomap.h> 51 #include <machine/mfp.h> 52 #include <sys/bswap.h> 53 54 #include <atari/atari/device.h> 55 #include <atari/pci/pci_vga.h> 56 #include <atari/dev/grf_etreg.h> 57 58 int 59 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 60 { 61 return (4); 62 } 63 64 static int pci_config_offset(pcitag_t); 65 66 /* 67 * Atari_init.c maps the config areas PAGE_SIZE bytes apart.... 68 */ 69 static int pci_config_offset(pcitag_t tag) 70 { 71 int device; 72 73 device = (tag >> 11) & 0x1f; 74 return(device * PAGE_SIZE); 75 } 76 77 pcireg_t 78 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 79 { 80 u_long data; 81 82 data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg); 83 return (bswap32(data)); 84 } 85 86 void 87 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 88 { 89 *((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg)) 90 = bswap32(data); 91 } 92 93 /* 94 * The interrupt stuff is rather ugly. On the Hades, all interrupt lines 95 * for a slot are wired together and connected to IO 0,1,2 or 5 (slots: 96 * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number 97 * to the slot position. 98 */ 99 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } }; 100 101 static int iifun(int, int); 102 103 static int 104 iifun(int slot, int sr) 105 { 106 pci_intr_info_t *iinfo_p; 107 int s; 108 109 iinfo_p = &iinfo[slot]; 110 111 /* 112 * Disable the interrupts 113 */ 114 MFP2->mf_imrb &= ~iinfo_p->imask; 115 116 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) { 117 /* 118 * We're running at a too high priority now. 119 */ 120 add_sicallback((si_farg)iifun, (void*)slot, 0); 121 } 122 else { 123 s = splx(iinfo_p->ipl); 124 (void) (iinfo_p->ifunc)(iinfo_p->iarg); 125 splx(s); 126 127 /* 128 * Re-enable interrupts after handling 129 */ 130 MFP2->mf_imrb |= iinfo_p->imask; 131 } 132 return 1; 133 } 134 135 int 136 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, 137 int attr, uint64_t data) 138 { 139 140 switch (attr) { 141 case PCI_INTR_MPSAFE: 142 return 0; 143 default: 144 return ENODEV; 145 } 146 } 147 148 void * 149 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, int (*ih_fun)(void *), void *ih_arg) 150 { 151 pci_intr_info_t *iinfo_p; 152 struct intrhand *ihand; 153 int slot; 154 155 slot = ih; 156 iinfo_p = &iinfo[slot]; 157 158 if (iinfo_p->ipl > 0) 159 panic("pci_intr_establish: interrupt was already established"); 160 161 ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0, 162 (hw_ifun_t)iifun, (void *)slot); 163 if (ihand != NULL) { 164 iinfo_p->ipl = level; 165 iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot); 166 iinfo_p->ifunc = ih_fun; 167 iinfo_p->iarg = ih_arg; 168 iinfo_p->ihand = ihand; 169 170 /* 171 * Enable (unmask) the interrupt 172 */ 173 MFP2->mf_imrb |= iinfo_p->imask; 174 MFP2->mf_ierb |= iinfo_p->imask; 175 return(iinfo_p); 176 } 177 return NULL; 178 } 179 180 void 181 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 182 { 183 pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie; 184 185 if (iinfo->ipl < 0) 186 panic("pci_intr_disestablish: interrupt was not established"); 187 188 MFP2->mf_imrb &= ~iinfo->imask; 189 MFP2->mf_ierb &= ~iinfo->imask; 190 (void) intr_disestablish(iinfo_p->ihand); 191 iinfo_p->ipl = -1; 192 } 193 194 /* 195 * XXX: Why are we repeating this everywhere! (Leo) 196 */ 197 #define PCI_LINMEMBASE 0x0e000000 198 199 static u_char crt_tab[] = { 200 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, 201 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, 202 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 203 0xff }; 204 205 static u_char seq_tab[] = { 206 0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 }; 207 208 static u_char attr_tab[] = { 209 0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 }; 210 211 static u_char gdc_tab[] = { 212 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff }; 213 214 void 215 ati_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb) 216 { 217 int i, csr; 218 219 /* Turn on the card */ 220 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE); 221 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 222 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 223 csr |= PCI_COMMAND_MASTER_ENABLE; 224 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 225 226 /* 227 * Make sure we're allowed to write all crt-registers and reload them. 228 */ 229 WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f)); 230 231 for (i = 0; i < 0x18; i++) 232 WCrt(ba, i, crt_tab[i]); 233 for (i = 0; i < 8; i++) 234 WSeq(ba, i, seq_tab[i]); 235 for (i = 0; i < 9; i++) 236 WGfx(ba, i, gdc_tab[i]); 237 for (i = 0x10; i < 0x18; i++) 238 WAttr(ba, i, attr_tab[i - 0x10]); 239 WAttr(ba, 0x20, 0); 240 } 241
Indexes created Fri Oct 03 02:09:57 GMT 2025