pci_hades.c revision 1.13.24.1 1 /* $NetBSD: pci_hades.c,v 1.13.24.1 2015/12/27 12:09:32 skrll Exp $ */
2
3 /*
4 * Copyright (c) 1996 Leo Weppelman. All rights reserved.
5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved.
6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles M. Hannum.
19 * 4. The name of the author may not be used to endorse or promote products
20 * derived from this software without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #include <sys/cdefs.h>
35 __KERNEL_RCSID(0, "$NetBSD: pci_hades.c,v 1.13.24.1 2015/12/27 12:09:32 skrll Exp $");
36
37 #include <sys/types.h>
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/device.h>
41
42 #include <uvm/uvm_extern.h>
43
44 #include <sys/bus.h>
45
46 #include <dev/pci/pcivar.h>
47 #include <dev/pci/pcireg.h>
48
49 #include <machine/cpu.h>
50 #include <machine/iomap.h>
51 #include <machine/mfp.h>
52 #include <sys/bswap.h>
53
54 #include <atari/atari/device.h>
55 #include <atari/pci/pci_vga.h>
56 #include <atari/dev/grf_etreg.h>
57
58 int
59 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno)
60 {
61 return (4);
62 }
63
64 static int pci_config_offset(pcitag_t);
65
66 /*
67 * Atari_init.c maps the config areas PAGE_SIZE bytes apart....
68 */
69 static int pci_config_offset(pcitag_t tag)
70 {
71 int device;
72
73 device = (tag >> 11) & 0x1f;
74 return(device * PAGE_SIZE);
75 }
76
77 pcireg_t
78 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg)
79 {
80 u_long data;
81
82 if ((unsigned int)reg >= PCI_CONF_SIZE)
83 return ((pcireg_t) -1);
84
85 data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
86 return (bswap32(data));
87 }
88
89 void
90 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data)
91 {
92
93 if ((unsigned int)reg >= PCI_CONF_SIZE)
94 return;
95
96 *((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
97 = bswap32(data);
98 }
99
100 /*
101 * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
102 * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
103 * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
104 * to the slot position.
105 */
106 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
107
108 static int iifun(int, int);
109
110 static int
111 iifun(int slot, int sr)
112 {
113 pci_intr_info_t *iinfo_p;
114 int s;
115
116 iinfo_p = &iinfo[slot];
117
118 /*
119 * Disable the interrupts
120 */
121 MFP2->mf_imrb &= ~iinfo_p->imask;
122
123 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
124 /*
125 * We're running at a too high priority now.
126 */
127 add_sicallback((si_farg)iifun, (void*)slot, 0);
128 }
129 else {
130 s = splx(iinfo_p->ipl);
131 (void) (iinfo_p->ifunc)(iinfo_p->iarg);
132 splx(s);
133
134 /*
135 * Re-enable interrupts after handling
136 */
137 MFP2->mf_imrb |= iinfo_p->imask;
138 }
139 return 1;
140 }
141
142 int
143 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih,
144 int attr, uint64_t data)
145 {
146
147 switch (attr) {
148 case PCI_INTR_MPSAFE:
149 return 0;
150 default:
151 return ENODEV;
152 }
153 }
154
155 void *
156 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, int (*ih_fun)(void *), void *ih_arg)
157 {
158 pci_intr_info_t *iinfo_p;
159 struct intrhand *ihand;
160 int slot;
161
162 slot = ih;
163 iinfo_p = &iinfo[slot];
164
165 if (iinfo_p->ipl > 0)
166 panic("pci_intr_establish: interrupt was already established");
167
168 ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
169 (hw_ifun_t)iifun, (void *)slot);
170 if (ihand != NULL) {
171 iinfo_p->ipl = level;
172 iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
173 iinfo_p->ifunc = ih_fun;
174 iinfo_p->iarg = ih_arg;
175 iinfo_p->ihand = ihand;
176
177 /*
178 * Enable (unmask) the interrupt
179 */
180 MFP2->mf_imrb |= iinfo_p->imask;
181 MFP2->mf_ierb |= iinfo_p->imask;
182 return(iinfo_p);
183 }
184 return NULL;
185 }
186
187 void
188 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie)
189 {
190 pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
191
192 if (iinfo->ipl < 0)
193 panic("pci_intr_disestablish: interrupt was not established");
194
195 MFP2->mf_imrb &= ~iinfo->imask;
196 MFP2->mf_ierb &= ~iinfo->imask;
197 (void) intr_disestablish(iinfo_p->ihand);
198 iinfo_p->ipl = -1;
199 }
200
201 /*
202 * XXX: Why are we repeating this everywhere! (Leo)
203 */
204 #define PCI_LINMEMBASE 0x0e000000
205
206 static u_char crt_tab[] = {
207 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
208 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
209 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
210 0xff };
211
212 static u_char seq_tab[] = {
213 0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 };
214
215 static u_char attr_tab[] = {
216 0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 };
217
218 static u_char gdc_tab[] = {
219 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff };
220
221 void
222 ati_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb)
223 {
224 int i, csr;
225
226 /* Turn on the card */
227 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
228 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
229 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
230 csr |= PCI_COMMAND_MASTER_ENABLE;
231 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
232
233 /*
234 * Make sure we're allowed to write all crt-registers and reload them.
235 */
236 WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
237
238 for (i = 0; i < 0x18; i++)
239 WCrt(ba, i, crt_tab[i]);
240 for (i = 0; i < 8; i++)
241 WSeq(ba, i, seq_tab[i]);
242 for (i = 0; i < 9; i++)
243 WGfx(ba, i, gdc_tab[i]);
244 for (i = 0x10; i < 0x18; i++)
245 WAttr(ba, i, attr_tab[i - 0x10]);
246 WAttr(ba, 0x20, 0);
247 }
248