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pci_hades.c revision 1.4
      1 /*	$NetBSD: pci_hades.c,v 1.4 2003/04/01 23:47:03 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
      5  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
      6  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed by Charles M. Hannum.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  */
     33 
     34 #include <sys/types.h>
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/device.h>
     38 
     39 #include <uvm/uvm_extern.h>
     40 
     41 #include <machine/bus.h>
     42 
     43 #include <dev/pci/pcivar.h>
     44 #include <dev/pci/pcireg.h>
     45 
     46 #include <machine/cpu.h>
     47 #include <machine/iomap.h>
     48 #include <machine/mfp.h>
     49 #include <machine/bswap.h>
     50 
     51 #include <atari/atari/device.h>
     52 #include <atari/pci/pci_vga.h>
     53 #include <atari/dev/grf_etreg.h>
     54 
     55 int
     56 pci_bus_maxdevs(pc, busno)
     57 	pci_chipset_tag_t pc;
     58 	int busno;
     59 {
     60 	return (4);
     61 }
     62 
     63 static int pci_config_offset __P((pcitag_t));
     64 
     65 /*
     66  * Atari_init.c maps the config areas PAGE_SIZE bytes apart....
     67  */
     68 static int pci_config_offset(tag)
     69 pcitag_t	tag;
     70 {
     71 	int	device;
     72 
     73 	device = (tag >> 11) & 0x1f;
     74 	return(device * PAGE_SIZE);
     75 }
     76 
     77 pcireg_t
     78 pci_conf_read(pc, tag, reg)
     79 	pci_chipset_tag_t pc;
     80 	pcitag_t tag;
     81 	int reg;
     82 {
     83 	u_long	data;
     84 
     85 	data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
     86 	return (bswap32(data));
     87 }
     88 
     89 void
     90 pci_conf_write(pc, tag, reg, data)
     91 	pci_chipset_tag_t pc;
     92 	pcitag_t tag;
     93 	int reg;
     94 	pcireg_t data;
     95 {
     96 	*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
     97 		= bswap32(data);
     98 }
     99 
    100 /*
    101  * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
    102  * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
    103  * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
    104  * to the slot position.
    105  */
    106 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
    107 
    108 static int	iifun __P((int, int));
    109 
    110 static int
    111 iifun(slot, sr)
    112 int	slot;
    113 int	sr;
    114 {
    115 	pci_intr_info_t *iinfo_p;
    116 	int		s;
    117 
    118 	iinfo_p = &iinfo[slot];
    119 
    120 	/*
    121 	 * Disable the interrupts
    122 	 */
    123 	MFP2->mf_imrb  &= ~iinfo_p->imask;
    124 
    125 	if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
    126 		/*
    127 		 * We're running at a too high priority now.
    128 		 */
    129 		add_sicallback((si_farg)iifun, (void*)slot, 0);
    130 	}
    131 	else {
    132 		s = splx(iinfo_p->ipl);
    133 		(void) (iinfo_p->ifunc)(iinfo_p->iarg);
    134 		splx(s);
    135 
    136 		/*
    137 		 * Re-enable interrupts after handling
    138 		 */
    139 		MFP2->mf_imrb |= iinfo_p->imask;
    140 	}
    141 	return 1;
    142 }
    143 
    144 void *
    145 pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
    146 	pci_chipset_tag_t	pc;
    147 	pci_intr_handle_t	ih;
    148 	int			level;
    149 	int			(*ih_fun) __P((void *));
    150 	void			*ih_arg;
    151 {
    152 	pci_intr_info_t *iinfo_p;
    153 	struct intrhand	*ihand;
    154 	int		slot;
    155 
    156 	slot    = ih;
    157 	iinfo_p = &iinfo[slot];
    158 
    159 	if (iinfo_p->ipl > 0)
    160 	    panic("pci_intr_establish: interrupt was already established");
    161 
    162 	ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
    163 				(hw_ifun_t)iifun, (void *)slot);
    164 	if (ihand != NULL) {
    165 		iinfo_p->ipl   = level;
    166 		iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
    167 		iinfo_p->ifunc = ih_fun;
    168 		iinfo_p->iarg  = ih_arg;
    169 		iinfo_p->ihand = ihand;
    170 
    171 		/*
    172 		 * Enable (unmask) the interrupt
    173 		 */
    174 		MFP2->mf_imrb |= iinfo_p->imask;
    175 		MFP2->mf_ierb |= iinfo_p->imask;
    176 		return(iinfo_p);
    177 	}
    178 	return NULL;
    179 }
    180 
    181 void
    182 pci_intr_disestablish(pc, cookie)
    183 	pci_chipset_tag_t pc;
    184 	void *cookie;
    185 {
    186 	pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
    187 
    188 	if (iinfo->ipl < 0)
    189 	    panic("pci_intr_disestablish: interrupt was not established");
    190 
    191 	MFP2->mf_imrb &= ~iinfo->imask;
    192 	MFP2->mf_ierb &= ~iinfo->imask;
    193 	(void) intr_disestablish(iinfo_p->ihand);
    194 	iinfo_p->ipl = -1;
    195 }
    196 
    197 /*
    198  * XXX: Why are we repeating this everywhere! (Leo)
    199  */
    200 #define PCI_LINMEMBASE  0x0e000000
    201 
    202 static u_char crt_tab[] = {
    203 	0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
    204 	0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
    205 	0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
    206 	0xff };
    207 
    208 static u_char seq_tab[] = {
    209 	0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 };
    210 
    211 static u_char attr_tab[] = {
    212 	0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 };
    213 
    214 static u_char gdc_tab[] = {
    215 	0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff };
    216 
    217 void
    218 ati_vga_init(pc, tag, id, ba, fb)
    219 	pci_chipset_tag_t	pc;
    220 	pcitag_t		tag;
    221 	int			id;
    222 	volatile u_char		*ba;
    223 	u_char			*fb;
    224 {
    225 	int			i, csr;
    226 
    227 	/* Turn on the card */
    228 	pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
    229 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    230 	csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
    231 	csr |= PCI_COMMAND_MASTER_ENABLE;
    232 	pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    233 
    234 	/*
    235 	 * Make sure we're allowed to write all crt-registers and reload them.
    236 	 */
    237 	WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
    238 
    239 	for (i = 0; i < 0x18; i++)
    240 		WCrt(ba, i, crt_tab[i]);
    241 	for (i = 0; i < 8; i++)
    242 		WSeq(ba, i, seq_tab[i]);
    243 	for (i = 0; i < 9; i++)
    244 		WGfx(ba, i, gdc_tab[i]);
    245 	for (i = 0x10; i < 0x18; i++)
    246 		WAttr(ba, i, attr_tab[i - 0x10]);
    247 	WAttr(ba, 0x20, 0);
    248 }
    249