pci_hades.c revision 1.7.76.1
1 /* $NetBSD: pci_hades.c,v 1.7.76.1 2009/05/04 08:10:48 yamt Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Leo Weppelman. All rights reserved. 5 * Copyright (c) 1996, 1997 Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Charles M. Hannum. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: pci_hades.c,v 1.7.76.1 2009/05/04 08:10:48 yamt Exp $"); 36 37 #include <sys/types.h> 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/device.h> 41 42 #include <uvm/uvm_extern.h> 43 44 #include <machine/bus.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcireg.h> 48 49 #include <machine/cpu.h> 50 #include <machine/iomap.h> 51 #include <machine/mfp.h> 52 #include <sys/bswap.h> 53 54 #include <atari/atari/device.h> 55 #include <atari/pci/pci_vga.h> 56 #include <atari/dev/grf_etreg.h> 57 58 int 59 pci_bus_maxdevs(pci_chipset_tag_t pc, int busno) 60 { 61 return (4); 62 } 63 64 static int pci_config_offset(pcitag_t); 65 66 /* 67 * Atari_init.c maps the config areas PAGE_SIZE bytes apart.... 68 */ 69 static int pci_config_offset(tag) 70 pcitag_t tag; 71 { 72 int device; 73 74 device = (tag >> 11) & 0x1f; 75 return(device * PAGE_SIZE); 76 } 77 78 pcireg_t 79 pci_conf_read(pci_chipset_tag_t pc, pcitag_t tag, int reg) 80 { 81 u_long data; 82 83 data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg); 84 return (bswap32(data)); 85 } 86 87 void 88 pci_conf_write(pci_chipset_tag_t pc, pcitag_t tag, int reg, pcireg_t data) 89 { 90 *((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg)) 91 = bswap32(data); 92 } 93 94 /* 95 * The interrupt stuff is rather ugly. On the Hades, all interrupt lines 96 * for a slot are wired together and connected to IO 0,1,2 or 5 (slots: 97 * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number 98 * to the slot position. 99 */ 100 static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } }; 101 102 static int iifun(int, int); 103 104 static int 105 iifun(int slot, int sr) 106 { 107 pci_intr_info_t *iinfo_p; 108 int s; 109 110 iinfo_p = &iinfo[slot]; 111 112 /* 113 * Disable the interrupts 114 */ 115 MFP2->mf_imrb &= ~iinfo_p->imask; 116 117 if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) { 118 /* 119 * We're running at a too high priority now. 120 */ 121 add_sicallback((si_farg)iifun, (void*)slot, 0); 122 } 123 else { 124 s = splx(iinfo_p->ipl); 125 (void) (iinfo_p->ifunc)(iinfo_p->iarg); 126 splx(s); 127 128 /* 129 * Re-enable interrupts after handling 130 */ 131 MFP2->mf_imrb |= iinfo_p->imask; 132 } 133 return 1; 134 } 135 136 int 137 pci_intr_setattr(pci_chipset_tag_t pc, pci_intr_handle_t *ih, 138 int attr, uint64_t data) 139 { 140 141 switch (attr) { 142 case PCI_INTR_MPSAFE: 143 return 0; 144 default: 145 return ENODEV; 146 } 147 } 148 149 void * 150 pci_intr_establish(pci_chipset_tag_t pc, pci_intr_handle_t ih, int level, int (*ih_fun)(void *), void *ih_arg) 151 { 152 pci_intr_info_t *iinfo_p; 153 struct intrhand *ihand; 154 int slot; 155 156 slot = ih; 157 iinfo_p = &iinfo[slot]; 158 159 if (iinfo_p->ipl > 0) 160 panic("pci_intr_establish: interrupt was already established"); 161 162 ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0, 163 (hw_ifun_t)iifun, (void *)slot); 164 if (ihand != NULL) { 165 iinfo_p->ipl = level; 166 iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot); 167 iinfo_p->ifunc = ih_fun; 168 iinfo_p->iarg = ih_arg; 169 iinfo_p->ihand = ihand; 170 171 /* 172 * Enable (unmask) the interrupt 173 */ 174 MFP2->mf_imrb |= iinfo_p->imask; 175 MFP2->mf_ierb |= iinfo_p->imask; 176 return(iinfo_p); 177 } 178 return NULL; 179 } 180 181 void 182 pci_intr_disestablish(pci_chipset_tag_t pc, void *cookie) 183 { 184 pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie; 185 186 if (iinfo->ipl < 0) 187 panic("pci_intr_disestablish: interrupt was not established"); 188 189 MFP2->mf_imrb &= ~iinfo->imask; 190 MFP2->mf_ierb &= ~iinfo->imask; 191 (void) intr_disestablish(iinfo_p->ihand); 192 iinfo_p->ipl = -1; 193 } 194 195 /* 196 * XXX: Why are we repeating this everywhere! (Leo) 197 */ 198 #define PCI_LINMEMBASE 0x0e000000 199 200 static u_char crt_tab[] = { 201 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f, 202 0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00, 203 0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3, 204 0xff }; 205 206 static u_char seq_tab[] = { 207 0x03, 0x00, 0x03, 0x00, 0x02, 0x00, 0x00, 0x00 }; 208 209 static u_char attr_tab[] = { 210 0x0c, 0x00, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00 }; 211 212 static u_char gdc_tab[] = { 213 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x00, 0xff }; 214 215 void 216 ati_vga_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb) 217 { 218 int i, csr; 219 220 /* Turn on the card */ 221 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE); 222 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 223 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 224 csr |= PCI_COMMAND_MASTER_ENABLE; 225 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 226 227 /* 228 * Make sure we're allowed to write all crt-registers and reload them. 229 */ 230 WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f)); 231 232 for (i = 0; i < 0x18; i++) 233 WCrt(ba, i, crt_tab[i]); 234 for (i = 0; i < 8; i++) 235 WSeq(ba, i, seq_tab[i]); 236 for (i = 0; i < 9; i++) 237 WGfx(ba, i, gdc_tab[i]); 238 for (i = 0x10; i < 0x18; i++) 239 WAttr(ba, i, attr_tab[i - 0x10]); 240 WAttr(ba, 0x20, 0); 241 } 242
Indexes created Thu Oct 02 14:10:14 GMT 2025