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pci_machdep.c revision 1.20
      1  1.20    thomas /*	$NetBSD: pci_machdep.c,v 1.20 1999/11/07 22:23:05 thomas Exp $	*/
      2   1.1       leo 
      3   1.1       leo /*
      4   1.1       leo  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
      5   1.7       cgd  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
      6  1.13   mycroft  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      7   1.1       leo  *
      8   1.1       leo  * Redistribution and use in source and binary forms, with or without
      9   1.1       leo  * modification, are permitted provided that the following conditions
     10   1.1       leo  * are met:
     11   1.1       leo  * 1. Redistributions of source code must retain the above copyright
     12   1.1       leo  *    notice, this list of conditions and the following disclaimer.
     13   1.1       leo  * 2. Redistributions in binary form must reproduce the above copyright
     14   1.1       leo  *    notice, this list of conditions and the following disclaimer in the
     15   1.1       leo  *    documentation and/or other materials provided with the distribution.
     16   1.1       leo  * 3. All advertising materials mentioning features or use of this software
     17   1.1       leo  *    must display the following acknowledgement:
     18  1.13   mycroft  *	This product includes software developed by Charles M. Hannum.
     19   1.1       leo  * 4. The name of the author may not be used to endorse or promote products
     20   1.1       leo  *    derived from this software without specific prior written permission.
     21   1.1       leo  *
     22   1.1       leo  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23   1.1       leo  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24   1.1       leo  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25   1.1       leo  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26   1.1       leo  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27   1.1       leo  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28   1.1       leo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29   1.1       leo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30   1.1       leo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31   1.1       leo  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32   1.1       leo  */
     33   1.1       leo 
     34   1.1       leo #include <sys/types.h>
     35   1.1       leo #include <sys/param.h>
     36   1.1       leo #include <sys/time.h>
     37   1.1       leo #include <sys/systm.h>
     38   1.1       leo #include <sys/errno.h>
     39   1.1       leo #include <sys/device.h>
     40  1.14    thomas #include <sys/malloc.h>
     41   1.1       leo 
     42   1.1       leo #include <vm/vm.h>
     43   1.1       leo #include <vm/vm_kern.h>
     44   1.1       leo 
     45   1.1       leo #include <dev/pci/pcivar.h>
     46   1.1       leo #include <dev/pci/pcireg.h>
     47   1.1       leo 
     48   1.1       leo #include <machine/cpu.h>
     49   1.1       leo #include <machine/iomap.h>
     50   1.9       leo #include <machine/mfp.h>
     51  1.16       leo #include <machine/bswap.h>
     52  1.10       leo #include <machine/bus.h>
     53  1.10       leo 
     54   1.1       leo #include <atari/atari/device.h>
     55  1.17       leo #include <atari/pci/pci_vga.h>
     56   1.1       leo 
     57   1.9       leo /*
     58  1.14    thomas  * Sizes of pci memory and I/O area.
     59   1.9       leo  */
     60  1.14    thomas #define PCI_MEM_END     0x10000000      /* 256 MByte */
     61  1.14    thomas #define PCI_IO_END      0x10000000      /* 256 MByte */
     62  1.14    thomas 
     63  1.14    thomas /*
     64  1.14    thomas  * We preserve some space at the begin of the pci area for 32BIT_1M
     65  1.14    thomas  * devices and standard vga.
     66  1.14    thomas  */
     67  1.14    thomas #define PCI_MEM_START   0x00100000      /*   1 MByte */
     68  1.15    thomas #define PCI_IO_START    0x00004000      /*  16 kByte (some PCI cards allow only
     69  1.20    thomas 					    I/O adresses up to 0xffff) */
     70  1.20    thomas 
     71  1.20    thomas /*
     72  1.20    thomas  * PCI memory and IO should be aligned acording to this masks
     73  1.20    thomas  */
     74  1.20    thomas #define PCI_MACHDEP_IO_ALIGN_MASK	0xffffff00
     75  1.20    thomas #define PCI_MACHDEP_MEM_ALIGN_MASK	0xfffff000
     76  1.20    thomas 
     77  1.19       leo /*
     78  1.19       leo  * Convert a PCI 'device' number to a slot number.
     79  1.19       leo  */
     80  1.19       leo #define	DEV2SLOT(dev)	(3 - dev)
     81  1.14    thomas 
     82  1.14    thomas /*
     83  1.14    thomas  * Struct to hold the memory and I/O datas of the pci devices
     84  1.14    thomas  */
     85  1.14    thomas struct pci_memreg {
     86  1.14    thomas     LIST_ENTRY(pci_memreg) link;
     87  1.14    thomas     int dev;
     88  1.14    thomas     pcitag_t tag;
     89  1.14    thomas     pcireg_t reg, address, mask;
     90  1.14    thomas     u_int32_t size;
     91  1.14    thomas     u_int32_t csr;
     92  1.14    thomas };
     93  1.14    thomas 
     94  1.14    thomas typedef LIST_HEAD(pci_memreg_head, pci_memreg) PCI_MEMREG;
     95   1.9       leo 
     96   1.1       leo int	pcibusprint __P((void *auxp, const char *));
     97   1.5       leo int	pcibusmatch __P((struct device *, struct cfdata *, void *));
     98   1.1       leo void	pcibusattach __P((struct device *, struct device *, void *));
     99   1.1       leo 
    100  1.14    thomas static void enable_pci_devices __P((void));
    101  1.14    thomas static void insert_into_list __P((PCI_MEMREG *head, struct pci_memreg *elem));
    102  1.14    thomas static int overlap_pci_areas __P((struct pci_memreg *p,
    103  1.14    thomas 	struct pci_memreg *self, u_int addr, u_int size, u_int what));
    104   1.1       leo static int pci_config_offset __P((pcitag_t));
    105   1.1       leo 
    106   1.1       leo struct cfattach pcibus_ca = {
    107   1.1       leo 	sizeof(struct device), pcibusmatch, pcibusattach
    108   1.1       leo };
    109   1.1       leo 
    110   1.1       leo int
    111   1.5       leo pcibusmatch(pdp, cfp, auxp)
    112   1.1       leo struct device	*pdp;
    113   1.5       leo struct cfdata	*cfp;
    114   1.5       leo void		*auxp;
    115   1.1       leo {
    116   1.1       leo 	if(atari_realconfig == 0)
    117   1.1       leo 		return (0);
    118   1.1       leo 	if (strcmp((char *)auxp, "pcibus") || cfp->cf_unit != 0)
    119   1.1       leo 		return(0);
    120   1.1       leo 	return(machineid & ATARI_HADES ? 1 : 0);
    121   1.1       leo }
    122   1.1       leo 
    123   1.1       leo void
    124   1.1       leo pcibusattach(pdp, dp, auxp)
    125   1.1       leo struct device	*pdp, *dp;
    126   1.1       leo void		*auxp;
    127   1.1       leo {
    128   1.1       leo 	struct pcibus_attach_args	pba;
    129  1.11       leo 	bus_space_tag_t			leb_alloc_bus_space_tag __P((void));
    130  1.11       leo 
    131   1.1       leo 
    132  1.14    thomas 	enable_pci_devices();
    133  1.14    thomas 
    134   1.1       leo 	pba.pba_busname = "pci";
    135   1.4       leo 	pba.pba_pc      = NULL;
    136   1.1       leo 	pba.pba_bus     = 0;
    137   1.7       cgd 	pba.pba_flags	= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
    138  1.10       leo 	pba.pba_dmat	= BUS_PCI_DMA_TAG;
    139  1.11       leo 	pba.pba_iot     = leb_alloc_bus_space_tag();
    140  1.11       leo 	pba.pba_memt    = leb_alloc_bus_space_tag();
    141  1.11       leo 	if ((pba.pba_iot == NULL) || (pba.pba_memt == NULL)) {
    142  1.11       leo 		printf("leb_alloc_bus_space_tag failed!\n");
    143  1.11       leo 		return;
    144  1.11       leo 	}
    145  1.11       leo 	pba.pba_iot->base  = PCI_IO_PHYS;
    146  1.11       leo 	pba.pba_memt->base = PCI_MEM_PHYS;
    147   1.6       leo 
    148   1.9       leo 	MFP2->mf_aer &= ~(0x27); /* PCI interrupts: HIGH -> LOW */
    149   1.9       leo 
    150   1.6       leo 	printf("\n");
    151   1.1       leo 
    152   1.1       leo 	config_found(dp, &pba, pcibusprint);
    153   1.1       leo }
    154   1.1       leo 
    155   1.1       leo int
    156   1.1       leo pcibusprint(auxp, name)
    157   1.1       leo void		*auxp;
    158   1.1       leo const char	*name;
    159   1.1       leo {
    160   1.1       leo 	if(name == NULL)
    161   1.1       leo 		return(UNCONF);
    162   1.1       leo 	return(QUIET);
    163   1.1       leo }
    164   1.1       leo 
    165   1.1       leo void
    166   1.1       leo pci_attach_hook(parent, self, pba)
    167   1.1       leo 	struct device *parent, *self;
    168   1.1       leo 	struct pcibus_attach_args *pba;
    169   1.1       leo {
    170   1.1       leo }
    171   1.1       leo 
    172   1.1       leo /*
    173   1.9       leo  * Initialize the PCI-bus. The Atari-BIOS does not do this, so....
    174  1.14    thomas  * We only disable all devices here. Memory and I/O enabling is done
    175  1.14    thomas  * later at pcibusattach.
    176   1.9       leo  */
    177   1.9       leo void
    178   1.9       leo init_pci_bus()
    179   1.9       leo {
    180   1.9       leo 	pci_chipset_tag_t	pc = NULL; /* XXX */
    181   1.9       leo 	pcitag_t		tag;
    182  1.14    thomas 	pcireg_t		csr;
    183  1.14    thomas 	int			device, id, maxndevs;
    184   1.9       leo 
    185  1.14    thomas 	tag   = 0;
    186  1.14    thomas 	id    = 0;
    187   1.9       leo 
    188   1.9       leo 	maxndevs = pci_bus_maxdevs(pc, 0);
    189   1.9       leo 
    190   1.9       leo 	for (device = 0; device < maxndevs; device++) {
    191   1.9       leo 
    192   1.9       leo 		tag = pci_make_tag(pc, 0, device, 0);
    193   1.9       leo 		id  = pci_conf_read(pc, tag, PCI_ID_REG);
    194   1.9       leo 		if (id == 0 || id == 0xffffffff)
    195   1.9       leo 			continue;
    196   1.9       leo 
    197  1.14    thomas 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    198  1.14    thomas 		csr &= ~(PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
    199  1.14    thomas 		csr &= ~PCI_COMMAND_MASTER_ENABLE;
    200  1.14    thomas 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    201  1.14    thomas 	}
    202  1.17       leo 
    203  1.17       leo 	/*
    204  1.17       leo 	 * Scan the bus for a VGA-card that we support. If we find
    205  1.17       leo 	 * one, try to initialize it to a 'standard' text mode (80x25).
    206  1.17       leo 	 */
    207  1.17       leo 	check_for_vga();
    208  1.14    thomas }
    209  1.14    thomas 
    210  1.14    thomas /*
    211  1.14    thomas  * insert a new element in an existing list that the ID's (size in struct
    212  1.14    thomas  * pci_memreg) are sorted.
    213  1.14    thomas  */
    214  1.14    thomas static void
    215  1.14    thomas insert_into_list(head, elem)
    216  1.14    thomas     PCI_MEMREG *head;
    217  1.14    thomas     struct pci_memreg *elem;
    218  1.14    thomas {
    219  1.14    thomas     struct pci_memreg *p, *q;
    220  1.14    thomas 
    221  1.14    thomas     p = LIST_FIRST(head);
    222  1.14    thomas     q = NULL;
    223  1.14    thomas 
    224  1.14    thomas     for (; p != NULL && p->size < elem->size; q = p, p = LIST_NEXT(p, link));
    225  1.14    thomas 
    226  1.14    thomas     if (q == NULL) {
    227  1.14    thomas 	LIST_INSERT_HEAD(head, elem, link);
    228  1.14    thomas     } else {
    229  1.14    thomas 	LIST_INSERT_AFTER(q, elem, link);
    230  1.14    thomas     }
    231  1.14    thomas }
    232  1.14    thomas 
    233  1.14    thomas /*
    234  1.14    thomas  * Test if a new selected area overlaps with an already (probably preselected)
    235  1.14    thomas  * pci area.
    236  1.14    thomas  */
    237  1.14    thomas static int
    238  1.14    thomas overlap_pci_areas(p, self, addr, size, what)
    239  1.14    thomas     struct pci_memreg *p, *self;
    240  1.14    thomas     u_int addr, size, what;
    241  1.14    thomas {
    242  1.14    thomas     struct pci_memreg *q;
    243  1.14    thomas 
    244  1.14    thomas     if (p == NULL)
    245  1.14    thomas 	return 0;
    246  1.14    thomas 
    247  1.14    thomas     q = p;
    248  1.14    thomas     while (q != NULL) {
    249  1.14    thomas 	if ((q != self) && (q->csr & what)) {
    250  1.14    thomas 	    if ((addr >= q->address) && (addr < (q->address + q->size))) {
    251  1.14    thomas #ifdef DEBUG_PCI_MACHDEP
    252  1.14    thomas 		printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
    253  1.14    thomas 			self->dev, self->reg, q->dev, q->reg);
    254  1.14    thomas #endif
    255  1.14    thomas 		return 1;
    256  1.14    thomas 	    }
    257  1.14    thomas 	    if ((q->address >= addr) && (q->address < (addr + size))) {
    258  1.14    thomas #ifdef DEBUG_PCI_MACHDEP
    259  1.14    thomas 		printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
    260  1.14    thomas 			self->dev, self->reg, q->dev, q->reg);
    261  1.14    thomas #endif
    262  1.14    thomas 		return 1;
    263  1.14    thomas 	    }
    264  1.14    thomas 	}
    265  1.14    thomas 	q = LIST_NEXT(q, link);
    266  1.14    thomas     }
    267  1.14    thomas     return 0;
    268  1.14    thomas }
    269  1.14    thomas 
    270  1.14    thomas /*
    271  1.14    thomas  * Enable memory and I/O on pci devices. Care about already enabled devices
    272  1.14    thomas  * (probabaly by the console driver).
    273  1.14    thomas  *
    274  1.14    thomas  * The idea behind the following code is:
    275  1.14    thomas  * We build a by sizes sorted list of the requirements of the different
    276  1.14    thomas  * pci devices. After that we choose the start addresses of that areas
    277  1.14    thomas  * in such a way that they are placed as closed as possible together.
    278  1.14    thomas  */
    279  1.14    thomas static void
    280  1.14    thomas enable_pci_devices()
    281  1.14    thomas {
    282  1.14    thomas     PCI_MEMREG memlist;
    283  1.14    thomas     PCI_MEMREG iolist;
    284  1.14    thomas     struct pci_memreg *p, *q;
    285  1.14    thomas     int dev, reg, id, class;
    286  1.14    thomas     pcitag_t tag;
    287  1.14    thomas     pcireg_t csr, address, mask;
    288  1.14    thomas     pci_chipset_tag_t pc;
    289  1.14    thomas     int sizecnt, membase_1m;
    290  1.14    thomas 
    291  1.14    thomas     pc = 0;
    292  1.14    thomas     csr = 0;
    293  1.14    thomas     tag = 0;
    294  1.14    thomas 
    295  1.14    thomas     LIST_INIT(&memlist);
    296  1.14    thomas     LIST_INIT(&iolist);
    297  1.14    thomas 
    298  1.14    thomas     /*
    299  1.14    thomas      * first step: go through all devices and gather memory and I/O
    300  1.14    thomas      * sizes
    301  1.14    thomas      */
    302  1.14    thomas     for (dev = 0; dev < pci_bus_maxdevs(pc,0); dev++) {
    303  1.14    thomas 
    304  1.14    thomas 	tag = pci_make_tag(pc, 0, dev, 0);
    305  1.14    thomas 	id  = pci_conf_read(pc, tag, PCI_ID_REG);
    306  1.14    thomas 	if (id == 0 || id == 0xffffffff)
    307  1.14    thomas 	    continue;
    308  1.14    thomas 
    309  1.14    thomas 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    310  1.14    thomas 
    311  1.14    thomas 	/*
    312  1.14    thomas 	 * special case: if a display card is found and memory is enabled
    313  1.14    thomas 	 * preserve 128k at 0xa0000 as vga memory.
    314  1.18       leo 	 * XXX: if a display card is found without being enabled, leave
    315  1.18       leo 	 *      it alone! You will usually only create conflicts by enabeling
    316  1.18       leo 	 *      it.
    317  1.14    thomas 	 */
    318  1.14    thomas 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
    319  1.14    thomas 	switch (PCI_CLASS(class)) {
    320  1.14    thomas 	    case PCI_CLASS_PREHISTORIC:
    321  1.14    thomas 	    case PCI_CLASS_DISPLAY:
    322  1.18       leo 	      if (csr & (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE)) {
    323  1.14    thomas 		    p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
    324  1.14    thomas 				M_TEMP, M_WAITOK);
    325  1.14    thomas 		    memset(p, '\0', sizeof(struct pci_memreg));
    326  1.14    thomas 		    p->dev = dev;
    327  1.14    thomas 		    p->csr = csr;
    328  1.14    thomas 		    p->tag = tag;
    329  1.14    thomas 		    p->reg = 0;     /* there is no register about this */
    330  1.14    thomas 		    p->size = 0x20000;  /* 128kByte */
    331  1.14    thomas 		    p->mask = 0xfffe0000;
    332  1.14    thomas 		    p->address = 0xa0000;
    333  1.14    thomas 
    334  1.14    thomas 		    insert_into_list(&memlist, p);
    335  1.18       leo 	      }
    336  1.18       leo 	      else continue;
    337   1.9       leo 	}
    338   1.9       leo 
    339  1.14    thomas 	for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
    340  1.14    thomas 
    341  1.14    thomas 	    address = pci_conf_read(pc, tag, reg);
    342  1.14    thomas 	    pci_conf_write(pc, tag, reg, 0xffffffff);
    343  1.14    thomas 	    mask    = pci_conf_read(pc, tag, reg);
    344  1.14    thomas 	    pci_conf_write(pc, tag, reg, address);
    345  1.14    thomas 	    if (mask == 0)
    346  1.14    thomas 		continue; /* Register unused */
    347  1.14    thomas 
    348  1.14    thomas 	    p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
    349  1.14    thomas 			M_TEMP, M_WAITOK);
    350  1.14    thomas 	    memset(p, '\0', sizeof(struct pci_memreg));
    351  1.14    thomas 	    p->dev = dev;
    352  1.14    thomas 	    p->csr = csr;
    353  1.14    thomas 	    p->tag = tag;
    354  1.14    thomas 	    p->reg = reg;
    355  1.14    thomas 	    p->mask = mask;
    356  1.14    thomas 	    p->address = 0;
    357  1.14    thomas 
    358  1.14    thomas 	    if (mask & PCI_MAPREG_TYPE_IO) {
    359  1.14    thomas 		p->size = PCI_MAPREG_IO_SIZE(mask);
    360  1.14    thomas 
    361  1.14    thomas 		/*
    362  1.20    thomas 		 * Align IO if necessary
    363  1.20    thomas 		 */
    364  1.20    thomas 		if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_IO_ALIGN_MASK)) {
    365  1.20    thomas 		    p->mask = PCI_MACHDEP_IO_ALIGN_MASK;
    366  1.20    thomas 		    p->size = PCI_MAPREG_IO_SIZE(p->mask);
    367  1.20    thomas 		}
    368  1.20    thomas 
    369  1.20    thomas 		/*
    370  1.14    thomas 		 * if I/O is already enabled (probably by the console driver)
    371  1.14    thomas 		 * save the address in order to take care about it later.
    372  1.14    thomas 		 */
    373  1.14    thomas 		if (csr & PCI_COMMAND_IO_ENABLE)
    374  1.14    thomas 		    p->address = address;
    375  1.14    thomas 
    376  1.14    thomas 		insert_into_list(&iolist, p);
    377  1.14    thomas 	    } else {
    378  1.14    thomas 		p->size = PCI_MAPREG_MEM_SIZE(mask);
    379  1.14    thomas 
    380  1.14    thomas 		/*
    381  1.20    thomas 		 * Align memory if necessary
    382  1.20    thomas 		 */
    383  1.20    thomas 		if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_MEM_ALIGN_MASK)) {
    384  1.20    thomas 		    p->mask = PCI_MACHDEP_MEM_ALIGN_MASK;
    385  1.20    thomas 		    p->size = PCI_MAPREG_MEM_SIZE(p->mask);
    386  1.20    thomas 		}
    387  1.20    thomas 
    388  1.20    thomas 		/*
    389  1.14    thomas 		 * if memory is already enabled (probably by the console driver)
    390  1.14    thomas 		 * save the address in order to take care about it later.
    391  1.14    thomas 		 */
    392  1.14    thomas 		if (csr & PCI_COMMAND_MEM_ENABLE)
    393  1.14    thomas 		    p->address = address;
    394  1.14    thomas 
    395  1.14    thomas 		insert_into_list(&memlist, p);
    396   1.9       leo 
    397  1.14    thomas 		if (PCI_MAPREG_MEM_TYPE(mask) == PCI_MAPREG_MEM_TYPE_64BIT)
    398  1.14    thomas 		    reg++;
    399  1.14    thomas 	    }
    400  1.14    thomas 	}
    401   1.9       leo 
    402  1.14    thomas 	/*
    403  1.14    thomas 	 * Both interrupt pin & line are set to the device (== slot)
    404  1.14    thomas 	 * number. This makes sense on the atari because the
    405  1.14    thomas 	 * individual slots are hard-wired to a specific MFP-pin.
    406  1.14    thomas 	 */
    407  1.19       leo 	csr  = (DEV2SLOT(dev) << PCI_INTERRUPT_PIN_SHIFT);
    408  1.19       leo 	csr |= (DEV2SLOT(dev) << PCI_INTERRUPT_LINE_SHIFT);
    409  1.14    thomas 	pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
    410  1.14    thomas     }
    411  1.14    thomas 
    412  1.14    thomas     /*
    413  1.14    thomas      * second step: calculate the memory and I/O adresses beginning from
    414  1.14    thomas      * PCI_MEM_START and PCI_IO_START. Care about already mapped areas.
    415  1.14    thomas      *
    416  1.14    thomas      * beginn with memory list
    417  1.14    thomas      */
    418  1.14    thomas 
    419  1.14    thomas     address = PCI_MEM_START;
    420  1.14    thomas     sizecnt = 0;
    421  1.14    thomas     membase_1m = 0;
    422  1.14    thomas     p = LIST_FIRST(&memlist);
    423  1.14    thomas     while (p != NULL) {
    424  1.14    thomas 	if (!(p->csr & PCI_COMMAND_MEM_ENABLE)) {
    425  1.14    thomas 	    if (PCI_MAPREG_MEM_TYPE(p->mask) == PCI_MAPREG_MEM_TYPE_32BIT_1M) {
    426  1.14    thomas 		if (p->size > membase_1m)
    427  1.14    thomas 		    membase_1m = p->size;
    428  1.14    thomas 		do {
    429  1.14    thomas 		    p->address = membase_1m;
    430  1.14    thomas 		    membase_1m += p->size;
    431  1.14    thomas 		} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
    432  1.14    thomas 					   p->size, PCI_COMMAND_MEM_ENABLE));
    433  1.14    thomas 		if (membase_1m > 0x00100000) {
    434  1.14    thomas 		    /*
    435  1.14    thomas 		     * Should we panic here?
    436  1.14    thomas 		     */
    437  1.14    thomas 		    printf("\npcibus0: dev %d reg %d: memory not configured",
    438  1.14    thomas 			    p->dev, p->reg);
    439  1.14    thomas 		    p->reg = 0;
    440   1.9       leo 		}
    441  1.14    thomas 	    } else {
    442   1.9       leo 
    443  1.14    thomas 		if (sizecnt && (p->size > sizecnt))
    444  1.14    thomas 		    sizecnt = ((p->size + sizecnt) & p->mask) &
    445  1.14    thomas 			      PCI_MAPREG_MEM_ADDR_MASK;
    446  1.14    thomas 		if (sizecnt > address) {
    447  1.14    thomas 		    address = sizecnt;
    448  1.14    thomas 		    sizecnt = 0;
    449  1.14    thomas 		}
    450   1.9       leo 
    451  1.14    thomas 		do {
    452  1.14    thomas 		    p->address = address + sizecnt;
    453  1.14    thomas 		    sizecnt += p->size;
    454  1.14    thomas 		} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
    455  1.14    thomas 					   p->size, PCI_COMMAND_MEM_ENABLE));
    456  1.14    thomas 
    457  1.14    thomas 		if ((address + sizecnt) > PCI_MEM_END) {
    458  1.14    thomas 		    /*
    459  1.14    thomas 		     * Should we panic here?
    460  1.14    thomas 		     */
    461  1.14    thomas 		    printf("\npcibus0: dev %d reg %d: memory not configured",
    462  1.14    thomas 			    p->dev, p->reg);
    463  1.14    thomas 		    p->reg = 0;
    464  1.14    thomas 		}
    465  1.14    thomas 	    }
    466  1.14    thomas 	    if (p->reg > 0) {
    467  1.14    thomas 		pci_conf_write(pc, p->tag, p->reg, p->address);
    468  1.14    thomas 		csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
    469  1.14    thomas 		csr |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    470  1.14    thomas 		pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
    471  1.20    thomas 		p->csr = csr;
    472  1.14    thomas 	    }
    473  1.14    thomas 	}
    474  1.14    thomas 	p = LIST_NEXT(p, link);
    475  1.14    thomas     }
    476   1.9       leo 
    477  1.14    thomas     /*
    478  1.14    thomas      * now the I/O list
    479  1.14    thomas      */
    480  1.14    thomas 
    481  1.14    thomas     address = PCI_IO_START;
    482  1.14    thomas     sizecnt = 0;
    483  1.14    thomas     p = LIST_FIRST(&iolist);
    484  1.14    thomas     while (p != NULL) {
    485  1.14    thomas 	if (!(p->csr & PCI_COMMAND_IO_ENABLE)) {
    486  1.14    thomas 
    487  1.14    thomas 	    if (sizecnt && (p->size > sizecnt))
    488  1.14    thomas 		sizecnt = ((p->size + sizecnt) & p->mask) &
    489  1.14    thomas 			  PCI_MAPREG_IO_ADDR_MASK;
    490  1.14    thomas 	    if (sizecnt > address) {
    491  1.14    thomas 		address = sizecnt;
    492  1.14    thomas 		sizecnt = 0;
    493  1.14    thomas 	    }
    494  1.14    thomas 
    495  1.14    thomas 	    do {
    496  1.14    thomas 		p->address = address + sizecnt;
    497  1.14    thomas 		sizecnt += p->size;
    498  1.14    thomas 	    } while (overlap_pci_areas(LIST_FIRST(&iolist), p, p->address,
    499  1.14    thomas 				       p->size, PCI_COMMAND_IO_ENABLE));
    500   1.9       leo 
    501  1.14    thomas 	    if ((address + sizecnt) > PCI_IO_END) {
    502   1.9       leo 		/*
    503  1.14    thomas 		 * Should we panic here?
    504   1.9       leo 		 */
    505  1.14    thomas 		printf("\npcibus0: dev %d reg %d: io not configured",
    506  1.14    thomas 			p->dev, p->reg);
    507  1.14    thomas 	    } else {
    508  1.14    thomas 		pci_conf_write(pc, p->tag, p->reg, p->address);
    509  1.14    thomas 		csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
    510  1.14    thomas 		csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    511  1.14    thomas 		pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
    512  1.20    thomas 		p->csr = csr;
    513  1.14    thomas 	    }
    514   1.9       leo 	}
    515  1.14    thomas 	p = LIST_NEXT(p, link);
    516  1.14    thomas     }
    517  1.14    thomas 
    518  1.14    thomas #ifdef DEBUG_PCI_MACHDEP
    519  1.14    thomas     printf("\nI/O List:\n");
    520  1.14    thomas     p = LIST_FIRST(&iolist);
    521  1.14    thomas 
    522  1.14    thomas     while (p != NULL) {
    523  1.14    thomas 	printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
    524  1.14    thomas 			p->reg, p->size, p->address);
    525  1.14    thomas 	p = LIST_NEXT(p, link);
    526  1.14    thomas     }
    527  1.14    thomas     printf("\nMemlist:");
    528  1.14    thomas     p = LIST_FIRST(&memlist);
    529  1.14    thomas 
    530  1.14    thomas     while (p != NULL) {
    531  1.14    thomas 	printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
    532  1.14    thomas 			p->reg, p->size, p->address);
    533  1.14    thomas 	p = LIST_NEXT(p, link);
    534  1.14    thomas     }
    535  1.14    thomas #endif
    536  1.14    thomas 
    537  1.14    thomas     /*
    538  1.14    thomas      * Free the lists
    539  1.14    thomas      */
    540  1.14    thomas     p = LIST_FIRST(&iolist);
    541  1.14    thomas     while (p != NULL) {
    542  1.14    thomas 	q = p;
    543  1.14    thomas 	LIST_REMOVE(q, link);
    544  1.14    thomas 	free(p, M_WAITOK);
    545  1.14    thomas 	p = LIST_FIRST(&iolist);
    546  1.14    thomas     }
    547  1.14    thomas     p = LIST_FIRST(&memlist);
    548  1.14    thomas     while (p != NULL) {
    549  1.14    thomas 	q = p;
    550  1.14    thomas 	LIST_REMOVE(q, link);
    551  1.14    thomas 	free(p, M_WAITOK);
    552  1.14    thomas 	p = LIST_FIRST(&memlist);
    553  1.14    thomas     }
    554   1.9       leo }
    555   1.9       leo 
    556   1.9       leo /*
    557   1.1       leo  * Atari_init.c maps the config areas NBPG bytes apart....
    558   1.1       leo  */
    559   1.1       leo static int pci_config_offset(tag)
    560   1.1       leo pcitag_t	tag;
    561   1.1       leo {
    562   1.1       leo 	int	device;
    563   1.1       leo 
    564   1.1       leo 	device = (tag >> 11) & 0x1f;
    565   1.1       leo 	return(device * NBPG);
    566   1.1       leo }
    567   1.1       leo 
    568   1.1       leo int
    569   1.1       leo pci_bus_maxdevs(pc, busno)
    570   1.1       leo 	pci_chipset_tag_t pc;
    571   1.1       leo 	int busno;
    572   1.1       leo {
    573   1.1       leo 	return (4);
    574   1.1       leo }
    575   1.1       leo 
    576   1.1       leo pcitag_t
    577   1.1       leo pci_make_tag(pc, bus, device, function)
    578   1.1       leo 	pci_chipset_tag_t pc;
    579   1.1       leo 	int bus, device, function;
    580   1.1       leo {
    581   1.1       leo 	return ((bus << 16) | (device << 11) | (function << 8));
    582   1.1       leo }
    583   1.1       leo 
    584   1.1       leo pcireg_t
    585   1.1       leo pci_conf_read(pc, tag, reg)
    586   1.1       leo 	pci_chipset_tag_t pc;
    587   1.1       leo 	pcitag_t tag;
    588   1.1       leo 	int reg;
    589   1.1       leo {
    590   1.1       leo 	u_long	data;
    591   1.1       leo 
    592   1.1       leo 	data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
    593   1.9       leo 	return (bswap32(data));
    594   1.1       leo }
    595   1.1       leo 
    596   1.1       leo void
    597   1.1       leo pci_conf_write(pc, tag, reg, data)
    598   1.1       leo 	pci_chipset_tag_t pc;
    599   1.1       leo 	pcitag_t tag;
    600   1.1       leo 	int reg;
    601   1.1       leo 	pcireg_t data;
    602   1.1       leo {
    603   1.9       leo 	*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
    604   1.9       leo 		= bswap32(data);
    605   1.1       leo }
    606   1.1       leo 
    607   1.1       leo int
    608   1.1       leo pci_intr_map(pc, intrtag, pin, line, ihp)
    609   1.1       leo 	pci_chipset_tag_t pc;
    610   1.1       leo 	pcitag_t intrtag;
    611   1.1       leo 	int pin, line;
    612   1.1       leo 	pci_intr_handle_t *ihp;
    613   1.1       leo {
    614   1.9       leo 	/*
    615   1.9       leo 	 * According to the PCI-spec, 255 means `unknown' or `no connection'.
    616   1.9       leo 	 * Interpret this as 'no interrupt assigned'.
    617   1.9       leo 	 */
    618   1.9       leo 	if (line == 255) {
    619   1.9       leo 		*ihp = -1;
    620   1.9       leo 		return 1;
    621   1.9       leo 	}
    622   1.9       leo 
    623   1.9       leo 	/*
    624   1.9       leo 	 * Values are pretty useless because the on the Hades all interrupt
    625   1.9       leo 	 * lines for a card are tied together and hardwired to the TT-MFP
    626   1.9       leo 	 * I/O port.
    627   1.9       leo 	 */
    628   1.9       leo 	*ihp = line;
    629   1.9       leo 	return 0;
    630   1.1       leo }
    631   1.1       leo 
    632   1.1       leo const char *
    633   1.1       leo pci_intr_string(pc, ih)
    634   1.1       leo 	pci_chipset_tag_t pc;
    635   1.1       leo 	pci_intr_handle_t ih;
    636   1.1       leo {
    637   1.1       leo 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    638   1.1       leo 
    639   1.9       leo 	if (ih == -1)
    640   1.1       leo 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
    641   1.1       leo 
    642   1.3  christos 	sprintf(irqstr, "irq %d", ih);
    643   1.1       leo 	return (irqstr);
    644   1.1       leo 
    645   1.1       leo }
    646   1.1       leo 
    647   1.9       leo /*
    648   1.9       leo  * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
    649   1.9       leo  * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
    650   1.9       leo  * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
    651   1.9       leo  * to the slot position.
    652   1.9       leo  */
    653   1.9       leo static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
    654   1.9       leo 
    655   1.9       leo static int	iifun __P((int, int));
    656   1.9       leo 
    657   1.9       leo static int
    658   1.9       leo iifun(slot, sr)
    659   1.9       leo int	slot;
    660   1.9       leo int	sr;
    661   1.9       leo {
    662   1.9       leo 	pci_intr_info_t *iinfo_p;
    663   1.9       leo 	int		s;
    664   1.9       leo 
    665   1.9       leo 	iinfo_p = &iinfo[slot];
    666   1.9       leo 
    667   1.9       leo 	/*
    668   1.9       leo 	 * Disable the interrupts
    669   1.9       leo 	 */
    670   1.9       leo 	MFP2->mf_imrb  &= ~iinfo_p->imask;
    671   1.9       leo 
    672  1.12       leo 	if ((sr & PSL_IPL) >= (iinfo_p->ipl & PSL_IPL)) {
    673   1.9       leo 		/*
    674   1.9       leo 		 * We're running at a too high priority now.
    675   1.9       leo 		 */
    676   1.9       leo 		add_sicallback((si_farg)iifun, (void*)slot, 0);
    677   1.9       leo 	}
    678   1.9       leo 	else {
    679   1.9       leo 		s = splx(iinfo_p->ipl);
    680   1.9       leo 		(void) (iinfo_p->ifunc)(iinfo_p->iarg);
    681   1.9       leo 		splx(s);
    682   1.9       leo 
    683   1.9       leo 		/*
    684   1.9       leo 		 * Re-enable interrupts after handling
    685   1.9       leo 		 */
    686   1.9       leo 		MFP2->mf_imrb |= iinfo_p->imask;
    687   1.9       leo 	}
    688   1.9       leo 	return 1;
    689   1.9       leo }
    690   1.9       leo 
    691   1.1       leo void *
    692   1.9       leo pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
    693   1.9       leo 	pci_chipset_tag_t	pc;
    694   1.9       leo 	pci_intr_handle_t	ih;
    695   1.9       leo 	int			level;
    696   1.9       leo 	int			(*ih_fun) __P((void *));
    697   1.9       leo 	void			*ih_arg;
    698   1.9       leo {
    699   1.9       leo 	pci_intr_info_t *iinfo_p;
    700   1.9       leo 	struct intrhand	*ihand;
    701   1.9       leo 	int		slot;
    702   1.9       leo 
    703   1.9       leo 	slot    = ih;
    704   1.9       leo 	iinfo_p = &iinfo[slot];
    705   1.9       leo 
    706   1.9       leo 	if (iinfo_p->ipl > 0)
    707   1.9       leo 	    panic("pci_intr_establish: interrupt was already established\n");
    708   1.9       leo 
    709   1.9       leo 	ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
    710   1.9       leo 				(hw_ifun_t)iifun, (void *)slot);
    711   1.9       leo 	if (ihand != NULL) {
    712   1.9       leo 		iinfo_p->ipl   = level;
    713   1.9       leo 		iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
    714   1.9       leo 		iinfo_p->ifunc = ih_fun;
    715   1.9       leo 		iinfo_p->iarg  = ih_arg;
    716   1.9       leo 		iinfo_p->ihand = ihand;
    717   1.9       leo 
    718   1.9       leo 		/*
    719   1.9       leo 		 * Enable (unmask) the interrupt
    720   1.9       leo 		 */
    721   1.9       leo 		MFP2->mf_imrb |= iinfo_p->imask;
    722   1.9       leo 		MFP2->mf_ierb |= iinfo_p->imask;
    723   1.9       leo 		return(iinfo_p);
    724   1.9       leo 	}
    725   1.1       leo 	return NULL;
    726   1.1       leo }
    727   1.1       leo 
    728   1.1       leo void
    729   1.1       leo pci_intr_disestablish(pc, cookie)
    730   1.1       leo 	pci_chipset_tag_t pc;
    731   1.1       leo 	void *cookie;
    732   1.1       leo {
    733   1.9       leo 	pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
    734   1.9       leo 
    735   1.9       leo 	if (iinfo->ipl < 0)
    736   1.9       leo 	    panic("pci_intr_disestablish: interrupt was not established\n");
    737   1.9       leo 
    738   1.9       leo 	MFP2->mf_imrb &= ~iinfo->imask;
    739   1.9       leo 	MFP2->mf_ierb &= ~iinfo->imask;
    740   1.9       leo 	(void) intr_disestablish(iinfo_p->ihand);
    741   1.9       leo 	iinfo_p->ipl = -1;
    742   1.1       leo }
    743