Home | History | Annotate | Line # | Download | only in pci
pci_machdep.c revision 1.52
      1  1.52    dyoung /*	$NetBSD: pci_machdep.c,v 1.52 2011/07/01 20:34:06 dyoung Exp $	*/
      2   1.1       leo 
      3   1.1       leo /*
      4   1.1       leo  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
      5   1.7       cgd  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
      6  1.13   mycroft  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      7   1.1       leo  *
      8   1.1       leo  * Redistribution and use in source and binary forms, with or without
      9   1.1       leo  * modification, are permitted provided that the following conditions
     10   1.1       leo  * are met:
     11   1.1       leo  * 1. Redistributions of source code must retain the above copyright
     12   1.1       leo  *    notice, this list of conditions and the following disclaimer.
     13   1.1       leo  * 2. Redistributions in binary form must reproduce the above copyright
     14   1.1       leo  *    notice, this list of conditions and the following disclaimer in the
     15   1.1       leo  *    documentation and/or other materials provided with the distribution.
     16   1.1       leo  * 3. All advertising materials mentioning features or use of this software
     17   1.1       leo  *    must display the following acknowledgement:
     18  1.13   mycroft  *	This product includes software developed by Charles M. Hannum.
     19   1.1       leo  * 4. The name of the author may not be used to endorse or promote products
     20   1.1       leo  *    derived from this software without specific prior written permission.
     21   1.1       leo  *
     22   1.1       leo  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23   1.1       leo  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24   1.1       leo  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25   1.1       leo  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26   1.1       leo  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27   1.1       leo  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28   1.1       leo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29   1.1       leo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30   1.1       leo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31   1.1       leo  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32   1.1       leo  */
     33   1.1       leo 
     34  1.40     lukem #include <sys/cdefs.h>
     35  1.52    dyoung __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.52 2011/07/01 20:34:06 dyoung Exp $");
     36  1.40     lukem 
     37  1.31       leo #include "opt_mbtype.h"
     38  1.40     lukem 
     39   1.1       leo #include <sys/types.h>
     40   1.1       leo #include <sys/param.h>
     41   1.1       leo #include <sys/time.h>
     42   1.1       leo #include <sys/systm.h>
     43   1.1       leo #include <sys/errno.h>
     44   1.1       leo #include <sys/device.h>
     45  1.14    thomas #include <sys/malloc.h>
     46   1.1       leo 
     47  1.30       leo #define _ATARI_BUS_DMA_PRIVATE
     48  1.52    dyoung #include <sys/bus.h>
     49   1.1       leo 
     50   1.1       leo #include <dev/pci/pcivar.h>
     51   1.1       leo #include <dev/pci/pcireg.h>
     52   1.1       leo 
     53  1.30       leo #include <uvm/uvm_extern.h>
     54  1.30       leo 
     55   1.1       leo #include <machine/cpu.h>
     56   1.1       leo #include <machine/iomap.h>
     57   1.9       leo #include <machine/mfp.h>
     58  1.10       leo 
     59   1.1       leo #include <atari/atari/device.h>
     60  1.17       leo #include <atari/pci/pci_vga.h>
     61   1.1       leo 
     62   1.9       leo /*
     63  1.14    thomas  * Sizes of pci memory and I/O area.
     64   1.9       leo  */
     65  1.14    thomas #define PCI_MEM_END     0x10000000      /* 256 MByte */
     66  1.14    thomas #define PCI_IO_END      0x10000000      /* 256 MByte */
     67  1.14    thomas 
     68  1.14    thomas /*
     69  1.14    thomas  * We preserve some space at the begin of the pci area for 32BIT_1M
     70  1.14    thomas  * devices and standard vga.
     71  1.14    thomas  */
     72  1.14    thomas #define PCI_MEM_START   0x00100000      /*   1 MByte */
     73  1.15    thomas #define PCI_IO_START    0x00004000      /*  16 kByte (some PCI cards allow only
     74  1.25       leo 					    I/O addresses up to 0xffff) */
     75  1.20    thomas 
     76  1.20    thomas /*
     77  1.20    thomas  * PCI memory and IO should be aligned acording to this masks
     78  1.20    thomas  */
     79  1.20    thomas #define PCI_MACHDEP_IO_ALIGN_MASK	0xffffff00
     80  1.20    thomas #define PCI_MACHDEP_MEM_ALIGN_MASK	0xfffff000
     81  1.20    thomas 
     82  1.19       leo /*
     83  1.19       leo  * Convert a PCI 'device' number to a slot number.
     84  1.19       leo  */
     85  1.19       leo #define	DEV2SLOT(dev)	(3 - dev)
     86  1.14    thomas 
     87  1.14    thomas /*
     88  1.14    thomas  * Struct to hold the memory and I/O datas of the pci devices
     89  1.14    thomas  */
     90  1.14    thomas struct pci_memreg {
     91  1.14    thomas     LIST_ENTRY(pci_memreg) link;
     92  1.14    thomas     int dev;
     93  1.14    thomas     pcitag_t tag;
     94  1.14    thomas     pcireg_t reg, address, mask;
     95  1.14    thomas     u_int32_t size;
     96  1.14    thomas     u_int32_t csr;
     97  1.14    thomas };
     98  1.14    thomas 
     99  1.14    thomas typedef LIST_HEAD(pci_memreg_head, pci_memreg) PCI_MEMREG;
    100   1.9       leo 
    101  1.30       leo /*
    102  1.30       leo  * Entry points for PCI DMA.  Use only the 'standard' functions.
    103  1.30       leo  */
    104  1.44       dsl int	_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
    105  1.44       dsl 	    bus_size_t, int, bus_dmamap_t *);
    106  1.30       leo struct atari_bus_dma_tag pci_bus_dma_tag = {
    107  1.30       leo 	0,
    108  1.33       leo #if defined(_ATARIHW_)
    109  1.31       leo 	0x80000000, /* On the Hades, CPU memory starts here PCI-wise */
    110  1.31       leo #else
    111  1.31       leo 	0,
    112  1.31       leo #endif
    113  1.30       leo 	_bus_dmamap_create,
    114  1.30       leo 	_bus_dmamap_destroy,
    115  1.30       leo 	_bus_dmamap_load,
    116  1.30       leo 	_bus_dmamap_load_mbuf,
    117  1.30       leo 	_bus_dmamap_load_uio,
    118  1.30       leo 	_bus_dmamap_load_raw,
    119  1.30       leo 	_bus_dmamap_unload,
    120  1.30       leo 	_bus_dmamap_sync,
    121  1.30       leo };
    122  1.30       leo 
    123  1.51   tsutsui int	ataripcibusprint(void *, const char *);
    124  1.51   tsutsui int	pcibusmatch(device_t, cfdata_t, void *);
    125  1.51   tsutsui void	pcibusattach(device_t, device_t, void *);
    126  1.44       dsl 
    127  1.44       dsl static void enable_pci_devices(void);
    128  1.44       dsl static void insert_into_list(PCI_MEMREG *head, struct pci_memreg *elem);
    129  1.44       dsl static int overlap_pci_areas(struct pci_memreg *p,
    130  1.44       dsl 	struct pci_memreg *self, u_int addr, u_int size, u_int what);
    131   1.1       leo 
    132  1.51   tsutsui CFATTACH_DECL_NEW(pcib, 0,
    133  1.38   thorpej     pcibusmatch, pcibusattach, NULL, NULL);
    134   1.1       leo 
    135  1.27       leo /*
    136  1.27       leo  * We need some static storage to probe pci-busses for VGA cards during
    137  1.27       leo  * early console init.
    138  1.27       leo  */
    139  1.27       leo static struct atari_bus_space	bs_storage[2];	/* 1 iot, 1 memt */
    140  1.27       leo 
    141   1.1       leo int
    142  1.51   tsutsui pcibusmatch(device_t parent, cfdata_t cf, void *aux)
    143   1.1       leo {
    144  1.26       leo 	static int	nmatched = 0;
    145  1.26       leo 
    146  1.51   tsutsui 	if (strcmp((char *)aux, "pcib"))
    147  1.48   tsutsui 		return 0;	/* Wrong number... */
    148  1.26       leo 
    149  1.48   tsutsui 	if (atari_realconfig == 0)
    150  1.48   tsutsui 		return 1;
    151  1.27       leo 
    152  1.31       leo 	if (machineid & (ATARI_HADES|ATARI_MILAN)) {
    153  1.26       leo 		/*
    154  1.31       leo 		 * Both Hades and Milan have only one pci bus
    155  1.26       leo 		 */
    156  1.26       leo 		if (nmatched)
    157  1.48   tsutsui 			return 0;
    158  1.26       leo 		nmatched++;
    159  1.48   tsutsui 		return 1;
    160  1.26       leo 	}
    161  1.48   tsutsui 	return 0;
    162   1.1       leo }
    163   1.1       leo 
    164   1.1       leo void
    165  1.51   tsutsui pcibusattach(device_t parent, device_t self, void *aux)
    166   1.1       leo {
    167   1.1       leo 	struct pcibus_attach_args	pba;
    168   1.1       leo 
    169   1.4       leo 	pba.pba_pc      = NULL;
    170   1.1       leo 	pba.pba_bus     = 0;
    171  1.35   thorpej 	pba.pba_bridgetag = NULL;
    172  1.50    dyoung 	pba.pba_flags	= PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY;
    173  1.30       leo 	pba.pba_dmat	= &pci_bus_dma_tag;
    174  1.27       leo 	pba.pba_iot     = leb_alloc_bus_space_tag(&bs_storage[0]);
    175  1.29       leo 	pba.pba_memt    = leb_alloc_bus_space_tag(&bs_storage[1]);
    176  1.11       leo 	if ((pba.pba_iot == NULL) || (pba.pba_memt == NULL)) {
    177  1.11       leo 		printf("leb_alloc_bus_space_tag failed!\n");
    178  1.11       leo 		return;
    179  1.11       leo 	}
    180  1.11       leo 	pba.pba_iot->base  = PCI_IO_PHYS;
    181  1.11       leo 	pba.pba_memt->base = PCI_MEM_PHYS;
    182   1.6       leo 
    183  1.51   tsutsui 	if (self == NULL) {
    184  1.27       leo 		/*
    185  1.27       leo 		 * Scan the bus for a VGA-card that we support. If we
    186  1.27       leo 		 * find one, try to initialize it to a 'standard' text
    187  1.27       leo 		 * mode (80x25).
    188  1.27       leo 		 */
    189  1.32       leo 		check_for_vga(pba.pba_iot, pba.pba_memt);
    190  1.27       leo 		return;
    191  1.27       leo 	}
    192  1.27       leo 
    193  1.27       leo 	enable_pci_devices();
    194  1.27       leo 
    195  1.31       leo #if defined(_ATARIHW_)
    196   1.9       leo 	MFP2->mf_aer &= ~(0x27); /* PCI interrupts: HIGH -> LOW */
    197  1.31       leo #endif
    198   1.9       leo 
    199   1.6       leo 	printf("\n");
    200   1.1       leo 
    201  1.51   tsutsui 	config_found_ia(self, "pcibus", &pba, ataripcibusprint);
    202   1.1       leo }
    203   1.1       leo 
    204   1.1       leo int
    205  1.51   tsutsui ataripcibusprint(void *aux, const char *name)
    206   1.1       leo {
    207  1.48   tsutsui 
    208  1.48   tsutsui 	if (name == NULL)
    209  1.48   tsutsui 		return UNCONF;
    210  1.48   tsutsui 	return QUIET;
    211   1.1       leo }
    212   1.1       leo 
    213   1.1       leo void
    214  1.51   tsutsui pci_attach_hook(device_t parent, device_t self, struct pcibus_attach_args *pba)
    215   1.1       leo {
    216   1.1       leo }
    217   1.1       leo 
    218   1.1       leo /*
    219   1.9       leo  * Initialize the PCI-bus. The Atari-BIOS does not do this, so....
    220  1.14    thomas  * We only disable all devices here. Memory and I/O enabling is done
    221  1.14    thomas  * later at pcibusattach.
    222   1.9       leo  */
    223   1.9       leo void
    224  1.47    cegger init_pci_bus(void)
    225   1.9       leo {
    226   1.9       leo 	pci_chipset_tag_t	pc = NULL; /* XXX */
    227   1.9       leo 	pcitag_t		tag;
    228  1.14    thomas 	pcireg_t		csr;
    229  1.14    thomas 	int			device, id, maxndevs;
    230   1.9       leo 
    231  1.14    thomas 	tag   = 0;
    232  1.14    thomas 	id    = 0;
    233   1.9       leo 
    234   1.9       leo 	maxndevs = pci_bus_maxdevs(pc, 0);
    235   1.9       leo 
    236   1.9       leo 	for (device = 0; device < maxndevs; device++) {
    237   1.9       leo 
    238   1.9       leo 		tag = pci_make_tag(pc, 0, device, 0);
    239   1.9       leo 		id  = pci_conf_read(pc, tag, PCI_ID_REG);
    240   1.9       leo 		if (id == 0 || id == 0xffffffff)
    241   1.9       leo 			continue;
    242   1.9       leo 
    243  1.14    thomas 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    244  1.14    thomas 		csr &= ~(PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
    245  1.14    thomas 		csr &= ~PCI_COMMAND_MASTER_ENABLE;
    246  1.14    thomas 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    247  1.14    thomas 	}
    248  1.14    thomas }
    249  1.14    thomas 
    250  1.14    thomas /*
    251  1.14    thomas  * insert a new element in an existing list that the ID's (size in struct
    252  1.14    thomas  * pci_memreg) are sorted.
    253  1.14    thomas  */
    254  1.14    thomas static void
    255  1.45       dsl insert_into_list(PCI_MEMREG *head, struct pci_memreg *elem)
    256  1.14    thomas {
    257  1.14    thomas     struct pci_memreg *p, *q;
    258  1.14    thomas 
    259  1.14    thomas     p = LIST_FIRST(head);
    260  1.14    thomas     q = NULL;
    261  1.14    thomas 
    262  1.14    thomas     for (; p != NULL && p->size < elem->size; q = p, p = LIST_NEXT(p, link));
    263  1.14    thomas 
    264  1.14    thomas     if (q == NULL) {
    265  1.14    thomas 	LIST_INSERT_HEAD(head, elem, link);
    266  1.14    thomas     } else {
    267  1.14    thomas 	LIST_INSERT_AFTER(q, elem, link);
    268  1.14    thomas     }
    269  1.14    thomas }
    270  1.14    thomas 
    271  1.14    thomas /*
    272  1.14    thomas  * Test if a new selected area overlaps with an already (probably preselected)
    273  1.14    thomas  * pci area.
    274  1.14    thomas  */
    275  1.14    thomas static int
    276  1.46       dsl overlap_pci_areas(struct pci_memreg *p, struct pci_memreg *self, u_int addr, u_int size, u_int what)
    277  1.14    thomas {
    278  1.14    thomas     struct pci_memreg *q;
    279  1.14    thomas 
    280  1.14    thomas     if (p == NULL)
    281  1.14    thomas 	return 0;
    282  1.14    thomas 
    283  1.14    thomas     q = p;
    284  1.14    thomas     while (q != NULL) {
    285  1.31       leo       if ((q != self) && (q->csr & what)) {
    286  1.31       leo 	if ((addr >= q->address) && (addr < (q->address + q->size))) {
    287  1.14    thomas #ifdef DEBUG_PCI_MACHDEP
    288  1.31       leo 	  printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
    289  1.14    thomas 			self->dev, self->reg, q->dev, q->reg);
    290  1.14    thomas #endif
    291  1.31       leo 	  return 1;
    292  1.31       leo 	}
    293  1.31       leo 	if ((q->address >= addr) && (q->address < (addr + size))) {
    294  1.14    thomas #ifdef DEBUG_PCI_MACHDEP
    295  1.31       leo 	  printf("\noverlap area dev %d reg 0x%02x with dev %d reg 0x%02x",
    296  1.14    thomas 			self->dev, self->reg, q->dev, q->reg);
    297  1.14    thomas #endif
    298  1.31       leo 	  return 1;
    299  1.14    thomas 	}
    300  1.31       leo       }
    301  1.31       leo       q = LIST_NEXT(q, link);
    302  1.14    thomas     }
    303  1.14    thomas     return 0;
    304  1.14    thomas }
    305  1.14    thomas 
    306  1.14    thomas /*
    307  1.14    thomas  * Enable memory and I/O on pci devices. Care about already enabled devices
    308  1.14    thomas  * (probabaly by the console driver).
    309  1.14    thomas  *
    310  1.14    thomas  * The idea behind the following code is:
    311  1.14    thomas  * We build a by sizes sorted list of the requirements of the different
    312  1.14    thomas  * pci devices. After that we choose the start addresses of that areas
    313  1.14    thomas  * in such a way that they are placed as closed as possible together.
    314  1.14    thomas  */
    315  1.14    thomas static void
    316  1.47    cegger enable_pci_devices(void)
    317  1.14    thomas {
    318  1.14    thomas     PCI_MEMREG memlist;
    319  1.14    thomas     PCI_MEMREG iolist;
    320  1.14    thomas     struct pci_memreg *p, *q;
    321  1.14    thomas     int dev, reg, id, class;
    322  1.14    thomas     pcitag_t tag;
    323  1.14    thomas     pcireg_t csr, address, mask;
    324  1.14    thomas     pci_chipset_tag_t pc;
    325  1.14    thomas     int sizecnt, membase_1m;
    326  1.14    thomas 
    327  1.14    thomas     pc = 0;
    328  1.14    thomas     csr = 0;
    329  1.14    thomas     tag = 0;
    330  1.14    thomas 
    331  1.14    thomas     LIST_INIT(&memlist);
    332  1.14    thomas     LIST_INIT(&iolist);
    333  1.14    thomas 
    334  1.14    thomas     /*
    335  1.14    thomas      * first step: go through all devices and gather memory and I/O
    336  1.14    thomas      * sizes
    337  1.14    thomas      */
    338  1.14    thomas     for (dev = 0; dev < pci_bus_maxdevs(pc,0); dev++) {
    339  1.14    thomas 
    340  1.14    thomas 	tag = pci_make_tag(pc, 0, dev, 0);
    341  1.14    thomas 	id  = pci_conf_read(pc, tag, PCI_ID_REG);
    342  1.14    thomas 	if (id == 0 || id == 0xffffffff)
    343  1.14    thomas 	    continue;
    344  1.14    thomas 
    345  1.14    thomas 	csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    346  1.14    thomas 
    347  1.14    thomas 	/*
    348  1.14    thomas 	 * special case: if a display card is found and memory is enabled
    349  1.14    thomas 	 * preserve 128k at 0xa0000 as vga memory.
    350  1.18       leo 	 * XXX: if a display card is found without being enabled, leave
    351  1.18       leo 	 *      it alone! You will usually only create conflicts by enabeling
    352  1.18       leo 	 *      it.
    353  1.14    thomas 	 */
    354  1.14    thomas 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
    355  1.14    thomas 	switch (PCI_CLASS(class)) {
    356  1.14    thomas 	    case PCI_CLASS_PREHISTORIC:
    357  1.14    thomas 	    case PCI_CLASS_DISPLAY:
    358  1.18       leo 	      if (csr & (PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE)) {
    359  1.14    thomas 		    p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
    360  1.14    thomas 				M_TEMP, M_WAITOK);
    361  1.14    thomas 		    memset(p, '\0', sizeof(struct pci_memreg));
    362  1.14    thomas 		    p->dev = dev;
    363  1.14    thomas 		    p->csr = csr;
    364  1.14    thomas 		    p->tag = tag;
    365  1.14    thomas 		    p->reg = 0;     /* there is no register about this */
    366  1.14    thomas 		    p->size = 0x20000;  /* 128kByte */
    367  1.14    thomas 		    p->mask = 0xfffe0000;
    368  1.14    thomas 		    p->address = 0xa0000;
    369  1.14    thomas 
    370  1.14    thomas 		    insert_into_list(&memlist, p);
    371  1.18       leo 	      }
    372  1.18       leo 	      else continue;
    373   1.9       leo 	}
    374   1.9       leo 
    375  1.14    thomas 	for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
    376  1.14    thomas 
    377  1.14    thomas 	    address = pci_conf_read(pc, tag, reg);
    378  1.14    thomas 	    pci_conf_write(pc, tag, reg, 0xffffffff);
    379  1.14    thomas 	    mask    = pci_conf_read(pc, tag, reg);
    380  1.14    thomas 	    pci_conf_write(pc, tag, reg, address);
    381  1.14    thomas 	    if (mask == 0)
    382  1.14    thomas 		continue; /* Register unused */
    383  1.14    thomas 
    384  1.14    thomas 	    p = (struct pci_memreg *)malloc(sizeof(struct pci_memreg),
    385  1.14    thomas 			M_TEMP, M_WAITOK);
    386  1.14    thomas 	    memset(p, '\0', sizeof(struct pci_memreg));
    387  1.14    thomas 	    p->dev = dev;
    388  1.14    thomas 	    p->csr = csr;
    389  1.14    thomas 	    p->tag = tag;
    390  1.14    thomas 	    p->reg = reg;
    391  1.14    thomas 	    p->mask = mask;
    392  1.14    thomas 	    p->address = 0;
    393  1.14    thomas 
    394  1.14    thomas 	    if (mask & PCI_MAPREG_TYPE_IO) {
    395  1.14    thomas 		p->size = PCI_MAPREG_IO_SIZE(mask);
    396  1.14    thomas 
    397  1.14    thomas 		/*
    398  1.20    thomas 		 * Align IO if necessary
    399  1.20    thomas 		 */
    400  1.20    thomas 		if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_IO_ALIGN_MASK)) {
    401  1.20    thomas 		    p->mask = PCI_MACHDEP_IO_ALIGN_MASK;
    402  1.20    thomas 		    p->size = PCI_MAPREG_IO_SIZE(p->mask);
    403  1.20    thomas 		}
    404  1.20    thomas 
    405  1.20    thomas 		/*
    406  1.14    thomas 		 * if I/O is already enabled (probably by the console driver)
    407  1.14    thomas 		 * save the address in order to take care about it later.
    408  1.14    thomas 		 */
    409  1.14    thomas 		if (csr & PCI_COMMAND_IO_ENABLE)
    410  1.14    thomas 		    p->address = address;
    411  1.14    thomas 
    412  1.14    thomas 		insert_into_list(&iolist, p);
    413  1.14    thomas 	    } else {
    414  1.14    thomas 		p->size = PCI_MAPREG_MEM_SIZE(mask);
    415  1.14    thomas 
    416  1.14    thomas 		/*
    417  1.20    thomas 		 * Align memory if necessary
    418  1.20    thomas 		 */
    419  1.20    thomas 		if (p->size < PCI_MAPREG_IO_SIZE(PCI_MACHDEP_MEM_ALIGN_MASK)) {
    420  1.20    thomas 		    p->mask = PCI_MACHDEP_MEM_ALIGN_MASK;
    421  1.20    thomas 		    p->size = PCI_MAPREG_MEM_SIZE(p->mask);
    422  1.20    thomas 		}
    423  1.20    thomas 
    424  1.20    thomas 		/*
    425  1.14    thomas 		 * if memory is already enabled (probably by the console driver)
    426  1.14    thomas 		 * save the address in order to take care about it later.
    427  1.14    thomas 		 */
    428  1.14    thomas 		if (csr & PCI_COMMAND_MEM_ENABLE)
    429  1.14    thomas 		    p->address = address;
    430  1.14    thomas 
    431  1.14    thomas 		insert_into_list(&memlist, p);
    432   1.9       leo 
    433  1.14    thomas 		if (PCI_MAPREG_MEM_TYPE(mask) == PCI_MAPREG_MEM_TYPE_64BIT)
    434  1.14    thomas 		    reg++;
    435  1.14    thomas 	    }
    436  1.14    thomas 	}
    437   1.9       leo 
    438  1.33       leo 
    439  1.33       leo #if defined(_ATARIHW_)
    440  1.14    thomas 	/*
    441  1.14    thomas 	 * Both interrupt pin & line are set to the device (== slot)
    442  1.33       leo 	 * number. This makes sense on the atari Hades because the
    443  1.14    thomas 	 * individual slots are hard-wired to a specific MFP-pin.
    444  1.14    thomas 	 */
    445  1.19       leo 	csr  = (DEV2SLOT(dev) << PCI_INTERRUPT_PIN_SHIFT);
    446  1.19       leo 	csr |= (DEV2SLOT(dev) << PCI_INTERRUPT_LINE_SHIFT);
    447  1.14    thomas 	pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
    448  1.33       leo #else
    449  1.33       leo 	/*
    450  1.33       leo 	 * On the Milan, we accept the BIOS's choice.
    451  1.33       leo 	 */
    452  1.33       leo #endif
    453  1.14    thomas     }
    454  1.14    thomas 
    455  1.14    thomas     /*
    456  1.41       wiz      * second step: calculate the memory and I/O addresses beginning from
    457  1.14    thomas      * PCI_MEM_START and PCI_IO_START. Care about already mapped areas.
    458  1.14    thomas      *
    459  1.25       leo      * begin with memory list
    460  1.14    thomas      */
    461  1.14    thomas 
    462  1.14    thomas     address = PCI_MEM_START;
    463  1.14    thomas     sizecnt = 0;
    464  1.14    thomas     membase_1m = 0;
    465  1.14    thomas     p = LIST_FIRST(&memlist);
    466  1.14    thomas     while (p != NULL) {
    467  1.14    thomas 	if (!(p->csr & PCI_COMMAND_MEM_ENABLE)) {
    468  1.14    thomas 	    if (PCI_MAPREG_MEM_TYPE(p->mask) == PCI_MAPREG_MEM_TYPE_32BIT_1M) {
    469  1.14    thomas 		if (p->size > membase_1m)
    470  1.14    thomas 		    membase_1m = p->size;
    471  1.14    thomas 		do {
    472  1.14    thomas 		    p->address = membase_1m;
    473  1.14    thomas 		    membase_1m += p->size;
    474  1.14    thomas 		} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
    475  1.14    thomas 					   p->size, PCI_COMMAND_MEM_ENABLE));
    476  1.14    thomas 		if (membase_1m > 0x00100000) {
    477  1.14    thomas 		    /*
    478  1.14    thomas 		     * Should we panic here?
    479  1.14    thomas 		     */
    480  1.14    thomas 		    printf("\npcibus0: dev %d reg %d: memory not configured",
    481  1.14    thomas 			    p->dev, p->reg);
    482  1.14    thomas 		    p->reg = 0;
    483   1.9       leo 		}
    484  1.14    thomas 	    } else {
    485   1.9       leo 
    486  1.14    thomas 		if (sizecnt && (p->size > sizecnt))
    487  1.14    thomas 		    sizecnt = ((p->size + sizecnt) & p->mask) &
    488  1.14    thomas 			      PCI_MAPREG_MEM_ADDR_MASK;
    489  1.14    thomas 		if (sizecnt > address) {
    490  1.14    thomas 		    address = sizecnt;
    491  1.14    thomas 		    sizecnt = 0;
    492  1.14    thomas 		}
    493   1.9       leo 
    494  1.14    thomas 		do {
    495  1.14    thomas 		    p->address = address + sizecnt;
    496  1.14    thomas 		    sizecnt += p->size;
    497  1.14    thomas 		} while (overlap_pci_areas(LIST_FIRST(&memlist), p, p->address,
    498  1.14    thomas 					   p->size, PCI_COMMAND_MEM_ENABLE));
    499  1.14    thomas 
    500  1.14    thomas 		if ((address + sizecnt) > PCI_MEM_END) {
    501  1.14    thomas 		    /*
    502  1.14    thomas 		     * Should we panic here?
    503  1.14    thomas 		     */
    504  1.14    thomas 		    printf("\npcibus0: dev %d reg %d: memory not configured",
    505  1.14    thomas 			    p->dev, p->reg);
    506  1.14    thomas 		    p->reg = 0;
    507  1.14    thomas 		}
    508  1.14    thomas 	    }
    509  1.14    thomas 	    if (p->reg > 0) {
    510  1.14    thomas 		pci_conf_write(pc, p->tag, p->reg, p->address);
    511  1.14    thomas 		csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
    512  1.14    thomas 		csr |= PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    513  1.14    thomas 		pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
    514  1.20    thomas 		p->csr = csr;
    515  1.14    thomas 	    }
    516  1.14    thomas 	}
    517  1.14    thomas 	p = LIST_NEXT(p, link);
    518  1.14    thomas     }
    519   1.9       leo 
    520  1.14    thomas     /*
    521  1.14    thomas      * now the I/O list
    522  1.14    thomas      */
    523  1.14    thomas 
    524  1.14    thomas     address = PCI_IO_START;
    525  1.14    thomas     sizecnt = 0;
    526  1.14    thomas     p = LIST_FIRST(&iolist);
    527  1.14    thomas     while (p != NULL) {
    528  1.14    thomas 	if (!(p->csr & PCI_COMMAND_IO_ENABLE)) {
    529  1.14    thomas 
    530  1.14    thomas 	    if (sizecnt && (p->size > sizecnt))
    531  1.14    thomas 		sizecnt = ((p->size + sizecnt) & p->mask) &
    532  1.14    thomas 			  PCI_MAPREG_IO_ADDR_MASK;
    533  1.14    thomas 	    if (sizecnt > address) {
    534  1.14    thomas 		address = sizecnt;
    535  1.14    thomas 		sizecnt = 0;
    536  1.14    thomas 	    }
    537  1.14    thomas 
    538  1.14    thomas 	    do {
    539  1.14    thomas 		p->address = address + sizecnt;
    540  1.14    thomas 		sizecnt += p->size;
    541  1.14    thomas 	    } while (overlap_pci_areas(LIST_FIRST(&iolist), p, p->address,
    542  1.14    thomas 				       p->size, PCI_COMMAND_IO_ENABLE));
    543   1.9       leo 
    544  1.14    thomas 	    if ((address + sizecnt) > PCI_IO_END) {
    545   1.9       leo 		/*
    546  1.14    thomas 		 * Should we panic here?
    547   1.9       leo 		 */
    548  1.14    thomas 		printf("\npcibus0: dev %d reg %d: io not configured",
    549  1.14    thomas 			p->dev, p->reg);
    550  1.14    thomas 	    } else {
    551  1.14    thomas 		pci_conf_write(pc, p->tag, p->reg, p->address);
    552  1.14    thomas 		csr = pci_conf_read(pc, p->tag, PCI_COMMAND_STATUS_REG);
    553  1.14    thomas 		csr |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    554  1.14    thomas 		pci_conf_write(pc, p->tag, PCI_COMMAND_STATUS_REG, csr);
    555  1.20    thomas 		p->csr = csr;
    556  1.14    thomas 	    }
    557   1.9       leo 	}
    558  1.14    thomas 	p = LIST_NEXT(p, link);
    559  1.14    thomas     }
    560  1.14    thomas 
    561  1.14    thomas #ifdef DEBUG_PCI_MACHDEP
    562  1.14    thomas     printf("\nI/O List:\n");
    563  1.14    thomas     p = LIST_FIRST(&iolist);
    564  1.14    thomas 
    565  1.14    thomas     while (p != NULL) {
    566  1.14    thomas 	printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
    567  1.14    thomas 			p->reg, p->size, p->address);
    568  1.14    thomas 	p = LIST_NEXT(p, link);
    569  1.14    thomas     }
    570  1.14    thomas     printf("\nMemlist:");
    571  1.14    thomas     p = LIST_FIRST(&memlist);
    572  1.14    thomas 
    573  1.14    thomas     while (p != NULL) {
    574  1.14    thomas 	printf("\ndev: %d, reg: 0x%02x, size: 0x%08x, addr: 0x%08x", p->dev,
    575  1.14    thomas 			p->reg, p->size, p->address);
    576  1.14    thomas 	p = LIST_NEXT(p, link);
    577  1.14    thomas     }
    578  1.14    thomas #endif
    579  1.14    thomas 
    580  1.14    thomas     /*
    581  1.14    thomas      * Free the lists
    582  1.14    thomas      */
    583  1.14    thomas     p = LIST_FIRST(&iolist);
    584  1.14    thomas     while (p != NULL) {
    585  1.14    thomas 	q = p;
    586  1.14    thomas 	LIST_REMOVE(q, link);
    587  1.14    thomas 	free(p, M_WAITOK);
    588  1.14    thomas 	p = LIST_FIRST(&iolist);
    589  1.14    thomas     }
    590  1.14    thomas     p = LIST_FIRST(&memlist);
    591  1.14    thomas     while (p != NULL) {
    592  1.14    thomas 	q = p;
    593  1.14    thomas 	LIST_REMOVE(q, link);
    594  1.14    thomas 	free(p, M_WAITOK);
    595  1.14    thomas 	p = LIST_FIRST(&memlist);
    596  1.14    thomas     }
    597   1.9       leo }
    598   1.9       leo 
    599   1.1       leo pcitag_t
    600  1.46       dsl pci_make_tag(pci_chipset_tag_t pc, int bus, int device, int function)
    601   1.1       leo {
    602  1.48   tsutsui 
    603  1.48   tsutsui 	return (bus << 16) | (device << 11) | (function << 8);
    604  1.34   thorpej }
    605  1.34   thorpej 
    606  1.34   thorpej void
    607  1.46       dsl pci_decompose_tag(pci_chipset_tag_t pc, pcitag_t tag, int *bp, int *dp, int *fp)
    608  1.34   thorpej {
    609  1.34   thorpej 
    610  1.34   thorpej 	if (bp != NULL)
    611  1.34   thorpej 		*bp = (tag >> 16) & 0xff;
    612  1.34   thorpej 	if (dp != NULL)
    613  1.34   thorpej 		*dp = (tag >> 11) & 0x1f;
    614  1.34   thorpej 	if (fp != NULL)
    615  1.34   thorpej 		*fp = (tag >> 8) & 0x7;
    616   1.1       leo }
    617   1.1       leo 
    618   1.1       leo int
    619  1.49    dyoung pci_intr_map(const struct pci_attach_args *pa, pci_intr_handle_t *ihp)
    620   1.1       leo {
    621  1.28  sommerfe 	int line = pa->pa_intrline;
    622  1.28  sommerfe 
    623  1.33       leo #if defined(_MILANHW_)
    624  1.33       leo 	/*
    625  1.33       leo 	 * On the Hades, the 'pin' info is useless.
    626  1.33       leo 	 */
    627  1.33       leo 	{
    628  1.33       leo 		int pin = pa->pa_intrpin;
    629  1.33       leo 
    630  1.33       leo 		if (pin == 0) {
    631  1.33       leo 			/* No IRQ used. */
    632  1.33       leo 			goto bad;
    633  1.33       leo 		}
    634  1.33       leo 		if (pin > PCI_INTERRUPT_PIN_MAX) {
    635  1.33       leo 			printf("pci_intr_map: bad interrupt pin %d\n", pin);
    636  1.33       leo 			goto bad;
    637  1.33       leo 		}
    638  1.33       leo 	}
    639  1.33       leo #endif /* _MILANHW_ */
    640  1.33       leo 
    641   1.9       leo 	/*
    642   1.9       leo 	 * According to the PCI-spec, 255 means `unknown' or `no connection'.
    643   1.9       leo 	 * Interpret this as 'no interrupt assigned'.
    644   1.9       leo 	 */
    645  1.33       leo 	if (line == 255)
    646  1.33       leo 		goto bad;
    647   1.9       leo 
    648   1.9       leo 	/*
    649  1.31       leo 	 * Values are pretty useless on the Hades since all interrupt
    650  1.31       leo 	 * lines for a card are tied together and hardwired to a
    651  1.31       leo 	 * specific TT-MFP I/O port.
    652  1.33       leo 	 * On the Milan, they are tied to the ICU.
    653   1.9       leo 	 */
    654  1.33       leo #if defined(_MILANHW_)
    655  1.33       leo 	if (line >= 16) {
    656  1.33       leo 		printf("pci_intr_map: bad interrupt line %d\n", line);
    657  1.33       leo 		goto bad;
    658  1.33       leo 	}
    659  1.33       leo 	if (line == 2) {
    660  1.33       leo 		printf("pci_intr_map: changed line 2 to line 9\n");
    661  1.33       leo 		line = 9;
    662  1.33       leo 	}
    663  1.33       leo 	/* Assume line == 0 means unassigned */
    664  1.33       leo 	if (line == 0)
    665  1.33       leo 		goto bad;
    666  1.33       leo #endif
    667   1.9       leo 	*ihp = line;
    668   1.9       leo 	return 0;
    669  1.33       leo 
    670  1.33       leo bad:
    671  1.33       leo 	*ihp = -1;
    672  1.33       leo 	return 1;
    673   1.1       leo }
    674   1.1       leo 
    675   1.1       leo const char *
    676  1.45       dsl pci_intr_string(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    677   1.1       leo {
    678   1.1       leo 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    679   1.1       leo 
    680   1.9       leo 	if (ih == -1)
    681  1.36    provos 		panic("pci_intr_string: bogus handle 0x%x", ih);
    682   1.1       leo 
    683   1.3  christos 	sprintf(irqstr, "irq %d", ih);
    684  1.48   tsutsui 	return irqstr;
    685   1.1       leo 
    686  1.22       cgd }
    687  1.22       cgd 
    688  1.22       cgd const struct evcnt *
    689  1.45       dsl pci_intr_evcnt(pci_chipset_tag_t pc, pci_intr_handle_t ih)
    690  1.22       cgd {
    691  1.22       cgd 
    692  1.22       cgd 	/* XXX for now, no evcnt parent reported */
    693  1.22       cgd 	return NULL;
    694   1.1       leo }
    695