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pci_machdep.c revision 1.9
      1  1.9       leo /*	$NetBSD: pci_machdep.c,v 1.9 1998/02/19 16:17:18 leo Exp $	*/
      2  1.1       leo 
      3  1.1       leo /*
      4  1.1       leo  * Copyright (c) 1996 Leo Weppelman.  All rights reserved.
      5  1.7       cgd  * Copyright (c) 1996, 1997 Christopher G. Demetriou.  All rights reserved.
      6  1.1       leo  * Copyright (c) 1994 Charles Hannum.  All rights reserved.
      7  1.1       leo  *
      8  1.1       leo  * Redistribution and use in source and binary forms, with or without
      9  1.1       leo  * modification, are permitted provided that the following conditions
     10  1.1       leo  * are met:
     11  1.1       leo  * 1. Redistributions of source code must retain the above copyright
     12  1.1       leo  *    notice, this list of conditions and the following disclaimer.
     13  1.1       leo  * 2. Redistributions in binary form must reproduce the above copyright
     14  1.1       leo  *    notice, this list of conditions and the following disclaimer in the
     15  1.1       leo  *    documentation and/or other materials provided with the distribution.
     16  1.1       leo  * 3. All advertising materials mentioning features or use of this software
     17  1.1       leo  *    must display the following acknowledgement:
     18  1.1       leo  *	This product includes software developed by Charles Hannum.
     19  1.1       leo  * 4. The name of the author may not be used to endorse or promote products
     20  1.1       leo  *    derived from this software without specific prior written permission.
     21  1.1       leo  *
     22  1.1       leo  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     23  1.1       leo  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     24  1.1       leo  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     25  1.1       leo  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     26  1.1       leo  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     27  1.1       leo  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     28  1.1       leo  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     29  1.1       leo  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     30  1.1       leo  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     31  1.1       leo  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     32  1.1       leo  */
     33  1.1       leo 
     34  1.1       leo #include <sys/types.h>
     35  1.1       leo #include <sys/param.h>
     36  1.1       leo #include <sys/time.h>
     37  1.1       leo #include <sys/systm.h>
     38  1.1       leo #include <sys/errno.h>
     39  1.1       leo #include <sys/device.h>
     40  1.1       leo 
     41  1.1       leo #include <vm/vm.h>
     42  1.1       leo #include <vm/vm_kern.h>
     43  1.1       leo 
     44  1.1       leo #include <dev/pci/pcivar.h>
     45  1.1       leo #include <dev/pci/pcireg.h>
     46  1.1       leo 
     47  1.1       leo #include <machine/cpu.h>
     48  1.1       leo #include <machine/iomap.h>
     49  1.9       leo #include <machine/mfp.h>
     50  1.1       leo #include <atari/atari/device.h>
     51  1.1       leo 
     52  1.9       leo /*
     53  1.9       leo  * I/O and memory we assume 'reserved' when an vga card is detected on
     54  1.9       leo  * the PCI-bus.
     55  1.9       leo  */
     56  1.9       leo #define MAX_VGA_MEM	0x1000000	/* 16 MB mem	*/
     57  1.9       leo #define MAX_VGA_IO	0x0010000	/* 64 KB io	*/
     58  1.9       leo 
     59  1.1       leo int	pcibusprint __P((void *auxp, const char *));
     60  1.5       leo int	pcibusmatch __P((struct device *, struct cfdata *, void *));
     61  1.1       leo void	pcibusattach __P((struct device *, struct device *, void *));
     62  1.1       leo 
     63  1.1       leo static int pci_config_offset __P((pcitag_t));
     64  1.1       leo 
     65  1.1       leo struct cfattach pcibus_ca = {
     66  1.1       leo 	sizeof(struct device), pcibusmatch, pcibusattach
     67  1.1       leo };
     68  1.1       leo 
     69  1.1       leo int
     70  1.5       leo pcibusmatch(pdp, cfp, auxp)
     71  1.1       leo struct device	*pdp;
     72  1.5       leo struct cfdata	*cfp;
     73  1.5       leo void		*auxp;
     74  1.1       leo {
     75  1.1       leo 	if(atari_realconfig == 0)
     76  1.1       leo 		return (0);
     77  1.1       leo 	if (strcmp((char *)auxp, "pcibus") || cfp->cf_unit != 0)
     78  1.1       leo 		return(0);
     79  1.1       leo 	return(machineid & ATARI_HADES ? 1 : 0);
     80  1.1       leo }
     81  1.1       leo 
     82  1.1       leo void
     83  1.1       leo pcibusattach(pdp, dp, auxp)
     84  1.1       leo struct device	*pdp, *dp;
     85  1.1       leo void		*auxp;
     86  1.1       leo {
     87  1.1       leo 	struct pcibus_attach_args	pba;
     88  1.1       leo 
     89  1.1       leo 	pba.pba_busname = "pci";
     90  1.4       leo 	pba.pba_pc      = NULL;
     91  1.1       leo 	pba.pba_bus     = 0;
     92  1.9       leo 	pba.pba_iot     = PCI_IO_PHYS;
     93  1.9       leo 	pba.pba_memt    = PCI_MEM_PHYS;
     94  1.7       cgd 	pba.pba_flags	= PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED;
     95  1.6       leo 
     96  1.9       leo 	MFP2->mf_aer &= ~(0x27); /* PCI interrupts: HIGH -> LOW */
     97  1.9       leo 
     98  1.6       leo 	printf("\n");
     99  1.1       leo 
    100  1.1       leo 	config_found(dp, &pba, pcibusprint);
    101  1.1       leo }
    102  1.1       leo 
    103  1.1       leo int
    104  1.1       leo pcibusprint(auxp, name)
    105  1.1       leo void		*auxp;
    106  1.1       leo const char	*name;
    107  1.1       leo {
    108  1.1       leo 	if(name == NULL)
    109  1.1       leo 		return(UNCONF);
    110  1.1       leo 	return(QUIET);
    111  1.1       leo }
    112  1.1       leo 
    113  1.1       leo void
    114  1.1       leo pci_attach_hook(parent, self, pba)
    115  1.1       leo 	struct device *parent, *self;
    116  1.1       leo 	struct pcibus_attach_args *pba;
    117  1.1       leo {
    118  1.1       leo }
    119  1.1       leo 
    120  1.1       leo /*
    121  1.9       leo  * Initialize the PCI-bus. The Atari-BIOS does not do this, so....
    122  1.9       leo  */
    123  1.9       leo void
    124  1.9       leo init_pci_bus()
    125  1.9       leo {
    126  1.9       leo 	pci_chipset_tag_t	pc = NULL; /* XXX */
    127  1.9       leo 	pcitag_t		tag;
    128  1.9       leo 	pcireg_t		csr, address, mask;
    129  1.9       leo 	int			device, id, class, maxndevs;
    130  1.9       leo 	int			reg;
    131  1.9       leo 	u_int32_t		membase, iobase;
    132  1.9       leo 
    133  1.9       leo 	tag        = 0;
    134  1.9       leo 	id = class = 0;
    135  1.9       leo 
    136  1.9       leo 	membase = iobase = 0;
    137  1.9       leo 
    138  1.9       leo 	maxndevs = pci_bus_maxdevs(pc, 0);
    139  1.9       leo 
    140  1.9       leo 	/*
    141  1.9       leo 	 * Scan the bus for prehistory (usually VGA) devices.
    142  1.9       leo 	 */
    143  1.9       leo 	for (device = 0; device < maxndevs; device++) {
    144  1.9       leo 
    145  1.9       leo 		tag = pci_make_tag(pc, 0, device, 0);
    146  1.9       leo 		id  = pci_conf_read(pc, tag, PCI_ID_REG);
    147  1.9       leo 		if (id == 0 || id == 0xffffffff)
    148  1.9       leo 			continue;
    149  1.9       leo 		class = pci_conf_read(pc, tag, PCI_CLASS_REG);
    150  1.9       leo 		switch (PCI_CLASS(class)) {
    151  1.9       leo 			case PCI_CLASS_PREHISTORIC:
    152  1.9       leo 			case PCI_CLASS_DISPLAY:
    153  1.9       leo 
    154  1.9       leo 				membase = MAX_VGA_MEM;
    155  1.9       leo 				iobase  = MAX_VGA_IO;
    156  1.9       leo 		}
    157  1.9       leo 	}
    158  1.9       leo 
    159  1.9       leo 	for (device = 0; device < maxndevs; device++) {
    160  1.9       leo 
    161  1.9       leo 		tag = pci_make_tag(pc, 0, device, 0);
    162  1.9       leo 		id  = pci_conf_read(pc, tag, PCI_ID_REG);
    163  1.9       leo 		if (id == 0 || id == 0xffffffff)
    164  1.9       leo 			continue;
    165  1.9       leo 
    166  1.9       leo 		class = pci_conf_read(pc, tag, PCI_CLASS_REG);
    167  1.9       leo 		switch (PCI_CLASS(class)) {
    168  1.9       leo 			case PCI_CLASS_PREHISTORIC:
    169  1.9       leo 			case PCI_CLASS_DISPLAY:
    170  1.9       leo 				/*
    171  1.9       leo 				 * XXX: We rely on the BIOS to do the
    172  1.9       leo 				 * right thing here. Eventually, we should
    173  1.9       leo 				 * take the initiative...
    174  1.9       leo 				 */
    175  1.9       leo 				continue;
    176  1.9       leo 		}
    177  1.9       leo 
    178  1.9       leo 		csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
    179  1.9       leo 		csr &= ~(PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
    180  1.9       leo 		csr &= ~PCI_COMMAND_MASTER_ENABLE;
    181  1.9       leo 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    182  1.9       leo 
    183  1.9       leo 		for (reg = PCI_MAPREG_START; reg < PCI_MAPREG_END; reg += 4) {
    184  1.9       leo 		    int	size, type;
    185  1.9       leo 
    186  1.9       leo 		    address = pci_conf_read(pc, tag, reg);
    187  1.9       leo 		    pci_conf_write(pc, tag, reg, 0xffffffff);
    188  1.9       leo 		    mask    = pci_conf_read(pc, tag, reg);
    189  1.9       leo 		    pci_conf_write(pc, tag, reg, address);
    190  1.9       leo 		    if (mask == 0)
    191  1.9       leo 			continue; /* Register unused */
    192  1.9       leo 
    193  1.9       leo 		    if (mask & PCI_MAPREG_TYPE_IO) {
    194  1.9       leo 			csr |= PCI_COMMAND_IO_ENABLE;
    195  1.9       leo 			address = PCI_MAPREG_IO_ADDR(mask);
    196  1.9       leo 			mask    = (~address << 1) | 1;
    197  1.9       leo 			size    = (mask & address) & 0xffffffff;
    198  1.9       leo 			address = iobase | PCI_MAPREG_TYPE_IO;
    199  1.9       leo 			iobase += roundup(size, 4096); /* XXX */
    200  1.9       leo 		    }
    201  1.9       leo 		    else {
    202  1.9       leo 			type = PCI_MAPREG_MEM_TYPE(address);
    203  1.9       leo 			switch (type) {
    204  1.9       leo 			    case PCI_MAPREG_MEM_TYPE_32BIT:
    205  1.9       leo 				break;
    206  1.9       leo 			    case PCI_MAPREG_MEM_TYPE_64BIT:
    207  1.9       leo 				reg++;
    208  1.9       leo 			    case PCI_MAPREG_MEM_TYPE_32BIT_1M:
    209  1.9       leo 				/*
    210  1.9       leo 				 * XXX: We can do better here!
    211  1.9       leo 				 */
    212  1.9       leo 				if (membase >= 0x100000)
    213  1.9       leo 					continue;
    214  1.9       leo 			}
    215  1.9       leo 			csr |= PCI_COMMAND_MEM_ENABLE;
    216  1.9       leo 			size = PCI_MAPREG_MEM_SIZE(mask);
    217  1.9       leo 			address = membase | PCI_MAPREG_TYPE_MEM;
    218  1.9       leo 			membase += roundup(size, 4096); /* XXX */
    219  1.9       leo 		    }
    220  1.9       leo 		    pci_conf_write(pc, tag, reg, address);
    221  1.9       leo 		}
    222  1.9       leo 		csr |= PCI_COMMAND_MASTER_ENABLE;
    223  1.9       leo 		pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
    224  1.9       leo 
    225  1.9       leo 		/*
    226  1.9       leo 		 * Both interrupt pin & line are set to the device (== slot)
    227  1.9       leo 		 * number. This makes sense on the atari because the
    228  1.9       leo 		 * individual slots are hard-wired to a specific MFP-pin.
    229  1.9       leo 		 */
    230  1.9       leo 		csr  = (device << PCI_INTERRUPT_PIN_SHIFT);
    231  1.9       leo 		csr |= (device << PCI_INTERRUPT_LINE_SHIFT);
    232  1.9       leo 		pci_conf_write(pc, tag, PCI_INTERRUPT_REG, csr);
    233  1.9       leo 	}
    234  1.9       leo }
    235  1.9       leo 
    236  1.9       leo /*
    237  1.1       leo  * Atari_init.c maps the config areas NBPG bytes apart....
    238  1.1       leo  */
    239  1.1       leo static int pci_config_offset(tag)
    240  1.1       leo pcitag_t	tag;
    241  1.1       leo {
    242  1.1       leo 	int	device;
    243  1.1       leo 
    244  1.1       leo 	device = (tag >> 11) & 0x1f;
    245  1.1       leo 	return(device * NBPG);
    246  1.1       leo }
    247  1.1       leo 
    248  1.1       leo int
    249  1.1       leo pci_bus_maxdevs(pc, busno)
    250  1.1       leo 	pci_chipset_tag_t pc;
    251  1.1       leo 	int busno;
    252  1.1       leo {
    253  1.1       leo 	return (4);
    254  1.1       leo }
    255  1.1       leo 
    256  1.1       leo pcitag_t
    257  1.1       leo pci_make_tag(pc, bus, device, function)
    258  1.1       leo 	pci_chipset_tag_t pc;
    259  1.1       leo 	int bus, device, function;
    260  1.1       leo {
    261  1.1       leo 	return ((bus << 16) | (device << 11) | (function << 8));
    262  1.1       leo }
    263  1.1       leo 
    264  1.1       leo pcireg_t
    265  1.1       leo pci_conf_read(pc, tag, reg)
    266  1.1       leo 	pci_chipset_tag_t pc;
    267  1.1       leo 	pcitag_t tag;
    268  1.1       leo 	int reg;
    269  1.1       leo {
    270  1.1       leo 	u_long	data;
    271  1.1       leo 
    272  1.1       leo 	data = *(u_long *)(pci_conf_addr + pci_config_offset(tag) + reg);
    273  1.9       leo 	return (bswap32(data));
    274  1.1       leo }
    275  1.1       leo 
    276  1.1       leo void
    277  1.1       leo pci_conf_write(pc, tag, reg, data)
    278  1.1       leo 	pci_chipset_tag_t pc;
    279  1.1       leo 	pcitag_t tag;
    280  1.1       leo 	int reg;
    281  1.1       leo 	pcireg_t data;
    282  1.1       leo {
    283  1.9       leo 	*((u_long *)(pci_conf_addr + pci_config_offset(tag) + reg))
    284  1.9       leo 		= bswap32(data);
    285  1.1       leo }
    286  1.1       leo 
    287  1.1       leo int
    288  1.1       leo pci_intr_map(pc, intrtag, pin, line, ihp)
    289  1.1       leo 	pci_chipset_tag_t pc;
    290  1.1       leo 	pcitag_t intrtag;
    291  1.1       leo 	int pin, line;
    292  1.1       leo 	pci_intr_handle_t *ihp;
    293  1.1       leo {
    294  1.9       leo 	/*
    295  1.9       leo 	 * According to the PCI-spec, 255 means `unknown' or `no connection'.
    296  1.9       leo 	 * Interpret this as 'no interrupt assigned'.
    297  1.9       leo 	 */
    298  1.9       leo 	if (line == 255) {
    299  1.9       leo 		*ihp = -1;
    300  1.9       leo 		return 1;
    301  1.9       leo 	}
    302  1.9       leo 
    303  1.9       leo 	/*
    304  1.9       leo 	 * Values are pretty useless because the on the Hades all interrupt
    305  1.9       leo 	 * lines for a card are tied together and hardwired to the TT-MFP
    306  1.9       leo 	 * I/O port.
    307  1.9       leo 	 */
    308  1.9       leo 	*ihp = line;
    309  1.9       leo 	return 0;
    310  1.1       leo }
    311  1.1       leo 
    312  1.1       leo const char *
    313  1.1       leo pci_intr_string(pc, ih)
    314  1.1       leo 	pci_chipset_tag_t pc;
    315  1.1       leo 	pci_intr_handle_t ih;
    316  1.1       leo {
    317  1.1       leo 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    318  1.1       leo 
    319  1.9       leo 	if (ih == -1)
    320  1.1       leo 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
    321  1.1       leo 
    322  1.3  christos 	sprintf(irqstr, "irq %d", ih);
    323  1.1       leo 	return (irqstr);
    324  1.1       leo 
    325  1.1       leo }
    326  1.1       leo 
    327  1.9       leo /*
    328  1.9       leo  * The interrupt stuff is rather ugly. On the Hades, all interrupt lines
    329  1.9       leo  * for a slot are wired together and connected to IO 0,1,2 or 5 (slots:
    330  1.9       leo  * (0-3) on the TT-MFP. The Pci-config code initializes the irq. number
    331  1.9       leo  * to the slot position.
    332  1.9       leo  */
    333  1.9       leo static pci_intr_info_t iinfo[4] = { { -1 }, { -1 }, { -1 }, { -1 } };
    334  1.9       leo 
    335  1.9       leo static int	iifun __P((int, int));
    336  1.9       leo 
    337  1.9       leo static int
    338  1.9       leo iifun(slot, sr)
    339  1.9       leo int	slot;
    340  1.9       leo int	sr;
    341  1.9       leo {
    342  1.9       leo 	pci_intr_info_t *iinfo_p;
    343  1.9       leo 	int		s;
    344  1.9       leo 
    345  1.9       leo 	iinfo_p = &iinfo[slot];
    346  1.9       leo 
    347  1.9       leo 	/*
    348  1.9       leo 	 * Disable the interrupts
    349  1.9       leo 	 */
    350  1.9       leo 	MFP2->mf_imrb  &= ~iinfo_p->imask;
    351  1.9       leo 
    352  1.9       leo 	if ((sr & PSL_IPL) >= iinfo_p->ipl) {
    353  1.9       leo 		/*
    354  1.9       leo 		 * We're running at a too high priority now.
    355  1.9       leo 		 */
    356  1.9       leo 		add_sicallback((si_farg)iifun, (void*)slot, 0);
    357  1.9       leo 	}
    358  1.9       leo 	else {
    359  1.9       leo 		s = splx(iinfo_p->ipl);
    360  1.9       leo 		(void) (iinfo_p->ifunc)(iinfo_p->iarg);
    361  1.9       leo 		splx(s);
    362  1.9       leo 
    363  1.9       leo 		/*
    364  1.9       leo 		 * Re-enable interrupts after handling
    365  1.9       leo 		 */
    366  1.9       leo 		MFP2->mf_imrb |= iinfo_p->imask;
    367  1.9       leo 	}
    368  1.9       leo 	return 1;
    369  1.9       leo }
    370  1.9       leo 
    371  1.1       leo void *
    372  1.9       leo pci_intr_establish(pc, ih, level, ih_fun, ih_arg)
    373  1.9       leo 	pci_chipset_tag_t	pc;
    374  1.9       leo 	pci_intr_handle_t	ih;
    375  1.9       leo 	int			level;
    376  1.9       leo 	int			(*ih_fun) __P((void *));
    377  1.9       leo 	void			*ih_arg;
    378  1.9       leo {
    379  1.9       leo 	pci_intr_info_t *iinfo_p;
    380  1.9       leo 	struct intrhand	*ihand;
    381  1.9       leo 	int		slot;
    382  1.9       leo 
    383  1.9       leo 	slot    = ih;
    384  1.9       leo 	iinfo_p = &iinfo[slot];
    385  1.9       leo 
    386  1.9       leo 	if (iinfo_p->ipl > 0)
    387  1.9       leo 	    panic("pci_intr_establish: interrupt was already established\n");
    388  1.9       leo 
    389  1.9       leo 	ihand = intr_establish((slot == 3) ? 23 : 16 + slot, USER_VEC, 0,
    390  1.9       leo 				(hw_ifun_t)iifun, (void *)slot);
    391  1.9       leo 	if (ihand != NULL) {
    392  1.9       leo 		iinfo_p->ipl   = level;
    393  1.9       leo 		iinfo_p->imask = (slot == 3) ? 0x80 : (0x01 << slot);
    394  1.9       leo 		iinfo_p->ifunc = ih_fun;
    395  1.9       leo 		iinfo_p->iarg  = ih_arg;
    396  1.9       leo 		iinfo_p->ihand = ihand;
    397  1.9       leo 
    398  1.9       leo 		/*
    399  1.9       leo 		 * Enable (unmask) the interrupt
    400  1.9       leo 		 */
    401  1.9       leo 		MFP2->mf_imrb |= iinfo_p->imask;
    402  1.9       leo 		MFP2->mf_ierb |= iinfo_p->imask;
    403  1.9       leo 		return(iinfo_p);
    404  1.9       leo 	}
    405  1.1       leo 	return NULL;
    406  1.1       leo }
    407  1.1       leo 
    408  1.1       leo void
    409  1.1       leo pci_intr_disestablish(pc, cookie)
    410  1.1       leo 	pci_chipset_tag_t pc;
    411  1.1       leo 	void *cookie;
    412  1.1       leo {
    413  1.9       leo 	pci_intr_info_t *iinfo_p = (pci_intr_info_t *)cookie;
    414  1.9       leo 
    415  1.9       leo 	if (iinfo->ipl < 0)
    416  1.9       leo 	    panic("pci_intr_disestablish: interrupt was not established\n");
    417  1.9       leo 
    418  1.9       leo 	MFP2->mf_imrb &= ~iinfo->imask;
    419  1.9       leo 	MFP2->mf_ierb &= ~iinfo->imask;
    420  1.9       leo 	(void) intr_disestablish(iinfo_p->ihand);
    421  1.9       leo 	iinfo_p->ipl = -1;
    422  1.1       leo }
    423