pci_tseng.c revision 1.9.36.2 1 1.9.36.2 yamt /* $NetBSD: pci_tseng.c,v 1.9.36.2 2010/03/11 15:02:09 yamt Exp $ */
2 1.1 leo
3 1.1 leo /*
4 1.1 leo * Copyright (c) 1999 Leo Weppelman. All rights reserved.
5 1.1 leo *
6 1.1 leo * Redistribution and use in source and binary forms, with or without
7 1.1 leo * modification, are permitted provided that the following conditions
8 1.1 leo * are met:
9 1.1 leo * 1. Redistributions of source code must retain the above copyright
10 1.1 leo * notice, this list of conditions and the following disclaimer.
11 1.1 leo * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 leo * notice, this list of conditions and the following disclaimer in the
13 1.1 leo * documentation and/or other materials provided with the distribution.
14 1.1 leo *
15 1.1 leo * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 leo * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 leo * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.1 leo * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 leo * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 1.1 leo * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 1.1 leo * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 1.1 leo * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 1.1 leo * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 1.1 leo * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 1.1 leo */
26 1.7 lukem
27 1.7 lukem #include <sys/cdefs.h>
28 1.9.36.2 yamt __KERNEL_RCSID(0, "$NetBSD: pci_tseng.c,v 1.9.36.2 2010/03/11 15:02:09 yamt Exp $");
29 1.7 lukem
30 1.1 leo #include <sys/param.h>
31 1.1 leo #include <sys/queue.h>
32 1.1 leo #include <sys/systm.h>
33 1.1 leo #include <dev/pci/pcireg.h>
34 1.1 leo #include <dev/pci/pcivar.h>
35 1.1 leo #include <dev/pci/pcidevs.h>
36 1.1 leo #include <atari/pci/pci_vga.h>
37 1.1 leo #include <atari/dev/grf_etreg.h>
38 1.1 leo
39 1.1 leo #define PCI_LINMEMBASE 0x0e000000
40 1.1 leo #define PCI_IOBASE 0x800
41 1.1 leo
42 1.2 leo static void et6000_init(volatile u_char *, u_char *, int);
43 1.1 leo
44 1.1 leo /*
45 1.1 leo * Use tables for the card init...
46 1.1 leo */
47 1.1 leo static u_char seq_tab[] = {
48 1.5 leo 0x03, 0x01, 0x03, 0x00, 0x02, 0x00, 0x00, 0xb4 };
49 1.1 leo
50 1.1 leo static u_char gfx_tab[] = {
51 1.4 leo 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff };
52 1.1 leo
53 1.1 leo static u_char attr_tab[] = {
54 1.1 leo 0x0a, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00 };
55 1.1 leo
56 1.1 leo static u_char crt_tab[] = {
57 1.1 leo 0x60, 0x53, 0x4f, 0x94, 0x56, 0x05, 0xc1, 0x1f,
58 1.1 leo 0x00, 0x4f, 0x00, 0x0f, 0x00, 0x00, 0x07, 0x80,
59 1.1 leo 0x98, 0x3d, 0x8f, 0x28, 0x0f, 0x8f, 0xc2, 0xa3,
60 1.6 thomas 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
61 1.6 thomas 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00,
62 1.6 thomas 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
63 1.6 thomas #ifdef ET4000_HAS_2MB_MEM
64 1.6 thomas 0x00, 0x80, 0xa0, 0x00, 0x00, 0x10, 0x03, 0x89, /* 2 MB video memory */
65 1.6 thomas #else
66 1.6 thomas 0x00, 0x80, 0x28, 0x00, 0x00, 0x10, 0x43, 0x09, /* 1 MB video memory */
67 1.6 thomas #endif
68 1.6 thomas 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
69 1.1 leo
70 1.2 leo static u_char ras_cas_tab[] = {
71 1.2 leo 0x11, 0x14, 0x15 };
72 1.2 leo
73 1.1 leo void
74 1.9.36.1 yamt tseng_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb)
75 1.1 leo {
76 1.2 leo int i, j, csr;
77 1.1 leo int is_et6000 = 0;
78 1.1 leo
79 1.1 leo is_et6000 = (id == PCI_PRODUCT_TSENG_ET6000) ? 1 : 0;
80 1.1 leo
81 1.1 leo /* Turn on the card */
82 1.1 leo pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE);
83 1.1 leo if (is_et6000)
84 1.1 leo pci_conf_write(pc, tag, PCI_MAPREG_START+4,
85 1.1 leo PCI_IOBASE | PCI_MAPREG_TYPE_IO);
86 1.1 leo csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG);
87 1.1 leo csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE);
88 1.1 leo csr |= PCI_COMMAND_MASTER_ENABLE;
89 1.1 leo pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr);
90 1.1 leo
91 1.2 leo if (is_et6000) {
92 1.2 leo /*
93 1.2 leo * The et6[01]000 cards have MDRAM chips. The
94 1.9 msaitoh * timing to those chips is not properly initialized
95 1.2 leo * by the card on init. The way to determine the
96 1.2 leo * values is not documented either :-( So that's why
97 1.2 leo * all this mess below (and in et6000_init()....
98 1.2 leo */
99 1.2 leo for (i = 0; i < sizeof(ras_cas_tab); i++) {
100 1.2 leo et6000_init(ba, fb, i);
101 1.2 leo for (j = 0; j < 32; j++)
102 1.2 leo fb[j] = j;
103 1.2 leo for (j = 0; j < 32; j++)
104 1.2 leo if (fb[j] != j)
105 1.2 leo break;
106 1.2 leo if (j == 32)
107 1.2 leo break;
108 1.2 leo }
109 1.2 leo }
110 1.2 leo
111 1.1 leo vgaw(ba, GREG_MISC_OUTPUT_W, 0x63);
112 1.1 leo vgaw(ba, GREG_VIDEOSYSENABLE, 0x01);
113 1.1 leo WCrt(ba, 0x17 , 0x00); /* color */
114 1.1 leo WCrt(ba, 0x11 , 0x00); /* color */
115 1.1 leo vgaw(ba, VDAC_MASK , 0xff);
116 1.1 leo WSeq(ba, SEQ_ID_RESET , 0x00);
117 1.1 leo vgaw(ba, GREG_HERCULESCOMPAT, 0x03);
118 1.1 leo vgaw(ba, GREG_DISPMODECONTROL, 0xa0);
119 1.1 leo
120 1.1 leo /* Load sequencer */
121 1.1 leo for (i = 1; i < 8; i++)
122 1.1 leo WSeq(ba, i, seq_tab[i]);
123 1.1 leo WSeq(ba, SEQ_ID_RESET , 0x03);
124 1.1 leo
125 1.1 leo vgar(ba, VDAC_ADDRESS); /* clear old state */
126 1.1 leo vgar(ba, VDAC_MASK);
127 1.1 leo vgar(ba, VDAC_MASK);
128 1.1 leo vgar(ba, VDAC_MASK);
129 1.1 leo vgar(ba, VDAC_MASK);
130 1.1 leo vgaw(ba, VDAC_MASK, 0); /* set to palette */
131 1.1 leo vgar(ba, VDAC_ADDRESS); /* clear state */
132 1.1 leo vgaw(ba, VDAC_MASK, 0xff);
133 1.1 leo
134 1.1 leo /*
135 1.1 leo * Make sure we're allowed to write all crt-registers
136 1.1 leo */
137 1.1 leo WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f));
138 1.1 leo
139 1.1 leo /* CRT registers */
140 1.1 leo for (i = 0; i < 0x3e; i++)
141 1.1 leo WCrt(ba, i, crt_tab[i]);
142 1.3 leo
143 1.1 leo /* GCT registers */
144 1.1 leo for (i = 0; i < 0x09; i++)
145 1.1 leo WGfx(ba, i, gfx_tab[i]);
146 1.1 leo
147 1.1 leo for (i = 0; i < 0x10; i++)
148 1.1 leo WAttr(ba, i, i);
149 1.1 leo for (; i < 0x18; i++)
150 1.1 leo WAttr(ba, i, attr_tab[i - 0x10]);
151 1.1 leo WAttr(ba, 0x20, 0);
152 1.1 leo }
153 1.1 leo
154 1.1 leo /*
155 1.1 leo * Initialize the et6000 specific (PCI) registers. Try to do it like the
156 1.1 leo * video-bios would have done it, so things like Xservers get what they
157 1.1 leo * expect. Most info was kindly provided by Koen Gadeyne.
158 1.1 leo */
159 1.1 leo
160 1.1 leo static void
161 1.9.36.1 yamt et6000_init(volatile u_char *ba, u_char *fb, int iter)
162 1.1 leo {
163 1.1 leo
164 1.1 leo int i;
165 1.1 leo u_char dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63,
166 1.1 leo 0x28,0x22, 0x79,0x49, 0x6f,0x47,
167 1.1 leo 0x28,0x41, 0x6b,0x44, 0x00,0x00,
168 1.1 leo 0x00,0x00, 0x5d,0x25, 0x00,0x00,
169 1.1 leo 0x00,0x00, 0x00,0x96 };
170 1.1 leo
171 1.1 leo ba += 0x800;
172 1.1 leo
173 1.1 leo
174 1.1 leo ba[0x40] = 0x06; /* Use standard vga addressing */
175 1.1 leo ba[0x41] = 0x2a; /* Performance control */
176 1.1 leo ba[0x43] = 0x02; /* XCLK/SCLK config */
177 1.2 leo ba[0x44] = ras_cas_tab[iter]; /* RAS/CAS config */
178 1.1 leo ba[0x46] = 0x00; /* CRT display feature */
179 1.1 leo ba[0x47] = 0x10;
180 1.1 leo ba[0x58] = 0x00; /* Video Control 1 */
181 1.1 leo ba[0x59] = 0x04; /* Video Control 2 */
182 1.1 leo
183 1.1 leo /*
184 1.1 leo * Setup a 'standard' CLKDAC
185 1.1 leo */
186 1.1 leo ba[0x42] = 0x00; /* MCLK == CLK0 */
187 1.1 leo ba[0x67] = 0x00; /* Start filling from dac-reg 0 and up... */
188 1.1 leo for (i = 0; i < 0x16; i++)
189 1.1 leo ba[0x69] = dac_tab[i];
190 1.1 leo
191 1.1 leo if (ba[8] == 0x70) { /* et6100, right? */
192 1.1 leo volatile u_char *ma = (volatile u_char *)fb;
193 1.1 leo u_char bv;
194 1.1 leo
195 1.1 leo /*
196 1.1 leo * XXX Black magic to get the bloody MDRAM's to function...
197 1.1 leo * XXX _Only_ tested on my card! [leo]
198 1.1 leo */
199 1.1 leo bv = ba[45];
200 1.1 leo ba[0x45] = bv | 0x40; /* Reset MDRAM's */
201 1.1 leo ba[0x45] = bv | 0x70; /* Program latency value */
202 1.1 leo ma[0x0] = 0; /* Yeah, right :-( */
203 1.1 leo ba[0x45] = bv; /* Back to normal */
204 1.1 leo }
205 1.1 leo }
206