pci_tseng.c revision 1.10
1 /* $NetBSD: pci_tseng.c,v 1.10 2009/03/14 15:36:03 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Leo Weppelman. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Leo Weppelman. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: pci_tseng.c,v 1.10 2009/03/14 15:36:03 dsl Exp $"); 34 35 #include <sys/param.h> 36 #include <sys/queue.h> 37 #include <sys/systm.h> 38 #include <dev/pci/pcireg.h> 39 #include <dev/pci/pcivar.h> 40 #include <dev/pci/pcidevs.h> 41 #include <atari/pci/pci_vga.h> 42 #include <atari/dev/grf_etreg.h> 43 44 #define PCI_LINMEMBASE 0x0e000000 45 #define PCI_IOBASE 0x800 46 47 static void et6000_init(volatile u_char *, u_char *, int); 48 49 /* 50 * Use tables for the card init... 51 */ 52 static u_char seq_tab[] = { 53 0x03, 0x01, 0x03, 0x00, 0x02, 0x00, 0x00, 0xb4 }; 54 55 static u_char gfx_tab[] = { 56 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }; 57 58 static u_char attr_tab[] = { 59 0x0a, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00 }; 60 61 static u_char crt_tab[] = { 62 0x60, 0x53, 0x4f, 0x94, 0x56, 0x05, 0xc1, 0x1f, 63 0x00, 0x4f, 0x00, 0x0f, 0x00, 0x00, 0x07, 0x80, 64 0x98, 0x3d, 0x8f, 0x28, 0x0f, 0x8f, 0xc2, 0xa3, 65 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 66 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00, 67 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 68 #ifdef ET4000_HAS_2MB_MEM 69 0x00, 0x80, 0xa0, 0x00, 0x00, 0x10, 0x03, 0x89, /* 2 MB video memory */ 70 #else 71 0x00, 0x80, 0x28, 0x00, 0x00, 0x10, 0x43, 0x09, /* 1 MB video memory */ 72 #endif 73 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 74 75 static u_char ras_cas_tab[] = { 76 0x11, 0x14, 0x15 }; 77 78 void 79 tseng_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb) 80 { 81 int i, j, csr; 82 int is_et6000 = 0; 83 84 is_et6000 = (id == PCI_PRODUCT_TSENG_ET6000) ? 1 : 0; 85 86 /* Turn on the card */ 87 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE); 88 if (is_et6000) 89 pci_conf_write(pc, tag, PCI_MAPREG_START+4, 90 PCI_IOBASE | PCI_MAPREG_TYPE_IO); 91 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 92 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 93 csr |= PCI_COMMAND_MASTER_ENABLE; 94 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 95 96 if (is_et6000) { 97 /* 98 * The et6[01]000 cards have MDRAM chips. The 99 * timing to those chips is not properly initialized 100 * by the card on init. The way to determine the 101 * values is not documented either :-( So that's why 102 * all this mess below (and in et6000_init().... 103 */ 104 for (i = 0; i < sizeof(ras_cas_tab); i++) { 105 et6000_init(ba, fb, i); 106 for (j = 0; j < 32; j++) 107 fb[j] = j; 108 for (j = 0; j < 32; j++) 109 if (fb[j] != j) 110 break; 111 if (j == 32) 112 break; 113 } 114 } 115 116 vgaw(ba, GREG_MISC_OUTPUT_W, 0x63); 117 vgaw(ba, GREG_VIDEOSYSENABLE, 0x01); 118 WCrt(ba, 0x17 , 0x00); /* color */ 119 WCrt(ba, 0x11 , 0x00); /* color */ 120 vgaw(ba, VDAC_MASK , 0xff); 121 WSeq(ba, SEQ_ID_RESET , 0x00); 122 vgaw(ba, GREG_HERCULESCOMPAT, 0x03); 123 vgaw(ba, GREG_DISPMODECONTROL, 0xa0); 124 125 /* Load sequencer */ 126 for (i = 1; i < 8; i++) 127 WSeq(ba, i, seq_tab[i]); 128 WSeq(ba, SEQ_ID_RESET , 0x03); 129 130 vgar(ba, VDAC_ADDRESS); /* clear old state */ 131 vgar(ba, VDAC_MASK); 132 vgar(ba, VDAC_MASK); 133 vgar(ba, VDAC_MASK); 134 vgar(ba, VDAC_MASK); 135 vgaw(ba, VDAC_MASK, 0); /* set to palette */ 136 vgar(ba, VDAC_ADDRESS); /* clear state */ 137 vgaw(ba, VDAC_MASK, 0xff); 138 139 /* 140 * Make sure we're allowed to write all crt-registers 141 */ 142 WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f)); 143 144 /* CRT registers */ 145 for (i = 0; i < 0x3e; i++) 146 WCrt(ba, i, crt_tab[i]); 147 148 /* GCT registers */ 149 for (i = 0; i < 0x09; i++) 150 WGfx(ba, i, gfx_tab[i]); 151 152 for (i = 0; i < 0x10; i++) 153 WAttr(ba, i, i); 154 for (; i < 0x18; i++) 155 WAttr(ba, i, attr_tab[i - 0x10]); 156 WAttr(ba, 0x20, 0); 157 } 158 159 /* 160 * Initialize the et6000 specific (PCI) registers. Try to do it like the 161 * video-bios would have done it, so things like Xservers get what they 162 * expect. Most info was kindly provided by Koen Gadeyne. 163 */ 164 165 static void 166 et6000_init(volatile u_char *ba, u_char *fb, int iter) 167 { 168 169 int i; 170 u_char dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63, 171 0x28,0x22, 0x79,0x49, 0x6f,0x47, 172 0x28,0x41, 0x6b,0x44, 0x00,0x00, 173 0x00,0x00, 0x5d,0x25, 0x00,0x00, 174 0x00,0x00, 0x00,0x96 }; 175 176 ba += 0x800; 177 178 179 ba[0x40] = 0x06; /* Use standard vga addressing */ 180 ba[0x41] = 0x2a; /* Performance control */ 181 ba[0x43] = 0x02; /* XCLK/SCLK config */ 182 ba[0x44] = ras_cas_tab[iter]; /* RAS/CAS config */ 183 ba[0x46] = 0x00; /* CRT display feature */ 184 ba[0x47] = 0x10; 185 ba[0x58] = 0x00; /* Video Control 1 */ 186 ba[0x59] = 0x04; /* Video Control 2 */ 187 188 /* 189 * Setup a 'standard' CLKDAC 190 */ 191 ba[0x42] = 0x00; /* MCLK == CLK0 */ 192 ba[0x67] = 0x00; /* Start filling from dac-reg 0 and up... */ 193 for (i = 0; i < 0x16; i++) 194 ba[0x69] = dac_tab[i]; 195 196 if (ba[8] == 0x70) { /* et6100, right? */ 197 volatile u_char *ma = (volatile u_char *)fb; 198 u_char bv; 199 200 /* 201 * XXX Black magic to get the bloody MDRAM's to function... 202 * XXX _Only_ tested on my card! [leo] 203 */ 204 bv = ba[45]; 205 ba[0x45] = bv | 0x40; /* Reset MDRAM's */ 206 ba[0x45] = bv | 0x70; /* Program latency value */ 207 ma[0x0] = 0; /* Yeah, right :-( */ 208 ba[0x45] = bv; /* Back to normal */ 209 } 210 } 211
Indexes created Wed Oct 01 18:09:54 GMT 2025