pci_tseng.c revision 1.11
1 /* $NetBSD: pci_tseng.c,v 1.11 2009/10/20 19:10:11 snj Exp $ */ 2 3 /* 4 * Copyright (c) 1999 Leo Weppelman. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: pci_tseng.c,v 1.11 2009/10/20 19:10:11 snj Exp $"); 29 30 #include <sys/param.h> 31 #include <sys/queue.h> 32 #include <sys/systm.h> 33 #include <dev/pci/pcireg.h> 34 #include <dev/pci/pcivar.h> 35 #include <dev/pci/pcidevs.h> 36 #include <atari/pci/pci_vga.h> 37 #include <atari/dev/grf_etreg.h> 38 39 #define PCI_LINMEMBASE 0x0e000000 40 #define PCI_IOBASE 0x800 41 42 static void et6000_init(volatile u_char *, u_char *, int); 43 44 /* 45 * Use tables for the card init... 46 */ 47 static u_char seq_tab[] = { 48 0x03, 0x01, 0x03, 0x00, 0x02, 0x00, 0x00, 0xb4 }; 49 50 static u_char gfx_tab[] = { 51 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }; 52 53 static u_char attr_tab[] = { 54 0x0a, 0x00, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00 }; 55 56 static u_char crt_tab[] = { 57 0x60, 0x53, 0x4f, 0x94, 0x56, 0x05, 0xc1, 0x1f, 58 0x00, 0x4f, 0x00, 0x0f, 0x00, 0x00, 0x07, 0x80, 59 0x98, 0x3d, 0x8f, 0x28, 0x0f, 0x8f, 0xc2, 0xa3, 60 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 61 0x00, 0x00, 0x00, 0x00, 0x56, 0x00, 0x00, 0x00, 62 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 63 #ifdef ET4000_HAS_2MB_MEM 64 0x00, 0x80, 0xa0, 0x00, 0x00, 0x10, 0x03, 0x89, /* 2 MB video memory */ 65 #else 66 0x00, 0x80, 0x28, 0x00, 0x00, 0x10, 0x43, 0x09, /* 1 MB video memory */ 67 #endif 68 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; 69 70 static u_char ras_cas_tab[] = { 71 0x11, 0x14, 0x15 }; 72 73 void 74 tseng_init(pci_chipset_tag_t pc, pcitag_t tag, int id, volatile u_char *ba, u_char *fb) 75 { 76 int i, j, csr; 77 int is_et6000 = 0; 78 79 is_et6000 = (id == PCI_PRODUCT_TSENG_ET6000) ? 1 : 0; 80 81 /* Turn on the card */ 82 pci_conf_write(pc, tag, PCI_MAPREG_START, PCI_LINMEMBASE); 83 if (is_et6000) 84 pci_conf_write(pc, tag, PCI_MAPREG_START+4, 85 PCI_IOBASE | PCI_MAPREG_TYPE_IO); 86 csr = pci_conf_read(pc, tag, PCI_COMMAND_STATUS_REG); 87 csr |= (PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE); 88 csr |= PCI_COMMAND_MASTER_ENABLE; 89 pci_conf_write(pc, tag, PCI_COMMAND_STATUS_REG, csr); 90 91 if (is_et6000) { 92 /* 93 * The et6[01]000 cards have MDRAM chips. The 94 * timing to those chips is not properly initialized 95 * by the card on init. The way to determine the 96 * values is not documented either :-( So that's why 97 * all this mess below (and in et6000_init().... 98 */ 99 for (i = 0; i < sizeof(ras_cas_tab); i++) { 100 et6000_init(ba, fb, i); 101 for (j = 0; j < 32; j++) 102 fb[j] = j; 103 for (j = 0; j < 32; j++) 104 if (fb[j] != j) 105 break; 106 if (j == 32) 107 break; 108 } 109 } 110 111 vgaw(ba, GREG_MISC_OUTPUT_W, 0x63); 112 vgaw(ba, GREG_VIDEOSYSENABLE, 0x01); 113 WCrt(ba, 0x17 , 0x00); /* color */ 114 WCrt(ba, 0x11 , 0x00); /* color */ 115 vgaw(ba, VDAC_MASK , 0xff); 116 WSeq(ba, SEQ_ID_RESET , 0x00); 117 vgaw(ba, GREG_HERCULESCOMPAT, 0x03); 118 vgaw(ba, GREG_DISPMODECONTROL, 0xa0); 119 120 /* Load sequencer */ 121 for (i = 1; i < 8; i++) 122 WSeq(ba, i, seq_tab[i]); 123 WSeq(ba, SEQ_ID_RESET , 0x03); 124 125 vgar(ba, VDAC_ADDRESS); /* clear old state */ 126 vgar(ba, VDAC_MASK); 127 vgar(ba, VDAC_MASK); 128 vgar(ba, VDAC_MASK); 129 vgar(ba, VDAC_MASK); 130 vgaw(ba, VDAC_MASK, 0); /* set to palette */ 131 vgar(ba, VDAC_ADDRESS); /* clear state */ 132 vgaw(ba, VDAC_MASK, 0xff); 133 134 /* 135 * Make sure we're allowed to write all crt-registers 136 */ 137 WCrt(ba, CRT_ID_END_VER_RETR, (RCrt(ba, CRT_ID_END_VER_RETR) & 0x7f)); 138 139 /* CRT registers */ 140 for (i = 0; i < 0x3e; i++) 141 WCrt(ba, i, crt_tab[i]); 142 143 /* GCT registers */ 144 for (i = 0; i < 0x09; i++) 145 WGfx(ba, i, gfx_tab[i]); 146 147 for (i = 0; i < 0x10; i++) 148 WAttr(ba, i, i); 149 for (; i < 0x18; i++) 150 WAttr(ba, i, attr_tab[i - 0x10]); 151 WAttr(ba, 0x20, 0); 152 } 153 154 /* 155 * Initialize the et6000 specific (PCI) registers. Try to do it like the 156 * video-bios would have done it, so things like Xservers get what they 157 * expect. Most info was kindly provided by Koen Gadeyne. 158 */ 159 160 static void 161 et6000_init(volatile u_char *ba, u_char *fb, int iter) 162 { 163 164 int i; 165 u_char dac_tab[] = { 0x7d,0x67, 0x5d,0x64, 0x56,0x63, 166 0x28,0x22, 0x79,0x49, 0x6f,0x47, 167 0x28,0x41, 0x6b,0x44, 0x00,0x00, 168 0x00,0x00, 0x5d,0x25, 0x00,0x00, 169 0x00,0x00, 0x00,0x96 }; 170 171 ba += 0x800; 172 173 174 ba[0x40] = 0x06; /* Use standard vga addressing */ 175 ba[0x41] = 0x2a; /* Performance control */ 176 ba[0x43] = 0x02; /* XCLK/SCLK config */ 177 ba[0x44] = ras_cas_tab[iter]; /* RAS/CAS config */ 178 ba[0x46] = 0x00; /* CRT display feature */ 179 ba[0x47] = 0x10; 180 ba[0x58] = 0x00; /* Video Control 1 */ 181 ba[0x59] = 0x04; /* Video Control 2 */ 182 183 /* 184 * Setup a 'standard' CLKDAC 185 */ 186 ba[0x42] = 0x00; /* MCLK == CLK0 */ 187 ba[0x67] = 0x00; /* Start filling from dac-reg 0 and up... */ 188 for (i = 0; i < 0x16; i++) 189 ba[0x69] = dac_tab[i]; 190 191 if (ba[8] == 0x70) { /* et6100, right? */ 192 volatile u_char *ma = (volatile u_char *)fb; 193 u_char bv; 194 195 /* 196 * XXX Black magic to get the bloody MDRAM's to function... 197 * XXX _Only_ tested on my card! [leo] 198 */ 199 bv = ba[45]; 200 ba[0x45] = bv | 0x40; /* Reset MDRAM's */ 201 ba[0x45] = bv | 0x70; /* Program latency value */ 202 ma[0x0] = 0; /* Yeah, right :-( */ 203 ba[0x45] = bv; /* Back to normal */ 204 } 205 } 206
Indexes created Wed Oct 01 18:09:54 GMT 2025