et4000.c revision 1.15
1 /* $NetBSD: et4000.c,v 1.15 2008/06/11 14:35:53 tsutsui Exp $ */ 2 /*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Julian Coleman. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * Thanks to: 33 * Leo Weppelman 34 * 'Maximum Entropy' 35 * Thomas Gerner 36 * Juergen Orscheidt 37 * for their help and for code that I could refer to when writing this driver. 38 * 39 * Defining DEBUG_ET4000 will cause the driver to *always* attach. Use for 40 * debugging register settings. 41 */ 42 43 /* 44 #define DEBUG_ET4000 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: et4000.c,v 1.15 2008/06/11 14:35:53 tsutsui Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/ioctl.h> 52 #include <sys/queue.h> 53 #include <sys/malloc.h> 54 #include <sys/device.h> 55 #include <sys/systm.h> 56 #include <sys/conf.h> 57 #include <sys/event.h> 58 #include <atari/vme/vmevar.h> 59 60 #include <machine/iomap.h> 61 #include <machine/video.h> 62 #include <machine/mfp.h> 63 #include <machine/cpu.h> 64 #include <atari/atari/device.h> 65 #include <atari/dev/grfioctl.h> 66 #include <atari/dev/grf_etreg.h> 67 68 /* 69 * Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This 70 * is more or less required by the XFree server. The X server also 71 * requires that the frame buffer be mapped above 0x3fffff. 72 */ 73 #define REG_MAPPABLE (8 * 1024) /* 0x2000 */ 74 #define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */ 75 #define FRAME_BASE (4 * 1024 * 1024) /* 0x400000 */ 76 #define VGA_MAPPABLE (128 * 1024) /* 0x20000 */ 77 #define VGA_BASE 0xa0000 78 79 static int et_vme_match __P((struct device *, struct cfdata *, void *)); 80 static void et_vme_attach __P((struct device *, struct device *, void *)); 81 static int et_probe_addresses __P((struct vme_attach_args *)); 82 static void et_start __P((bus_space_tag_t *, bus_space_handle_t *, int *, 83 u_char *)); 84 static void et_stop __P((bus_space_tag_t *, bus_space_handle_t *, int *, 85 u_char *)); 86 static int et_detect __P((bus_space_tag_t *, bus_space_tag_t *, 87 bus_space_handle_t *, bus_space_handle_t *, u_int)); 88 89 int eton __P((dev_t)); 90 int etoff __P((dev_t)); 91 92 /* Register and screen memory addresses for ET4000 based VME cards */ 93 static struct et_addresses { 94 u_long io_addr; 95 u_long io_size; 96 u_long mem_addr; 97 u_long mem_size; 98 } etstd[] = { 99 { 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */ 100 { 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */ 101 { 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */ 102 }; 103 104 #define NETSTD (sizeof(etstd) / sizeof(etstd[0])) 105 106 struct grfabs_et_priv { 107 volatile void * regkva; 108 volatile void * memkva; 109 int regsz; 110 int memsz; 111 } et_priv; 112 113 struct et_softc { 114 struct device sc_dev; 115 bus_space_tag_t sc_iot; 116 bus_space_tag_t sc_memt; 117 bus_space_handle_t sc_ioh; 118 bus_space_handle_t sc_memh; 119 int sc_flags; 120 int sc_iobase; 121 int sc_maddr; 122 int sc_iosize; 123 int sc_msize; 124 }; 125 126 #define ET_SC_FLAGS_INUSE 1 127 128 CFATTACH_DECL(et, sizeof(struct et_softc), 129 et_vme_match, et_vme_attach, NULL, NULL); 130 131 extern struct cfdriver et_cd; 132 133 dev_type_open(etopen); 134 dev_type_close(etclose); 135 dev_type_read(etread); 136 dev_type_write(etwrite); 137 dev_type_ioctl(etioctl); 138 dev_type_mmap(etmmap); 139 140 const struct cdevsw et_cdevsw = { 141 etopen, etclose, etread, etwrite, etioctl, 142 nostop, notty, nopoll, etmmap, nokqfilter, 143 }; 144 145 /* 146 * Look for a ET4000 (Crazy Dots) card on the VME bus. We might 147 * match Spektrum cards too (untested). 148 */ 149 int 150 et_vme_match(pdp, cfp, auxp) 151 struct device *pdp; 152 struct cfdata *cfp; 153 void *auxp; 154 { 155 struct vme_attach_args *va = auxp; 156 157 return(et_probe_addresses(va)); 158 } 159 160 static int 161 et_probe_addresses(va) 162 struct vme_attach_args *va; 163 { 164 int i, found = 0; 165 bus_space_tag_t iot; 166 bus_space_tag_t memt; 167 bus_space_handle_t ioh; 168 bus_space_handle_t memh; 169 170 iot = va->va_iot; 171 memt = va->va_memt; 172 173 /* Loop around our possible addresses looking for a match */ 174 for (i = 0; i < NETSTD; i++) { 175 struct et_addresses *et_ap = &etstd[i]; 176 struct vme_attach_args vat = *va; 177 178 if (vat.va_irq != VMECF_IRQ_DEFAULT) { 179 printf("et probe: config error: no irq support\n"); 180 return(0); 181 } 182 if (vat.va_iobase == VMECF_IOPORT_DEFAULT) 183 vat.va_iobase = et_ap->io_addr; 184 if (vat.va_maddr == VMECF_MEM_DEFAULT) 185 vat.va_maddr = et_ap->mem_addr; 186 if (vat.va_iosize == VMECF_IOSIZE_DEFAULT) 187 vat.va_iosize = et_ap->io_size; 188 if (vat.va_msize == VMECF_MEMSIZ_DEFAULT) 189 vat.va_msize = et_ap->mem_size; 190 if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0, 191 &ioh)) { 192 printf("et probe: cannot map io area\n"); 193 return(0); 194 } 195 if (bus_space_map(memt, vat.va_maddr, vat.va_msize, 196 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE, 197 &memh)) { 198 bus_space_unmap(iot, ioh, vat.va_iosize); 199 printf("et probe: cannot map memory area\n"); 200 return(0); 201 } 202 found = et_detect(&iot, &memt, &ioh, &memh, vat.va_msize); 203 bus_space_unmap(iot, ioh, vat.va_iosize); 204 bus_space_unmap(memt, memh, vat.va_msize); 205 if (found) { 206 *va = vat; 207 return(1); 208 } 209 } 210 return(0); 211 } 212 213 static void 214 et_start(iot, ioh, vgabase, saved) 215 bus_space_tag_t *iot; 216 bus_space_handle_t *ioh; 217 int *vgabase; 218 u_char *saved; 219 { 220 /* Enable VGA */ 221 bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01); 222 /* Check whether colour (base = 3d0) or mono (base = 3b0) mode */ 223 *vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01) 224 ? 0x3d0 : 0x3b0; 225 /* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */ 226 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03); 227 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0); 228 /* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */ 229 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36); 230 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0); 231 /* Enable writes to CRTC[0..7] */ 232 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 233 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 234 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f); 235 /* Map all memory for video modes */ 236 bus_space_write_1(*iot, *ioh, 0x3ce, 0x06); 237 bus_space_write_1(*iot, *ioh, 0x3cf, 0x01); 238 } 239 240 static void 241 et_stop(iot, ioh, vgabase, saved) 242 bus_space_tag_t *iot; 243 bus_space_handle_t *ioh; 244 int *vgabase; 245 u_char *saved; 246 { 247 /* Restore writes to CRTC[0..7] */ 248 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 249 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 250 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80); 251 /* Disable 'Tseng Extensions' */ 252 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00); 253 bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29); 254 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01); 255 } 256 257 static int 258 et_detect(iot, memt, ioh, memh, memsize) 259 bus_space_tag_t *iot, *memt; 260 bus_space_handle_t *ioh, *memh; 261 u_int memsize; 262 { 263 u_char orig, new, saved; 264 int vgabase; 265 266 /* Test accessibility of registers and memory */ 267 if(!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R)) 268 return(0); 269 if(!bus_space_peek_1(*memt, *memh, 0)) 270 return(0); 271 272 et_start(iot, ioh, &vgabase, &saved); 273 274 /* Is the card a Tseng card? Check read/write of ATC[16] */ 275 (void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a); 276 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 277 orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 278 bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10)); 279 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 280 new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 281 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig); 282 if (new != (orig ^ 0x10)) { 283 #ifdef DEBUG_ET4000 284 printf("et4000: ATC[16] failed (%x != %x)\n", 285 new, (orig ^ 0x10)); 286 #else 287 et_stop(iot, ioh, &vgabase, &saved); 288 return(0); 289 #endif 290 } 291 /* Is the card and ET4000? Check read/write of CRTC[33] */ 292 bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33); 293 orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 294 bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f)); 295 new = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 296 bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig); 297 if (new != (orig ^ 0x0f)) { 298 #ifdef DEBUG_ET4000 299 printf("et4000: CRTC[33] failed (%x != %x)\n", 300 new, (orig ^ 0x0f)); 301 #else 302 et_stop(iot, ioh, &vgabase, &saved); 303 return(0); 304 #endif 305 } 306 307 /* Set up video memory so we can read & write it */ 308 bus_space_write_1(*iot, *ioh, 0x3c4, 0x04); 309 bus_space_write_1(*iot, *ioh, 0x3c5, 0x06); 310 bus_space_write_1(*iot, *ioh, 0x3c4, 0x07); 311 bus_space_write_1(*iot, *ioh, 0x3c5, 0xa8); 312 bus_space_write_1(*iot, *ioh, 0x3ce, 0x01); 313 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 314 bus_space_write_1(*iot, *ioh, 0x3ce, 0x03); 315 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 316 bus_space_write_1(*iot, *ioh, 0x3ce, 0x05); 317 bus_space_write_1(*iot, *ioh, 0x3cf, 0x40); 318 319 #define TEST_PATTERN 0xa5a5a5a5 320 321 bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN); 322 if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN) 323 { 324 #ifdef DEBUG_ET4000 325 printf("et4000: Video base write/read failed\n"); 326 #else 327 et_stop(iot, ioh, &vgabase, &saved); 328 return(0); 329 #endif 330 } 331 bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN); 332 if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN) 333 { 334 #ifdef DEBUG_ET4000 335 printf("et4000: Video top write/read failed\n"); 336 #else 337 et_stop(iot, ioh, &vgabase, &saved); 338 return(0); 339 #endif 340 } 341 342 et_stop(iot, ioh, &vgabase, &saved); 343 return(1); 344 } 345 346 static void 347 et_vme_attach(parent, self, aux) 348 struct device *parent, *self; 349 void *aux; 350 { 351 struct et_softc *sc = (struct et_softc *)self; 352 struct vme_attach_args *va = aux; 353 bus_space_handle_t ioh; 354 bus_space_handle_t memh; 355 356 printf("\n"); 357 358 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 359 panic("et attach: cannot map io area"); 360 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 361 panic("et attach: cannot map mem area"); 362 363 sc->sc_iot = va->va_iot; 364 sc->sc_ioh = ioh; 365 sc->sc_memt = va->va_memt; 366 sc->sc_memh = memh; 367 sc->sc_flags = 0; 368 sc->sc_iobase = va->va_iobase; 369 sc->sc_maddr = va->va_maddr; 370 sc->sc_iosize = va->va_iosize; 371 sc->sc_msize = va->va_msize; 372 373 et_priv.regkva = (volatile void *)ioh; 374 et_priv.memkva = (volatile void *)memh; 375 et_priv.regsz = va->va_iosize; 376 et_priv.memsz = va->va_msize; 377 } 378 379 int 380 etopen(dev, flags, devtype, l) 381 dev_t dev; 382 int flags, devtype; 383 struct lwp *l; 384 { 385 struct et_softc *sc; 386 387 sc = device_lookup_private(&et_cd, minor(dev)); 388 if (sc == NULL) 389 return(ENXIO); 390 if (sc->sc_flags & ET_SC_FLAGS_INUSE) 391 return(EBUSY); 392 sc->sc_flags |= ET_SC_FLAGS_INUSE; 393 return(0); 394 } 395 396 int 397 etclose(dev, flags, devtype, l) 398 dev_t dev; 399 int flags, devtype; 400 struct lwp *l; 401 { 402 struct et_softc *sc; 403 404 /* 405 * XXX: Should we reset to a default mode? 406 */ 407 sc = device_lookup_private(&et_cd, minor(dev)); 408 sc->sc_flags &= ~ET_SC_FLAGS_INUSE; 409 return(0); 410 } 411 412 int 413 etread(dev, uio, flags) 414 dev_t dev; 415 struct uio *uio; 416 int flags; 417 { 418 return(EINVAL); 419 } 420 421 int 422 etwrite(dev, uio, flags) 423 dev_t dev; 424 struct uio *uio; 425 int flags; 426 { 427 return(EINVAL); 428 } 429 430 int 431 etioctl(dev, cmd, data, flags, l) 432 dev_t dev; 433 u_long cmd; 434 void *data; 435 int flags; 436 struct lwp *l; 437 { 438 struct grfinfo g_display; 439 struct et_softc *sc; 440 441 sc = device_lookup_private(&et_cd, minor(dev)); 442 switch (cmd) { 443 case GRFIOCON: 444 return(0); 445 break; 446 case GRFIOCOFF: 447 return(0); 448 break; 449 case GRFIOCGINFO: 450 g_display.gd_fbaddr = (void *) (sc->sc_maddr); 451 g_display.gd_fbsize = sc->sc_msize; 452 g_display.gd_linbase = FRAME_BASE; 453 g_display.gd_regaddr = (void *) (sc->sc_iobase); 454 g_display.gd_regsize = sc->sc_iosize; 455 g_display.gd_vgaaddr = (void *) (sc->sc_maddr); 456 g_display.gd_vgasize = VGA_MAPPABLE; 457 g_display.gd_vgabase = VGA_BASE; 458 g_display.gd_colors = 16; 459 g_display.gd_planes = 4; 460 g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */ 461 g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */ 462 g_display.gd_fbx = 0; 463 g_display.gd_fby = 0; 464 g_display.gd_dwidth = 0; 465 g_display.gd_dheight = 0; 466 g_display.gd_dx = 0; 467 g_display.gd_dy = 0; 468 g_display.gd_bank_size = 0; 469 bcopy((void *)&g_display, data, sizeof(struct grfinfo)); 470 break; 471 case GRFIOCMAP: 472 return(EINVAL); 473 break; 474 case GRFIOCUNMAP: 475 return(EINVAL); 476 break; 477 default: 478 return(EINVAL); 479 break; 480 } 481 return(0); 482 } 483 484 paddr_t 485 etmmap(dev, offset, prot) 486 dev_t dev; 487 off_t offset; 488 int prot; 489 { 490 struct et_softc *sc; 491 492 sc = device_lookup_private(&et_cd, minor(dev)); 493 494 /* 495 * control registers 496 * mapped from offset 0x0 to REG_MAPPABLE 497 */ 498 if (offset >= 0 && offset <= sc->sc_iosize) 499 return(m68k_btop(sc->sc_iobase + offset)); 500 501 /* 502 * VGA memory 503 * mapped from offset 0xa0000 to 0xc0000 504 */ 505 if (offset >= VGA_BASE && offset < (VGA_MAPPABLE + VGA_BASE)) 506 return(m68k_btop(sc->sc_maddr + offset - VGA_BASE)); 507 508 /* 509 * frame buffer 510 * mapped from offset 0x400000 to 0x4fffff 511 */ 512 if (offset >= FRAME_BASE && offset < sc->sc_msize + FRAME_BASE) 513 return(m68k_btop(sc->sc_maddr + offset - FRAME_BASE)); 514 515 return(-1); 516 } 517 518 int 519 eton(dev) 520 dev_t dev; 521 { 522 struct et_softc *sc; 523 524 if (minor(dev) >= et_cd.cd_ndevs) 525 return(ENXIO); 526 sc = device_lookup_private(&et_cd, minor(dev)); 527 if (sc == NULL) 528 return(ENXIO); 529 return(0); 530 } 531 532 int 533 etoff(dev) 534 dev_t dev; 535 { 536 return(0); 537 } 538 539
Indexes created Mon Sep 29 21:09:56 GMT 2025