et4000.c revision 1.17
1 /* $NetBSD: et4000.c,v 1.17 2009/03/14 15:36:04 dsl Exp $ */ 2 /*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Julian Coleman. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * Thanks to: 33 * Leo Weppelman 34 * 'Maximum Entropy' 35 * Thomas Gerner 36 * Juergen Orscheidt 37 * for their help and for code that I could refer to when writing this driver. 38 * 39 * Defining DEBUG_ET4000 will cause the driver to *always* attach. Use for 40 * debugging register settings. 41 */ 42 43 /* 44 #define DEBUG_ET4000 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: et4000.c,v 1.17 2009/03/14 15:36:04 dsl Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/ioctl.h> 52 #include <sys/queue.h> 53 #include <sys/malloc.h> 54 #include <sys/device.h> 55 #include <sys/systm.h> 56 #include <sys/conf.h> 57 #include <sys/event.h> 58 #include <atari/vme/vmevar.h> 59 60 #include <machine/iomap.h> 61 #include <machine/video.h> 62 #include <machine/mfp.h> 63 #include <machine/cpu.h> 64 #include <atari/atari/device.h> 65 #include <atari/dev/grfioctl.h> 66 #include <atari/dev/grf_etreg.h> 67 68 /* 69 * Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This 70 * is more or less required by the XFree server. The X server also 71 * requires that the frame buffer be mapped above 0x3fffff. 72 */ 73 #define REG_MAPPABLE (8 * 1024) /* 0x2000 */ 74 #define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */ 75 #define FRAME_BASE (4 * 1024 * 1024) /* 0x400000 */ 76 #define VGA_MAPPABLE (128 * 1024) /* 0x20000 */ 77 #define VGA_BASE 0xa0000 78 79 static int et_vme_match(struct device *, struct cfdata *, void *); 80 static void et_vme_attach(struct device *, struct device *, void *); 81 static int et_probe_addresses(struct vme_attach_args *); 82 static void et_start(bus_space_tag_t *, bus_space_handle_t *, int *, 83 u_char *); 84 static void et_stop(bus_space_tag_t *, bus_space_handle_t *, int *, 85 u_char *); 86 static int et_detect(bus_space_tag_t *, bus_space_tag_t *, 87 bus_space_handle_t *, bus_space_handle_t *, u_int); 88 89 int eton(dev_t); 90 int etoff(dev_t); 91 92 /* Register and screen memory addresses for ET4000 based VME cards */ 93 static struct et_addresses { 94 u_long io_addr; 95 u_long io_size; 96 u_long mem_addr; 97 u_long mem_size; 98 } etstd[] = { 99 { 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */ 100 { 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */ 101 { 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */ 102 }; 103 104 #define NETSTD (sizeof(etstd) / sizeof(etstd[0])) 105 106 struct grfabs_et_priv { 107 volatile void * regkva; 108 volatile void * memkva; 109 int regsz; 110 int memsz; 111 } et_priv; 112 113 struct et_softc { 114 struct device sc_dev; 115 bus_space_tag_t sc_iot; 116 bus_space_tag_t sc_memt; 117 bus_space_handle_t sc_ioh; 118 bus_space_handle_t sc_memh; 119 int sc_flags; 120 int sc_iobase; 121 int sc_maddr; 122 int sc_iosize; 123 int sc_msize; 124 }; 125 126 #define ET_SC_FLAGS_INUSE 1 127 128 CFATTACH_DECL(et, sizeof(struct et_softc), 129 et_vme_match, et_vme_attach, NULL, NULL); 130 131 extern struct cfdriver et_cd; 132 133 dev_type_open(etopen); 134 dev_type_close(etclose); 135 dev_type_read(etread); 136 dev_type_write(etwrite); 137 dev_type_ioctl(etioctl); 138 dev_type_mmap(etmmap); 139 140 const struct cdevsw et_cdevsw = { 141 etopen, etclose, etread, etwrite, etioctl, 142 nostop, notty, nopoll, etmmap, nokqfilter, 143 }; 144 145 /* 146 * Look for a ET4000 (Crazy Dots) card on the VME bus. We might 147 * match Spektrum cards too (untested). 148 */ 149 int 150 et_vme_match(struct device *pdp, struct cfdata *cfp, void *auxp) 151 { 152 struct vme_attach_args *va = auxp; 153 154 return(et_probe_addresses(va)); 155 } 156 157 static int 158 et_probe_addresses(struct vme_attach_args *va) 159 { 160 int i, found = 0; 161 bus_space_tag_t iot; 162 bus_space_tag_t memt; 163 bus_space_handle_t ioh; 164 bus_space_handle_t memh; 165 166 iot = va->va_iot; 167 memt = va->va_memt; 168 169 /* Loop around our possible addresses looking for a match */ 170 for (i = 0; i < NETSTD; i++) { 171 struct et_addresses *et_ap = &etstd[i]; 172 struct vme_attach_args vat = *va; 173 174 if (vat.va_irq != VMECF_IRQ_DEFAULT) { 175 printf("et probe: config error: no irq support\n"); 176 return(0); 177 } 178 if (vat.va_iobase == VMECF_IOPORT_DEFAULT) 179 vat.va_iobase = et_ap->io_addr; 180 if (vat.va_maddr == VMECF_MEM_DEFAULT) 181 vat.va_maddr = et_ap->mem_addr; 182 if (vat.va_iosize == VMECF_IOSIZE_DEFAULT) 183 vat.va_iosize = et_ap->io_size; 184 if (vat.va_msize == VMECF_MEMSIZ_DEFAULT) 185 vat.va_msize = et_ap->mem_size; 186 if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0, 187 &ioh)) { 188 printf("et probe: cannot map io area\n"); 189 return(0); 190 } 191 if (bus_space_map(memt, vat.va_maddr, vat.va_msize, 192 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE, 193 &memh)) { 194 bus_space_unmap(iot, ioh, vat.va_iosize); 195 printf("et probe: cannot map memory area\n"); 196 return(0); 197 } 198 found = et_detect(&iot, &memt, &ioh, &memh, vat.va_msize); 199 bus_space_unmap(iot, ioh, vat.va_iosize); 200 bus_space_unmap(memt, memh, vat.va_msize); 201 if (found) { 202 *va = vat; 203 return(1); 204 } 205 } 206 return(0); 207 } 208 209 static void 210 et_start(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 211 { 212 /* Enable VGA */ 213 bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01); 214 /* Check whether colour (base = 3d0) or mono (base = 3b0) mode */ 215 *vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01) 216 ? 0x3d0 : 0x3b0; 217 /* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */ 218 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03); 219 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0); 220 /* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */ 221 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36); 222 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0); 223 /* Enable writes to CRTC[0..7] */ 224 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 225 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 226 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f); 227 /* Map all memory for video modes */ 228 bus_space_write_1(*iot, *ioh, 0x3ce, 0x06); 229 bus_space_write_1(*iot, *ioh, 0x3cf, 0x01); 230 } 231 232 static void 233 et_stop(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 234 { 235 /* Restore writes to CRTC[0..7] */ 236 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 237 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 238 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80); 239 /* Disable 'Tseng Extensions' */ 240 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00); 241 bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29); 242 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01); 243 } 244 245 static int 246 et_detect(iot, memt, ioh, memh, memsize) 247 bus_space_tag_t *iot, *memt; 248 bus_space_handle_t *ioh, *memh; 249 u_int memsize; 250 { 251 u_char orig, new, saved; 252 int vgabase; 253 254 /* Test accessibility of registers and memory */ 255 if(!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R)) 256 return(0); 257 if(!bus_space_peek_1(*memt, *memh, 0)) 258 return(0); 259 260 et_start(iot, ioh, &vgabase, &saved); 261 262 /* Is the card a Tseng card? Check read/write of ATC[16] */ 263 (void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a); 264 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 265 orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 266 bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10)); 267 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 268 new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 269 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig); 270 if (new != (orig ^ 0x10)) { 271 #ifdef DEBUG_ET4000 272 printf("et4000: ATC[16] failed (%x != %x)\n", 273 new, (orig ^ 0x10)); 274 #else 275 et_stop(iot, ioh, &vgabase, &saved); 276 return(0); 277 #endif 278 } 279 /* Is the card and ET4000? Check read/write of CRTC[33] */ 280 bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33); 281 orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 282 bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f)); 283 new = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 284 bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig); 285 if (new != (orig ^ 0x0f)) { 286 #ifdef DEBUG_ET4000 287 printf("et4000: CRTC[33] failed (%x != %x)\n", 288 new, (orig ^ 0x0f)); 289 #else 290 et_stop(iot, ioh, &vgabase, &saved); 291 return(0); 292 #endif 293 } 294 295 /* Set up video memory so we can read & write it */ 296 bus_space_write_1(*iot, *ioh, 0x3c4, 0x04); 297 bus_space_write_1(*iot, *ioh, 0x3c5, 0x06); 298 bus_space_write_1(*iot, *ioh, 0x3c4, 0x07); 299 bus_space_write_1(*iot, *ioh, 0x3c5, 0xa8); 300 bus_space_write_1(*iot, *ioh, 0x3ce, 0x01); 301 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 302 bus_space_write_1(*iot, *ioh, 0x3ce, 0x03); 303 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 304 bus_space_write_1(*iot, *ioh, 0x3ce, 0x05); 305 bus_space_write_1(*iot, *ioh, 0x3cf, 0x40); 306 307 #define TEST_PATTERN 0xa5a5a5a5 308 309 bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN); 310 if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN) 311 { 312 #ifdef DEBUG_ET4000 313 printf("et4000: Video base write/read failed\n"); 314 #else 315 et_stop(iot, ioh, &vgabase, &saved); 316 return(0); 317 #endif 318 } 319 bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN); 320 if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN) 321 { 322 #ifdef DEBUG_ET4000 323 printf("et4000: Video top write/read failed\n"); 324 #else 325 et_stop(iot, ioh, &vgabase, &saved); 326 return(0); 327 #endif 328 } 329 330 et_stop(iot, ioh, &vgabase, &saved); 331 return(1); 332 } 333 334 static void 335 et_vme_attach(parent, self, aux) 336 struct device *parent, *self; 337 void *aux; 338 { 339 struct et_softc *sc = (struct et_softc *)self; 340 struct vme_attach_args *va = aux; 341 bus_space_handle_t ioh; 342 bus_space_handle_t memh; 343 344 printf("\n"); 345 346 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 347 panic("et attach: cannot map io area"); 348 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 349 panic("et attach: cannot map mem area"); 350 351 sc->sc_iot = va->va_iot; 352 sc->sc_ioh = ioh; 353 sc->sc_memt = va->va_memt; 354 sc->sc_memh = memh; 355 sc->sc_flags = 0; 356 sc->sc_iobase = va->va_iobase; 357 sc->sc_maddr = va->va_maddr; 358 sc->sc_iosize = va->va_iosize; 359 sc->sc_msize = va->va_msize; 360 361 et_priv.regkva = (volatile void *)ioh; 362 et_priv.memkva = (volatile void *)memh; 363 et_priv.regsz = va->va_iosize; 364 et_priv.memsz = va->va_msize; 365 } 366 367 int 368 etopen(dev, flags, devtype, l) 369 dev_t dev; 370 int flags, devtype; 371 struct lwp *l; 372 { 373 struct et_softc *sc; 374 375 sc = device_lookup_private(&et_cd, minor(dev)); 376 if (sc == NULL) 377 return(ENXIO); 378 if (sc->sc_flags & ET_SC_FLAGS_INUSE) 379 return(EBUSY); 380 sc->sc_flags |= ET_SC_FLAGS_INUSE; 381 return(0); 382 } 383 384 int 385 etclose(dev, flags, devtype, l) 386 dev_t dev; 387 int flags, devtype; 388 struct lwp *l; 389 { 390 struct et_softc *sc; 391 392 /* 393 * XXX: Should we reset to a default mode? 394 */ 395 sc = device_lookup_private(&et_cd, minor(dev)); 396 sc->sc_flags &= ~ET_SC_FLAGS_INUSE; 397 return(0); 398 } 399 400 int 401 etread(dev_t dev, struct uio *uio, int flags) 402 { 403 return(EINVAL); 404 } 405 406 int 407 etwrite(dev_t dev, struct uio *uio, int flags) 408 { 409 return(EINVAL); 410 } 411 412 int 413 etioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 414 { 415 struct grfinfo g_display; 416 struct et_softc *sc; 417 418 sc = device_lookup_private(&et_cd, minor(dev)); 419 switch (cmd) { 420 case GRFIOCON: 421 return(0); 422 break; 423 case GRFIOCOFF: 424 return(0); 425 break; 426 case GRFIOCGINFO: 427 g_display.gd_fbaddr = (void *) (sc->sc_maddr); 428 g_display.gd_fbsize = sc->sc_msize; 429 g_display.gd_linbase = FRAME_BASE; 430 g_display.gd_regaddr = (void *) (sc->sc_iobase); 431 g_display.gd_regsize = sc->sc_iosize; 432 g_display.gd_vgaaddr = (void *) (sc->sc_maddr); 433 g_display.gd_vgasize = VGA_MAPPABLE; 434 g_display.gd_vgabase = VGA_BASE; 435 g_display.gd_colors = 16; 436 g_display.gd_planes = 4; 437 g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */ 438 g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */ 439 g_display.gd_fbx = 0; 440 g_display.gd_fby = 0; 441 g_display.gd_dwidth = 0; 442 g_display.gd_dheight = 0; 443 g_display.gd_dx = 0; 444 g_display.gd_dy = 0; 445 g_display.gd_bank_size = 0; 446 bcopy((void *)&g_display, data, sizeof(struct grfinfo)); 447 break; 448 case GRFIOCMAP: 449 return(EINVAL); 450 break; 451 case GRFIOCUNMAP: 452 return(EINVAL); 453 break; 454 default: 455 return(EINVAL); 456 break; 457 } 458 return(0); 459 } 460 461 paddr_t 462 etmmap(dev_t dev, off_t offset, int prot) 463 { 464 struct et_softc *sc; 465 466 sc = device_lookup_private(&et_cd, minor(dev)); 467 468 /* 469 * control registers 470 * mapped from offset 0x0 to REG_MAPPABLE 471 */ 472 if (offset >= 0 && offset <= sc->sc_iosize) 473 return(m68k_btop(sc->sc_iobase + offset)); 474 475 /* 476 * VGA memory 477 * mapped from offset 0xa0000 to 0xc0000 478 */ 479 if (offset >= VGA_BASE && offset < (VGA_MAPPABLE + VGA_BASE)) 480 return(m68k_btop(sc->sc_maddr + offset - VGA_BASE)); 481 482 /* 483 * frame buffer 484 * mapped from offset 0x400000 to 0x4fffff 485 */ 486 if (offset >= FRAME_BASE && offset < sc->sc_msize + FRAME_BASE) 487 return(m68k_btop(sc->sc_maddr + offset - FRAME_BASE)); 488 489 return(-1); 490 } 491 492 int 493 eton(dev_t dev) 494 { 495 struct et_softc *sc; 496 497 if (minor(dev) >= et_cd.cd_ndevs) 498 return(ENXIO); 499 sc = device_lookup_private(&et_cd, minor(dev)); 500 if (sc == NULL) 501 return(ENXIO); 502 return(0); 503 } 504 505 int 506 etoff(dev_t dev) 507 { 508 return(0); 509 } 510 511
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