et4000.c revision 1.18
1 /* $NetBSD: et4000.c,v 1.18 2009/03/14 21:04:08 dsl Exp $ */ 2 /*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Julian Coleman. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 18 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 20 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 28 * POSSIBILITY OF SUCH DAMAGE. 29 */ 30 31 /* 32 * Thanks to: 33 * Leo Weppelman 34 * 'Maximum Entropy' 35 * Thomas Gerner 36 * Juergen Orscheidt 37 * for their help and for code that I could refer to when writing this driver. 38 * 39 * Defining DEBUG_ET4000 will cause the driver to *always* attach. Use for 40 * debugging register settings. 41 */ 42 43 /* 44 #define DEBUG_ET4000 45 */ 46 47 #include <sys/cdefs.h> 48 __KERNEL_RCSID(0, "$NetBSD: et4000.c,v 1.18 2009/03/14 21:04:08 dsl Exp $"); 49 50 #include <sys/param.h> 51 #include <sys/ioctl.h> 52 #include <sys/queue.h> 53 #include <sys/malloc.h> 54 #include <sys/device.h> 55 #include <sys/systm.h> 56 #include <sys/conf.h> 57 #include <sys/event.h> 58 #include <atari/vme/vmevar.h> 59 60 #include <machine/iomap.h> 61 #include <machine/video.h> 62 #include <machine/mfp.h> 63 #include <machine/cpu.h> 64 #include <atari/atari/device.h> 65 #include <atari/dev/grfioctl.h> 66 #include <atari/dev/grf_etreg.h> 67 68 /* 69 * Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This 70 * is more or less required by the XFree server. The X server also 71 * requires that the frame buffer be mapped above 0x3fffff. 72 */ 73 #define REG_MAPPABLE (8 * 1024) /* 0x2000 */ 74 #define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */ 75 #define FRAME_BASE (4 * 1024 * 1024) /* 0x400000 */ 76 #define VGA_MAPPABLE (128 * 1024) /* 0x20000 */ 77 #define VGA_BASE 0xa0000 78 79 static int et_vme_match(struct device *, struct cfdata *, void *); 80 static void et_vme_attach(struct device *, struct device *, void *); 81 static int et_probe_addresses(struct vme_attach_args *); 82 static void et_start(bus_space_tag_t *, bus_space_handle_t *, int *, 83 u_char *); 84 static void et_stop(bus_space_tag_t *, bus_space_handle_t *, int *, 85 u_char *); 86 static int et_detect(bus_space_tag_t *, bus_space_tag_t *, 87 bus_space_handle_t *, bus_space_handle_t *, u_int); 88 89 int eton(dev_t); 90 int etoff(dev_t); 91 92 /* Register and screen memory addresses for ET4000 based VME cards */ 93 static struct et_addresses { 94 u_long io_addr; 95 u_long io_size; 96 u_long mem_addr; 97 u_long mem_size; 98 } etstd[] = { 99 { 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */ 100 { 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */ 101 { 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */ 102 }; 103 104 #define NETSTD (sizeof(etstd) / sizeof(etstd[0])) 105 106 struct grfabs_et_priv { 107 volatile void * regkva; 108 volatile void * memkva; 109 int regsz; 110 int memsz; 111 } et_priv; 112 113 struct et_softc { 114 struct device sc_dev; 115 bus_space_tag_t sc_iot; 116 bus_space_tag_t sc_memt; 117 bus_space_handle_t sc_ioh; 118 bus_space_handle_t sc_memh; 119 int sc_flags; 120 int sc_iobase; 121 int sc_maddr; 122 int sc_iosize; 123 int sc_msize; 124 }; 125 126 #define ET_SC_FLAGS_INUSE 1 127 128 CFATTACH_DECL(et, sizeof(struct et_softc), 129 et_vme_match, et_vme_attach, NULL, NULL); 130 131 extern struct cfdriver et_cd; 132 133 dev_type_open(etopen); 134 dev_type_close(etclose); 135 dev_type_read(etread); 136 dev_type_write(etwrite); 137 dev_type_ioctl(etioctl); 138 dev_type_mmap(etmmap); 139 140 const struct cdevsw et_cdevsw = { 141 etopen, etclose, etread, etwrite, etioctl, 142 nostop, notty, nopoll, etmmap, nokqfilter, 143 }; 144 145 /* 146 * Look for a ET4000 (Crazy Dots) card on the VME bus. We might 147 * match Spektrum cards too (untested). 148 */ 149 int 150 et_vme_match(struct device *pdp, struct cfdata *cfp, void *auxp) 151 { 152 struct vme_attach_args *va = auxp; 153 154 return(et_probe_addresses(va)); 155 } 156 157 static int 158 et_probe_addresses(struct vme_attach_args *va) 159 { 160 int i, found = 0; 161 bus_space_tag_t iot; 162 bus_space_tag_t memt; 163 bus_space_handle_t ioh; 164 bus_space_handle_t memh; 165 166 iot = va->va_iot; 167 memt = va->va_memt; 168 169 /* Loop around our possible addresses looking for a match */ 170 for (i = 0; i < NETSTD; i++) { 171 struct et_addresses *et_ap = &etstd[i]; 172 struct vme_attach_args vat = *va; 173 174 if (vat.va_irq != VMECF_IRQ_DEFAULT) { 175 printf("et probe: config error: no irq support\n"); 176 return(0); 177 } 178 if (vat.va_iobase == VMECF_IOPORT_DEFAULT) 179 vat.va_iobase = et_ap->io_addr; 180 if (vat.va_maddr == VMECF_MEM_DEFAULT) 181 vat.va_maddr = et_ap->mem_addr; 182 if (vat.va_iosize == VMECF_IOSIZE_DEFAULT) 183 vat.va_iosize = et_ap->io_size; 184 if (vat.va_msize == VMECF_MEMSIZ_DEFAULT) 185 vat.va_msize = et_ap->mem_size; 186 if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0, 187 &ioh)) { 188 printf("et probe: cannot map io area\n"); 189 return(0); 190 } 191 if (bus_space_map(memt, vat.va_maddr, vat.va_msize, 192 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE, 193 &memh)) { 194 bus_space_unmap(iot, ioh, vat.va_iosize); 195 printf("et probe: cannot map memory area\n"); 196 return(0); 197 } 198 found = et_detect(&iot, &memt, &ioh, &memh, vat.va_msize); 199 bus_space_unmap(iot, ioh, vat.va_iosize); 200 bus_space_unmap(memt, memh, vat.va_msize); 201 if (found) { 202 *va = vat; 203 return(1); 204 } 205 } 206 return(0); 207 } 208 209 static void 210 et_start(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 211 { 212 /* Enable VGA */ 213 bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01); 214 /* Check whether colour (base = 3d0) or mono (base = 3b0) mode */ 215 *vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01) 216 ? 0x3d0 : 0x3b0; 217 /* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */ 218 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03); 219 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0); 220 /* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */ 221 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36); 222 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0); 223 /* Enable writes to CRTC[0..7] */ 224 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 225 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 226 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f); 227 /* Map all memory for video modes */ 228 bus_space_write_1(*iot, *ioh, 0x3ce, 0x06); 229 bus_space_write_1(*iot, *ioh, 0x3cf, 0x01); 230 } 231 232 static void 233 et_stop(bus_space_tag_t *iot, bus_space_handle_t *ioh, int *vgabase, u_char *saved) 234 { 235 /* Restore writes to CRTC[0..7] */ 236 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 237 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 238 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80); 239 /* Disable 'Tseng Extensions' */ 240 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00); 241 bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29); 242 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01); 243 } 244 245 static int 246 et_detect(bus_space_tag_t *iot, bus_space_tag_t *memt, bus_space_handle_t *ioh, bus_space_handle_t *memh, u_int memsize) 247 { 248 u_char orig, new, saved; 249 int vgabase; 250 251 /* Test accessibility of registers and memory */ 252 if(!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R)) 253 return(0); 254 if(!bus_space_peek_1(*memt, *memh, 0)) 255 return(0); 256 257 et_start(iot, ioh, &vgabase, &saved); 258 259 /* Is the card a Tseng card? Check read/write of ATC[16] */ 260 (void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a); 261 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 262 orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 263 bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10)); 264 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 265 new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 266 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig); 267 if (new != (orig ^ 0x10)) { 268 #ifdef DEBUG_ET4000 269 printf("et4000: ATC[16] failed (%x != %x)\n", 270 new, (orig ^ 0x10)); 271 #else 272 et_stop(iot, ioh, &vgabase, &saved); 273 return(0); 274 #endif 275 } 276 /* Is the card and ET4000? Check read/write of CRTC[33] */ 277 bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33); 278 orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 279 bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f)); 280 new = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 281 bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig); 282 if (new != (orig ^ 0x0f)) { 283 #ifdef DEBUG_ET4000 284 printf("et4000: CRTC[33] failed (%x != %x)\n", 285 new, (orig ^ 0x0f)); 286 #else 287 et_stop(iot, ioh, &vgabase, &saved); 288 return(0); 289 #endif 290 } 291 292 /* Set up video memory so we can read & write it */ 293 bus_space_write_1(*iot, *ioh, 0x3c4, 0x04); 294 bus_space_write_1(*iot, *ioh, 0x3c5, 0x06); 295 bus_space_write_1(*iot, *ioh, 0x3c4, 0x07); 296 bus_space_write_1(*iot, *ioh, 0x3c5, 0xa8); 297 bus_space_write_1(*iot, *ioh, 0x3ce, 0x01); 298 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 299 bus_space_write_1(*iot, *ioh, 0x3ce, 0x03); 300 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 301 bus_space_write_1(*iot, *ioh, 0x3ce, 0x05); 302 bus_space_write_1(*iot, *ioh, 0x3cf, 0x40); 303 304 #define TEST_PATTERN 0xa5a5a5a5 305 306 bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN); 307 if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN) 308 { 309 #ifdef DEBUG_ET4000 310 printf("et4000: Video base write/read failed\n"); 311 #else 312 et_stop(iot, ioh, &vgabase, &saved); 313 return(0); 314 #endif 315 } 316 bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN); 317 if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN) 318 { 319 #ifdef DEBUG_ET4000 320 printf("et4000: Video top write/read failed\n"); 321 #else 322 et_stop(iot, ioh, &vgabase, &saved); 323 return(0); 324 #endif 325 } 326 327 et_stop(iot, ioh, &vgabase, &saved); 328 return(1); 329 } 330 331 static void 332 et_vme_attach(struct device *parent, struct device *self, void *aux) 333 { 334 struct et_softc *sc = (struct et_softc *)self; 335 struct vme_attach_args *va = aux; 336 bus_space_handle_t ioh; 337 bus_space_handle_t memh; 338 339 printf("\n"); 340 341 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 342 panic("et attach: cannot map io area"); 343 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 344 panic("et attach: cannot map mem area"); 345 346 sc->sc_iot = va->va_iot; 347 sc->sc_ioh = ioh; 348 sc->sc_memt = va->va_memt; 349 sc->sc_memh = memh; 350 sc->sc_flags = 0; 351 sc->sc_iobase = va->va_iobase; 352 sc->sc_maddr = va->va_maddr; 353 sc->sc_iosize = va->va_iosize; 354 sc->sc_msize = va->va_msize; 355 356 et_priv.regkva = (volatile void *)ioh; 357 et_priv.memkva = (volatile void *)memh; 358 et_priv.regsz = va->va_iosize; 359 et_priv.memsz = va->va_msize; 360 } 361 362 int 363 etopen(dev_t dev, int flags, int devtype, struct lwp *l) 364 { 365 struct et_softc *sc; 366 367 sc = device_lookup_private(&et_cd, minor(dev)); 368 if (sc == NULL) 369 return(ENXIO); 370 if (sc->sc_flags & ET_SC_FLAGS_INUSE) 371 return(EBUSY); 372 sc->sc_flags |= ET_SC_FLAGS_INUSE; 373 return(0); 374 } 375 376 int 377 etclose(dev_t dev, int flags, int devtype, struct lwp *l) 378 { 379 struct et_softc *sc; 380 381 /* 382 * XXX: Should we reset to a default mode? 383 */ 384 sc = device_lookup_private(&et_cd, minor(dev)); 385 sc->sc_flags &= ~ET_SC_FLAGS_INUSE; 386 return(0); 387 } 388 389 int 390 etread(dev_t dev, struct uio *uio, int flags) 391 { 392 return(EINVAL); 393 } 394 395 int 396 etwrite(dev_t dev, struct uio *uio, int flags) 397 { 398 return(EINVAL); 399 } 400 401 int 402 etioctl(dev_t dev, u_long cmd, void *data, int flags, struct lwp *l) 403 { 404 struct grfinfo g_display; 405 struct et_softc *sc; 406 407 sc = device_lookup_private(&et_cd, minor(dev)); 408 switch (cmd) { 409 case GRFIOCON: 410 return(0); 411 break; 412 case GRFIOCOFF: 413 return(0); 414 break; 415 case GRFIOCGINFO: 416 g_display.gd_fbaddr = (void *) (sc->sc_maddr); 417 g_display.gd_fbsize = sc->sc_msize; 418 g_display.gd_linbase = FRAME_BASE; 419 g_display.gd_regaddr = (void *) (sc->sc_iobase); 420 g_display.gd_regsize = sc->sc_iosize; 421 g_display.gd_vgaaddr = (void *) (sc->sc_maddr); 422 g_display.gd_vgasize = VGA_MAPPABLE; 423 g_display.gd_vgabase = VGA_BASE; 424 g_display.gd_colors = 16; 425 g_display.gd_planes = 4; 426 g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */ 427 g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */ 428 g_display.gd_fbx = 0; 429 g_display.gd_fby = 0; 430 g_display.gd_dwidth = 0; 431 g_display.gd_dheight = 0; 432 g_display.gd_dx = 0; 433 g_display.gd_dy = 0; 434 g_display.gd_bank_size = 0; 435 bcopy((void *)&g_display, data, sizeof(struct grfinfo)); 436 break; 437 case GRFIOCMAP: 438 return(EINVAL); 439 break; 440 case GRFIOCUNMAP: 441 return(EINVAL); 442 break; 443 default: 444 return(EINVAL); 445 break; 446 } 447 return(0); 448 } 449 450 paddr_t 451 etmmap(dev_t dev, off_t offset, int prot) 452 { 453 struct et_softc *sc; 454 455 sc = device_lookup_private(&et_cd, minor(dev)); 456 457 /* 458 * control registers 459 * mapped from offset 0x0 to REG_MAPPABLE 460 */ 461 if (offset >= 0 && offset <= sc->sc_iosize) 462 return(m68k_btop(sc->sc_iobase + offset)); 463 464 /* 465 * VGA memory 466 * mapped from offset 0xa0000 to 0xc0000 467 */ 468 if (offset >= VGA_BASE && offset < (VGA_MAPPABLE + VGA_BASE)) 469 return(m68k_btop(sc->sc_maddr + offset - VGA_BASE)); 470 471 /* 472 * frame buffer 473 * mapped from offset 0x400000 to 0x4fffff 474 */ 475 if (offset >= FRAME_BASE && offset < sc->sc_msize + FRAME_BASE) 476 return(m68k_btop(sc->sc_maddr + offset - FRAME_BASE)); 477 478 return(-1); 479 } 480 481 int 482 eton(dev_t dev) 483 { 484 struct et_softc *sc; 485 486 if (minor(dev) >= et_cd.cd_ndevs) 487 return(ENXIO); 488 sc = device_lookup_private(&et_cd, minor(dev)); 489 if (sc == NULL) 490 return(ENXIO); 491 return(0); 492 } 493 494 int 495 etoff(dev_t dev) 496 { 497 return(0); 498 } 499 500
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