et4000.c revision 1.2
1 /* $NetBSD: et4000.c,v 1.2 1998/09/14 14:25:38 leo Exp $ */ 2 /*- 3 * Copyright (c) 1998 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Julian Coleman. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 /* 39 * Thanks to: 40 * Leo Weppelman 41 * 'Maximum Entropy' 42 * Thomas Gerner 43 * Juergen Orscheidt 44 * for their help and for code that I could refer to when writing this driver. 45 */ 46 47 /* 48 #define DEBUG_ET4000 49 */ 50 51 #include <sys/param.h> 52 #include <sys/ioctl.h> 53 #include <sys/queue.h> 54 #include <sys/malloc.h> 55 #include <sys/device.h> 56 #include <sys/systm.h> 57 #include <sys/conf.h> 58 #include <atari/vme/vmevar.h> 59 60 #include <machine/iomap.h> 61 #include <machine/video.h> 62 #include <machine/mfp.h> 63 #include <machine/cpu.h> 64 #include <atari/atari/device.h> 65 #include <atari/dev/grfioctl.h> 66 #include <atari/dev/grf_etreg.h> 67 68 /* 69 * Allow a 8Kb io-region and a 1MB frame buffer to be mapped. This 70 * is more or less required by the XFree server. 71 */ 72 #define REG_MAPPABLE (8 * 1024) /* 0x2000 */ 73 #define FRAME_MAPPABLE (1 * 1024 * 1024) /* 0x100000 */ 74 #define FRAME_OFFSET (1 * 1024 * 1024) /* 0x100000 */ 75 76 static int et_vme_match __P((struct device *, struct cfdata *, void *)); 77 static void et_vme_attach __P((struct device *, struct device *, void *)); 78 static int et_probe_addresses __P((struct vme_attach_args *)); 79 static void et_start __P((bus_space_tag_t *, bus_space_handle_t *, int *, 80 u_char *)); 81 static void et_stop __P((bus_space_tag_t *, bus_space_handle_t *, int *, 82 u_char *)); 83 static int et_detect __P((bus_space_tag_t *, bus_space_tag_t *, 84 bus_space_handle_t *, bus_space_handle_t *, u_int)); 85 86 dev_decl(et,open); 87 dev_decl(et,close); 88 dev_decl(et,read); 89 dev_decl(et,write); 90 dev_decl(et,ioctl); 91 dev_decl(et,mmap); 92 93 int eton __P((dev_t)); 94 int etoff __P((dev_t)); 95 96 /* Register and screen memory addresses for ET4000 based VME cards */ 97 static struct et_addresses { 98 u_long io_addr; 99 u_long io_size; 100 u_long mem_addr; 101 u_long mem_size; 102 } etstd[] = { 103 { 0xfebf0000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Crazy Dots VME & II */ 104 { 0xfed00000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE }, /* Spektrum I & HC */ 105 { 0xfed80000, REG_MAPPABLE, 0xfec00000, FRAME_MAPPABLE } /* Spektrum TC */ 106 }; 107 108 #define NETSTD (sizeof(etstd) / sizeof(etstd[0])) 109 110 struct grfabs_et_priv { 111 volatile caddr_t regkva; 112 volatile caddr_t memkva; 113 int regsz; 114 int memsz; 115 } et_priv; 116 117 struct et_softc { 118 struct device sc_dev; 119 bus_space_tag_t sc_iot; 120 bus_space_tag_t sc_memt; 121 bus_space_handle_t sc_ioh; 122 bus_space_handle_t sc_memh; 123 int sc_flags; 124 int sc_iobase; 125 int sc_maddr; 126 int sc_iosize; 127 int sc_msize; 128 }; 129 130 #define ET_SC_FLAGS_INUSE 1 131 132 struct cfattach et_ca = { 133 sizeof(struct et_softc), et_vme_match, et_vme_attach 134 }; 135 136 extern struct cfdriver et_cd; 137 138 /* 139 * Look for a ET4000 (Crazy Dots) card on the VME bus. We might 140 * match Spektrum cards too (untested). 141 */ 142 int 143 et_vme_match(pdp, cfp, auxp) 144 struct device *pdp; 145 struct cfdata *cfp; 146 void *auxp; 147 { 148 struct vme_attach_args *va = auxp; 149 150 return(et_probe_addresses(va)); 151 } 152 153 static int 154 et_probe_addresses(va) 155 struct vme_attach_args *va; 156 { 157 int i, found = 0; 158 bus_space_tag_t iot; 159 bus_space_tag_t memt; 160 bus_space_handle_t ioh; 161 bus_space_handle_t memh; 162 163 iot = va->va_iot; 164 memt = va->va_memt; 165 166 /* Loop around our possible addresses looking for a match */ 167 for (i = 0; i < NETSTD; i++) { 168 struct et_addresses *et_ap = &etstd[i]; 169 struct vme_attach_args vat = *va; 170 171 if (vat.va_irq != VMECF_IRQ_DEFAULT) { 172 printf("et probe: config error: no irq support\n"); 173 return(0); 174 } 175 if (vat.va_iobase == VMECF_IOPORT_DEFAULT) 176 vat.va_iobase = et_ap->io_addr; 177 if (vat.va_maddr == VMECF_MEM_DEFAULT) 178 vat.va_maddr = et_ap->mem_addr; 179 if (vat.va_iosize == VMECF_IOSIZE_DEFAULT) 180 vat.va_iosize = et_ap->io_size; 181 if (vat.va_msize == VMECF_MEMSIZ_DEFAULT) 182 vat.va_msize = et_ap->mem_size; 183 if (bus_space_map(iot, vat.va_iobase, vat.va_iosize, 0, 184 &ioh)) { 185 printf("et probe: cannot map io area\n"); 186 return(0); 187 } 188 if (bus_space_map(memt, vat.va_maddr, vat.va_msize, 189 BUS_SPACE_MAP_LINEAR|BUS_SPACE_MAP_CACHEABLE, 190 &memh)) { 191 bus_space_unmap(iot, (caddr_t)vat.va_iobase, 192 vat.va_iosize); 193 printf("et probe: cannot map memory area\n"); 194 return(0); 195 } 196 found = et_detect(&iot, &memt, &ioh, &memh, vat.va_msize); 197 bus_space_unmap(iot, (caddr_t)vat.va_iobase, vat.va_iosize); 198 bus_space_unmap(memt, (caddr_t)vat.va_maddr, vat.va_msize); 199 if (found) { 200 *va = vat; 201 return(1); 202 } 203 } 204 return(0); 205 } 206 207 static void 208 et_start(iot, ioh, vgabase, saved) 209 bus_space_tag_t *iot; 210 bus_space_handle_t *ioh; 211 int *vgabase; 212 u_char *saved; 213 { 214 /* Enable VGA */ 215 bus_space_write_1(*iot, *ioh, GREG_VIDEOSYSENABLE, 0x01); 216 /* Check whether colour (base = 3d0) or mono (base = 3b0) mode */ 217 *vgabase = (bus_space_read_1(*iot, *ioh, GREG_MISC_OUTPUT_R) & 0x01) 218 ? 0x3d0 : 0x3b0; 219 /* Enable 'Tseng Extensions' - writes to CRTC and ATC[16] */ 220 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x03); 221 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0xa0); 222 /* Set up 16 bit I/O, memory, Tseng addressing and linear mapping */ 223 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x36); 224 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, 0xf0); 225 /* Enable writes to CRTC[0..7] */ 226 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 227 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 228 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved & 0x7f); 229 /* Map all memory for video modes */ 230 bus_space_write_1(*iot, *ioh, 0x3ce, 0x06); 231 bus_space_write_1(*iot, *ioh, 0x3cf, 0x01); 232 } 233 234 static void 235 et_stop(iot, ioh, vgabase, saved) 236 bus_space_tag_t *iot; 237 bus_space_handle_t *ioh; 238 int *vgabase; 239 u_char *saved; 240 { 241 /* Restore writes to CRTC[0..7] */ 242 bus_space_write_1(*iot, *ioh, *vgabase + 0x04, 0x11); 243 *saved = bus_space_read_1(*iot, *ioh, *vgabase + 0x05); 244 bus_space_write_1(*iot, *ioh, *vgabase + 0x05, *saved | 0x80); 245 /* Disable 'Tseng Extensions' */ 246 bus_space_write_1(*iot, *ioh, *vgabase + 0x08, 0x00); 247 bus_space_write_1(*iot, *ioh, GREG_DISPMODECONTROL, 0x29); 248 bus_space_write_1(*iot, *ioh, GREG_HERCULESCOMPAT, 0x01); 249 } 250 251 static int 252 et_detect(iot, memt, ioh, memh, memsize) 253 bus_space_tag_t *iot, *memt; 254 bus_space_handle_t *ioh, *memh; 255 u_int memsize; 256 { 257 u_char orig, new, saved; 258 int vgabase; 259 260 /* Test accessibility of registers and memory */ 261 if(!bus_space_peek_1(*iot, *ioh, GREG_STATUS1_R)) 262 return(0); 263 if(!bus_space_peek_1(*memt, *memh, 0)) 264 return(0); 265 266 et_start(iot, ioh, &vgabase, &saved); 267 268 /* Is the card a Tseng card? Check read/write of ATC[16] */ 269 (void)bus_space_read_1(*iot, *ioh, vgabase + 0x0a); 270 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 271 orig = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 272 bus_space_write_1(*iot, *ioh, ACT_ADDRESS_W, (orig ^ 0x10)); 273 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, 0x16 | 0x20); 274 new = bus_space_read_1(*iot, *ioh, ACT_ADDRESS_R); 275 bus_space_write_1(*iot, *ioh, ACT_ADDRESS, orig); 276 if (new != (orig ^ 0x10)) { 277 #ifdef DEBUG_ET4000 278 printf("et4000: ATC[16] failed (%x != %x)\n", 279 new, (orig ^ 0x10)); 280 #endif 281 et_stop(iot, ioh, &vgabase, &saved); 282 return(0); 283 } 284 /* Is the card and ET4000? Check read/write of CRTC[33] */ 285 bus_space_write_1(*iot, *ioh, vgabase + 0x04, 0x33); 286 orig = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 287 bus_space_write_1(*iot, *ioh, vgabase + 0x05, (orig ^ 0x0f)); 288 new = bus_space_read_1(*iot, *ioh, vgabase + 0x05); 289 bus_space_write_1(*iot, *ioh, vgabase + 0x05, orig); 290 if (new != (orig ^ 0x0f)) { 291 #ifdef DEBUG_ET4000 292 printf("et4000: CRTC[33] failed (%x != %x)\n", 293 new, (orig ^ 0x0f)); 294 #endif 295 et_stop(iot, ioh, &vgabase, &saved); 296 return(0); 297 } 298 299 /* Set up video memory so we can read & write it */ 300 bus_space_write_1(*iot, *ioh, 0x3c4, 0x04); 301 bus_space_write_1(*iot, *ioh, 0x3c5, 0x0e); 302 bus_space_write_1(*iot, *ioh, 0x3ce, 0x01); 303 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 304 bus_space_write_1(*iot, *ioh, 0x3ce, 0x03); 305 bus_space_write_1(*iot, *ioh, 0x3cf, 0x00); 306 bus_space_write_1(*iot, *ioh, 0x3ce, 0x05); 307 bus_space_write_1(*iot, *ioh, 0x3cf, 0x40); 308 309 #define TEST_PATTERN 0xa5a5a5a5 310 311 bus_space_write_4(*memt, *memh, 0x0, TEST_PATTERN); 312 if (bus_space_read_4(*memt, *memh, 0x0) != TEST_PATTERN) 313 { 314 #ifdef DEBUG_ET4000 315 printf("et4000: Video base write/read failed\n"); 316 #endif 317 et_stop(iot, ioh, &vgabase, &saved); 318 return(0); 319 } 320 bus_space_write_4(*memt, *memh, memsize - 4, TEST_PATTERN); 321 if (bus_space_read_4(*memt, *memh, memsize - 4) != TEST_PATTERN) 322 { 323 #ifdef DEBUG_ET4000 324 printf("et4000: Video top write/read failed\n"); 325 #endif 326 et_stop(iot, ioh, &vgabase, &saved); 327 return(0); 328 } 329 330 et_stop(iot, ioh, &vgabase, &saved); 331 return(1); 332 } 333 334 static void 335 et_vme_attach(parent, self, aux) 336 struct device *parent, *self; 337 void *aux; 338 { 339 struct et_softc *sc = (struct et_softc *)self; 340 struct vme_attach_args *va = aux; 341 bus_space_handle_t ioh; 342 bus_space_handle_t memh; 343 344 printf("\n"); 345 346 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 347 panic("et attach: cannot map io area\n"); 348 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 349 panic("et attach: cannot map mem area\n"); 350 351 sc->sc_iot = va->va_iot; 352 sc->sc_ioh = ioh; 353 sc->sc_memt = va->va_memt; 354 sc->sc_memh = memh; 355 sc->sc_flags = 0; 356 sc->sc_iobase = va->va_iobase; 357 sc->sc_maddr = va->va_maddr; 358 sc->sc_iosize = va->va_iosize; 359 sc->sc_msize = va->va_msize; 360 361 et_priv.regkva = (volatile caddr_t)ioh; 362 et_priv.memkva = (volatile caddr_t)memh; 363 et_priv.regsz = va->va_iosize; 364 et_priv.memsz = va->va_msize; 365 } 366 367 int 368 etopen(dev, flags, devtype, p) 369 dev_t dev; 370 int flags, devtype; 371 struct proc *p; 372 { 373 struct et_softc *sc; 374 375 if (minor(dev) >= et_cd.cd_ndevs) 376 return(ENXIO); 377 sc = et_cd.cd_devs[minor(dev)]; 378 if (sc->sc_flags & ET_SC_FLAGS_INUSE) 379 return(EBUSY); 380 sc->sc_flags |= ET_SC_FLAGS_INUSE; 381 return(0); 382 } 383 384 int 385 etclose(dev, flags, devtype, p) 386 dev_t dev; 387 int flags, devtype; 388 struct proc *p; 389 { 390 struct et_softc *sc; 391 392 /* 393 * XXX: Should we reset to a default mode? 394 */ 395 sc = et_cd.cd_devs[minor(dev)]; 396 sc->sc_flags &= ~ET_SC_FLAGS_INUSE; 397 return(0); 398 } 399 400 int 401 etread(dev, uio, flags) 402 dev_t dev; 403 struct uio *uio; 404 int flags; 405 { 406 return(EINVAL); 407 } 408 409 int 410 etwrite(dev, uio, flags) 411 dev_t dev; 412 struct uio *uio; 413 int flags; 414 { 415 return(EINVAL); 416 } 417 418 int 419 etioctl(dev, cmd, data, flags, p) 420 dev_t dev; 421 u_long cmd; 422 caddr_t data; 423 int flags; 424 struct proc *p; 425 { 426 struct grfinfo g_display; 427 struct et_softc *sc; 428 429 sc = et_cd.cd_devs[minor(dev)]; 430 switch (cmd) { 431 case GRFIOCON: 432 return(0); 433 break; 434 case GRFIOCOFF: 435 return(0); 436 break; 437 case GRFIOCGINFO: 438 g_display.gd_fbaddr = (caddr_t)sc->sc_maddr; 439 g_display.gd_fbsize = sc->sc_msize; 440 g_display.gd_regaddr = (caddr_t)sc->sc_iobase; 441 g_display.gd_regsize = sc->sc_iosize; 442 g_display.gd_colors = 16; 443 g_display.gd_planes = 4; 444 g_display.gd_fbwidth = 640; /* XXX: should be 'unknown' */ 445 g_display.gd_fbheight = 400; /* XXX: should be 'unknown' */ 446 g_display.gd_fbx = 0; 447 g_display.gd_fby = 0; 448 g_display.gd_dwidth = 0; 449 g_display.gd_dheight = 0; 450 g_display.gd_dx = 0; 451 g_display.gd_dy = 0; 452 g_display.gd_bank_size = 0; 453 bcopy((caddr_t)&g_display, data, sizeof(struct grfinfo)); 454 break; 455 case GRFIOCMAP: 456 return(EINVAL); 457 break; 458 case GRFIOCUNMAP: 459 return(EINVAL); 460 break; 461 default: 462 return(EINVAL); 463 break; 464 } 465 return(0); 466 } 467 468 int 469 etmmap(dev, offset, prot) 470 dev_t dev; 471 int offset, prot; 472 { 473 struct et_softc *sc; 474 475 sc = et_cd.cd_devs[minor(dev)]; 476 477 /* 478 * control registers 479 * mapped from offset 0x0 to REG_MAPPABLE 480 */ 481 if (offset >= 0 && offset <= sc->sc_iosize) 482 return(m68k_btop(sc->sc_iobase + offset)); 483 484 /* 485 * frame buffer 486 * mapped from offset 0x100000 to 0x1fffff 487 */ 488 if (offset >= FRAME_OFFSET && offset < sc->sc_msize + FRAME_OFFSET) 489 return(m68k_btop(sc->sc_maddr + offset - FRAME_OFFSET)); 490 491 return(-1); 492 } 493 494 int 495 eton(dev) 496 dev_t dev; 497 { 498 struct et_softc *sc; 499 500 if (minor(dev) >= et_cd.cd_ndevs) 501 return(ENXIO); 502 sc = et_cd.cd_devs[minor(dev)]; 503 if (!sc) 504 return(ENXIO); 505 return(0); 506 } 507 508 int 509 etoff(dev) 510 dev_t dev; 511 { 512 return(0); 513 } 514 515
Indexes created Mon Sep 29 21:09:56 GMT 2025