if_le_vme.c revision 1.31.58.1
1 /* $NetBSD: if_le_vme.c,v 1.31.58.1 2022/09/11 18:21:56 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 maximum entropy. All rights reserved. 5 * Copyright (c) 1997 Leo Weppelman. All rights reserved. 6 * Copyright (c) 1992, 1993 7 * The Regents of the University of California. All rights reserved. 8 * 9 * This code is derived from software contributed to Berkeley by 10 * Ralph Campbell and Rick Macklem. 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 3. Neither the name of the University nor the names of its contributors 21 * may be used to endorse or promote products derived from this software 22 * without specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 * @(#)if_le.c 8.2 (Berkeley) 11/16/93 37 */ 38 39 /*- 40 * Copyright (c) 1995 Charles M. Hannum. All rights reserved. 41 * 42 * This code is derived from software contributed to Berkeley by 43 * Ralph Campbell and Rick Macklem. 44 * 45 * Redistribution and use in source and binary forms, with or without 46 * modification, are permitted provided that the following conditions 47 * are met: 48 * 1. Redistributions of source code must retain the above copyright 49 * notice, this list of conditions and the following disclaimer. 50 * 2. Redistributions in binary form must reproduce the above copyright 51 * notice, this list of conditions and the following disclaimer in the 52 * documentation and/or other materials provided with the distribution. 53 * 3. All advertising materials mentioning features or use of this software 54 * must display the following acknowledgement: 55 * This product includes software developed by the University of 56 * California, Berkeley and its contributors. 57 * 4. Neither the name of the University nor the names of its contributors 58 * may be used to endorse or promote products derived from this software 59 * without specific prior written permission. 60 * 61 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 62 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 63 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 64 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 65 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 66 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 67 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 68 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 69 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 70 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 71 * SUCH DAMAGE. 72 * 73 * @(#)if_le.c 8.2 (Berkeley) 11/16/93 74 */ 75 76 #include <sys/cdefs.h> 77 __KERNEL_RCSID(0, "$NetBSD: if_le_vme.c,v 1.31.58.1 2022/09/11 18:21:56 martin Exp $"); 78 79 #include "opt_inet.h" 80 81 #include <sys/param.h> 82 #include <sys/systm.h> 83 #include <sys/mbuf.h> 84 #include <sys/syslog.h> 85 #include <sys/socket.h> 86 #include <sys/device.h> 87 88 #include <net/if.h> 89 #include <net/if_media.h> 90 #include <net/if_ether.h> 91 92 #ifdef INET 93 #include <netinet/in.h> 94 #include <netinet/if_inarp.h> 95 #endif 96 97 #include <machine/cpu.h> 98 #include <sys/bus.h> 99 #include <machine/iomap.h> 100 #include <machine/scu.h> 101 #include <machine/intr.h> 102 103 #include <atari/atari/device.h> 104 105 #include <dev/ic/lancereg.h> 106 #include <dev/ic/lancevar.h> 107 #include <dev/ic/am7990reg.h> 108 #include <dev/ic/am7990var.h> 109 110 #include <atari/vme/vmevar.h> 111 #include <atari/vme/if_levar.h> 112 113 /* 114 * All cards except BVME410 have 64KB RAM. However, 115 * - On the Riebl cards the area between the offsets 0xee70-0xeec0 is used 116 * to store config data. 117 * - On PAM and ROTHRON, mem_addr cannot be mapped if reg_addr is already 118 * mapped because they are overwrapped. Just use 32KB as Linux does. 119 */ 120 struct le_addresses { 121 u_long reg_addr; 122 u_long mem_addr; 123 int irq; 124 int reg_size; 125 int mem_size; 126 int type_hint; 127 } lestd[] = { 128 { 0xfe00fff0, 0xfe010000, IRQUNK, 16, 64*1024, 129 LE_OLD_RIEBL|LE_NEW_RIEBL }, /* Riebl */ 130 { 0xfecffff0, 0xfecf0000, 5, 16, 32*1024, 131 LE_PAM }, /* PAM */ 132 { 0xfecffff0, 0xfecf0000, 5, 16, 32*1024, 133 LE_ROTHRON }, /* Rhotron */ 134 { 0xfeff4100, 0xfe000000, 4, 8, VMECF_MEMSIZ_DEFAULT, 135 LE_BVME410 } /* BVME410 */ 136 }; 137 138 #define NLESTD __arraycount(lestd) 139 140 /* 141 * Default mac for RIEBL cards without a (working) battery. The first 4 bytes 142 * are the manufacturer id. 143 */ 144 static u_char riebl_def_mac[] = { 145 0x00, 0x00, 0x36, 0x04, 0x00, 0x00 146 }; 147 148 static int le_intr(struct le_softc *, int); 149 static void lepseudointr(struct le_softc *, void *); 150 static int le_vme_match(device_t, cfdata_t, void *); 151 static void le_vme_attach(device_t, device_t, void *); 152 static int probe_addresses(bus_space_tag_t *, bus_space_tag_t *, 153 bus_space_handle_t *, bus_space_handle_t *); 154 static void riebl_skip_reserved_area(struct lance_softc *); 155 static int nm93c06_read(bus_space_tag_t, bus_space_handle_t, int); 156 static int bvme410_probe(bus_space_tag_t, bus_space_handle_t); 157 static int bvme410_mem_size(bus_space_tag_t, u_long); 158 static void bvme410_copytobuf(struct lance_softc *, void *, int, int); 159 static void bvme410_zerobuf(struct lance_softc *, int, int); 160 161 CFATTACH_DECL_NEW(le_vme, sizeof(struct le_softc), 162 le_vme_match, le_vme_attach, NULL, NULL); 163 164 #if defined(_KERNEL_OPT) 165 #include "opt_ddb.h" 166 #endif 167 168 #ifdef DDB 169 #define integrate 170 #define hide 171 #else 172 #define integrate static inline 173 #define hide static 174 #endif 175 176 hide void lewrcsr(struct lance_softc *, uint16_t, uint16_t); 177 hide uint16_t lerdcsr(struct lance_softc *, uint16_t); 178 179 hide void 180 lewrcsr(struct lance_softc *sc, uint16_t port, uint16_t val) 181 { 182 struct le_softc *lesc = (struct le_softc *)sc; 183 int s; 184 185 s = splhigh(); 186 bus_space_write_2(lesc->sc_iot, lesc->sc_ioh, LER_RAP, port); 187 bus_space_write_2(lesc->sc_iot, lesc->sc_ioh, LER_RDP, val); 188 splx(s); 189 } 190 191 hide uint16_t 192 lerdcsr(struct lance_softc *sc, uint16_t port) 193 { 194 struct le_softc *lesc = (struct le_softc *)sc; 195 uint16_t val; 196 int s; 197 198 s = splhigh(); 199 bus_space_write_2(lesc->sc_iot, lesc->sc_ioh, LER_RAP, port); 200 val = bus_space_read_2(lesc->sc_iot, lesc->sc_ioh, LER_RDP); 201 splx(s); 202 203 return val; 204 } 205 206 static int 207 le_vme_match(device_t parent, cfdata_t cfp, void *aux) 208 { 209 struct vme_attach_args *va = aux; 210 int i; 211 bus_space_tag_t iot; 212 bus_space_tag_t memt; 213 bus_space_handle_t ioh; 214 bus_space_handle_t memh; 215 216 iot = va->va_iot; 217 memt = va->va_memt; 218 219 for (i = 0; i < NLESTD; i++) { 220 struct le_addresses *le_ap = &lestd[i]; 221 int found = 0; 222 223 if ((va->va_iobase != IOBASEUNK) 224 && (va->va_iobase != le_ap->reg_addr)) 225 continue; 226 227 if ((va->va_maddr != MADDRUNK) 228 && (va->va_maddr != le_ap->mem_addr)) 229 continue; 230 231 if ((le_ap->irq != IRQUNK) && (va->va_irq != le_ap->irq)) 232 continue; 233 234 if (bus_space_map(iot, le_ap->reg_addr, le_ap->reg_size, 0, 235 &ioh)) { 236 continue; 237 } 238 if (le_ap->mem_size == VMECF_MEMSIZ_DEFAULT) { 239 if (bvme410_probe(iot, ioh)) { 240 bus_space_write_2(iot, ioh, 241 BVME410_BAR, 0x1); /* XXX */ 242 le_ap->mem_size = 243 bvme410_mem_size(memt, le_ap->mem_addr); 244 } 245 } 246 if (le_ap->mem_size == VMECF_MEMSIZ_DEFAULT) { 247 bus_space_unmap(iot, ioh, le_ap->reg_size); 248 continue; 249 } 250 251 if (bus_space_map(memt, le_ap->mem_addr, le_ap->mem_size, 0, 252 &memh)) { 253 bus_space_unmap(iot, ioh, le_ap->reg_size); 254 continue; 255 } 256 found = probe_addresses(&iot, &memt, &ioh, &memh); 257 bus_space_unmap(iot, ioh, le_ap->reg_size); 258 bus_space_unmap(memt, memh, le_ap->mem_size); 259 260 if (found) { 261 va->va_iobase = le_ap->reg_addr; 262 va->va_iosize = le_ap->reg_size; 263 va->va_maddr = le_ap->mem_addr; 264 va->va_msize = le_ap->mem_size; 265 va->va_aux = le_ap; 266 if (va->va_irq == IRQUNK) 267 va->va_irq = le_ap->irq; 268 return 1; 269 } 270 } 271 return 0; 272 } 273 274 static int 275 probe_addresses(bus_space_tag_t *iot, bus_space_tag_t *memt, 276 bus_space_handle_t *ioh, bus_space_handle_t *memh) 277 { 278 279 /* 280 * Test accesibility of register and memory area 281 */ 282 if (!bus_space_peek_2(*iot, *ioh, LER_RDP)) 283 return 0; 284 if (!bus_space_peek_1(*memt, *memh, 0)) 285 return 0; 286 287 /* 288 * Test for writable memory 289 */ 290 bus_space_write_2(*memt, *memh, 0, 0xa5a5); 291 if (bus_space_read_2(*memt, *memh, 0) != 0xa5a5) 292 return 0; 293 294 /* 295 * Test writability of selector port. 296 */ 297 bus_space_write_2(*iot, *ioh, LER_RAP, LE_CSR1); 298 if (bus_space_read_2(*iot, *ioh, LER_RAP) != LE_CSR1) 299 return 0; 300 301 /* 302 * Do a small register test 303 */ 304 bus_space_write_2(*iot, *ioh, LER_RAP, LE_CSR0); 305 bus_space_write_2(*iot, *ioh, LER_RDP, LE_C0_INIT | LE_C0_STOP); 306 if (bus_space_read_2(*iot, *ioh, LER_RDP) != LE_C0_STOP) 307 return 0; 308 309 bus_space_write_2(*iot, *ioh, LER_RDP, LE_C0_STOP); 310 if (bus_space_read_2(*iot, *ioh, LER_RDP) != LE_C0_STOP) 311 return 0; 312 313 return 1; 314 } 315 316 /* 317 * Interrupt mess. Because the card's interrupt is hardwired to either 318 * ipl5 or ipl3 (mostly on ipl5) and raising splnet to spl5() just won't do 319 * (it kills the serial at the least), we use a 2-level interrupt scheme. The 320 * card interrupt is routed to 'le_intr'. If the previous ipl was below 321 * splnet, just call the mi-function. If not, save the interrupt status, 322 * turn off card interrupts (the card is *very* persistent) and arrange 323 * for a softint 'callback' through 'lepseudointr'. 324 */ 325 static int 326 le_intr(struct le_softc *lesc, int sr) 327 { 328 struct lance_softc *sc = &lesc->sc_am7990.lsc; 329 uint16_t csr0; 330 331 if ((sr & PSL_IPL) < (ipl2psl_table[IPL_NET] & PSL_IPL)) 332 am7990_intr(sc); 333 else { 334 sc->sc_saved_csr0 = csr0 = lerdcsr(sc, LE_CSR0); 335 lewrcsr(sc, LE_CSR0, csr0 & ~LE_C0_INEA); 336 add_sicallback((si_farg)lepseudointr, lesc, sc); 337 } 338 return 1; 339 } 340 341 342 static void 343 lepseudointr(struct le_softc *lesc, void *sc) 344 { 345 int s; 346 347 s = splx(lesc->sc_splval); 348 am7990_intr(sc); 349 splx(s); 350 } 351 352 static void 353 le_vme_attach(device_t parent, device_t self, void *aux) 354 { 355 struct le_softc *lesc = device_private(self); 356 struct lance_softc *sc = &lesc->sc_am7990.lsc; 357 struct vme_attach_args *va = aux; 358 bus_space_handle_t ioh; 359 bus_space_handle_t memh; 360 struct le_addresses *le_ap; 361 int i; 362 363 sc->sc_dev = self; 364 aprint_normal("\n%s: ", device_xname(self)); 365 366 if (bus_space_map(va->va_iot, va->va_iobase, va->va_iosize, 0, &ioh)) 367 panic("leattach: cannot map io-area"); 368 if (bus_space_map(va->va_memt, va->va_maddr, va->va_msize, 0, &memh)) 369 panic("leattach: cannot map mem-area"); 370 371 lesc->sc_iot = va->va_iot; 372 lesc->sc_ioh = ioh; 373 lesc->sc_memt = va->va_memt; 374 lesc->sc_memh = memh; 375 lesc->sc_splval = (va->va_irq << 8) | PSL_S; /* XXX */ 376 le_ap = (struct le_addresses *)va->va_aux; 377 378 /* 379 * Go on to find board type 380 */ 381 if ((le_ap->type_hint & LE_PAM) && 382 bus_space_peek_1(va->va_iot, ioh, LER_EEPROM)) { 383 aprint_normal("PAM card"); 384 lesc->sc_type = LE_PAM; 385 bus_space_read_1(va->va_iot, ioh, LER_MEME); 386 } else if ((le_ap->type_hint & LE_BVME410) && 387 bvme410_probe(va->va_iot, ioh)) { 388 aprint_normal("BVME410"); 389 lesc->sc_type = LE_BVME410; 390 } else if (le_ap->type_hint & (LE_NEW_RIEBL|LE_OLD_RIEBL)) { 391 aprint_normal("Riebl card"); 392 if (bus_space_read_4(va->va_memt, memh, RIEBL_MAGIC_ADDR) == 393 RIEBL_MAGIC) 394 lesc->sc_type = LE_NEW_RIEBL; 395 else { 396 aprint_normal("(without battery) "); 397 lesc->sc_type = LE_OLD_RIEBL; 398 } 399 } else 400 aprint_error("le_vme_attach: Unsupported card!"); 401 402 switch (lesc->sc_type) { 403 case LE_BVME410: 404 sc->sc_copytodesc = bvme410_copytobuf; 405 sc->sc_copyfromdesc = lance_copyfrombuf_contig; 406 sc->sc_copytobuf = bvme410_copytobuf; 407 sc->sc_copyfrombuf = lance_copyfrombuf_contig; 408 sc->sc_zerobuf = bvme410_zerobuf; 409 break; 410 default: 411 sc->sc_copytodesc = lance_copytobuf_contig; 412 sc->sc_copyfromdesc = lance_copyfrombuf_contig; 413 sc->sc_copytobuf = lance_copytobuf_contig; 414 sc->sc_copyfrombuf = lance_copyfrombuf_contig; 415 sc->sc_zerobuf = lance_zerobuf_contig; 416 break; 417 } 418 419 sc->sc_rdcsr = lerdcsr; 420 sc->sc_wrcsr = lewrcsr; 421 sc->sc_hwinit = NULL; 422 sc->sc_conf3 = LE_C3_BSWP; 423 sc->sc_addr = 0; 424 sc->sc_memsize = va->va_msize; 425 sc->sc_mem = (void *)memh; /* XXX */ 426 427 /* 428 * Get MAC address 429 */ 430 switch (lesc->sc_type) { 431 case LE_OLD_RIEBL: 432 memcpy(sc->sc_enaddr, riebl_def_mac, 433 sizeof(sc->sc_enaddr)); 434 break; 435 case LE_NEW_RIEBL: 436 for (i = 0; i < sizeof(sc->sc_enaddr); i++) 437 sc->sc_enaddr[i] = 438 bus_space_read_1(va->va_memt, memh, i + RIEBL_MAC_ADDR); 439 break; 440 case LE_PAM: 441 i = bus_space_read_1(va->va_iot, ioh, LER_EEPROM); 442 for (i = 0; i < sizeof(sc->sc_enaddr); i++) { 443 sc->sc_enaddr[i] = 444 (bus_space_read_2(va->va_memt, memh, 2 * i) << 4) | 445 (bus_space_read_2(va->va_memt, memh, 2 * i + 1) & 0xf); 446 } 447 i = bus_space_read_1(va->va_iot, ioh, LER_MEME); 448 break; 449 case LE_BVME410: 450 for (i = 0; i < (sizeof(sc->sc_enaddr) >> 1); i++) { 451 uint16_t tmp; 452 453 tmp = nm93c06_read(va->va_iot, ioh, i); 454 sc->sc_enaddr[2 * i] = (tmp >> 8) & 0xff; 455 sc->sc_enaddr[2 * i + 1] = tmp & 0xff; 456 } 457 bus_space_write_2(va->va_iot, ioh, BVME410_BAR, 0x1); /* XXX */ 458 } 459 460 am7990_config(&lesc->sc_am7990); 461 462 if ((lesc->sc_type == LE_OLD_RIEBL) || (lesc->sc_type == LE_NEW_RIEBL)) 463 riebl_skip_reserved_area(sc); 464 465 /* 466 * XXX: We always use uservector 64.... 467 */ 468 if ((lesc->sc_intr = intr_establish(64, USER_VEC, 0, 469 (hw_ifun_t)le_intr, lesc)) == NULL) { 470 aprint_error("le_vme_attach: Can't establish interrupt\n"); 471 return; 472 } 473 474 /* 475 * Notify the card of the vector 476 */ 477 switch (lesc->sc_type) { 478 case LE_OLD_RIEBL: 479 case LE_NEW_RIEBL: 480 bus_space_write_2(va->va_memt, memh, 481 RIEBL_IVEC_ADDR, 64 + 64); 482 break; 483 case LE_PAM: 484 bus_space_write_1(va->va_iot, ioh, 485 LER_IVEC, 64 + 64); 486 break; 487 case LE_BVME410: 488 bus_space_write_2(va->va_iot, ioh, 489 BVME410_IVEC, 64 + 64); 490 break; 491 } 492 493 /* 494 * Unmask the VME-interrupt we're on 495 */ 496 if (machineid & ATARI_TT) 497 SCU->vme_mask |= 1 << va->va_irq; 498 } 499 500 /* 501 * True if 'addr' containe within [start,len] 502 */ 503 #define WITHIN(start, len, addr) \ 504 ((addr >= start) && ((addr) <= ((start) + (len)))) 505 static void 506 riebl_skip_reserved_area(struct lance_softc *sc) 507 { 508 int offset = 0; 509 int i; 510 511 for (i = 0; i < sc->sc_nrbuf; i++) { 512 if (WITHIN(sc->sc_rbufaddr[i], LEBLEN, RIEBL_RES_START) || 513 WITHIN(sc->sc_rbufaddr[i], LEBLEN, RIEBL_RES_END)) { 514 offset = RIEBL_RES_END - sc->sc_rbufaddr[i]; 515 } 516 sc->sc_rbufaddr[i] += offset; 517 } 518 519 for (i = 0; i < sc->sc_ntbuf; i++) { 520 if (WITHIN(sc->sc_tbufaddr[i], LEBLEN, RIEBL_RES_START) || 521 WITHIN(sc->sc_tbufaddr[i], LEBLEN, RIEBL_RES_END)) { 522 offset = RIEBL_RES_END - sc->sc_tbufaddr[i]; 523 } 524 sc->sc_tbufaddr[i] += offset; 525 } 526 } 527 528 static int 529 nm93c06_read(bus_space_tag_t iot, bus_space_handle_t ioh, int nm93c06reg) 530 { 531 int bar; 532 int shift; 533 int bits = 0x180 | (nm93c06reg & 0xf); 534 int data = 0; 535 536 bar = 1 << BVME410_CS_SHIFT; 537 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 538 delay(1); /* tCSS = 1 us */ 539 for (shift = 9; shift >= 0; shift--) { 540 if (((bits >> shift) & 1) == 1) 541 bar |= 1 << BVME410_DIN_SHIFT; 542 else 543 bar &= ~(1 << BVME410_DIN_SHIFT); 544 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 545 delay(1); /* tDIS = 0.4 us */ 546 bar |= 1 << BVME410_CLK_SHIFT; 547 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 548 delay(2); /* tSKH = 1 us, tSKH + tSKL >= 4 us */ 549 bar &= ~(1 << BVME410_CLK_SHIFT); 550 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 551 delay(2); /* tSKL = 1 us, tSKH + tSKL >= 4 us */ 552 } 553 bar &= ~(1 << BVME410_DIN_SHIFT); 554 for (shift = 15; shift >= 0; shift--) { 555 delay(1); /* tDIS = 100 ns, BVM manual says 0.4 us */ 556 bar |= 1 << BVME410_CLK_SHIFT; 557 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 558 delay(2); /* tSKH = 1 us, tSKH + tSKL >= 4 us */ 559 data |= (bus_space_read_2(iot, ioh, BVME410_BAR) & 1) << shift; 560 bar &= ~(1 << BVME410_CLK_SHIFT); 561 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 562 delay(2); /* tSKL = 1 us, tSKH + tSKL >= 4 us */ 563 } 564 bar &= ~(1 << BVME410_CS_SHIFT); 565 bus_space_write_2(iot, ioh, BVME410_BAR, bar); 566 delay(1); /* tCS = 1 us */ 567 return data; 568 } 569 570 static int 571 bvme410_probe(bus_space_tag_t iot, bus_space_handle_t ioh) 572 { 573 574 if (!bus_space_peek_2(iot, ioh, BVME410_IVEC)) 575 return 0; 576 577 bus_space_write_2(iot, ioh, BVME410_IVEC, 0x0000); 578 if (bus_space_read_2(iot, ioh, BVME410_IVEC) != 0xff00) 579 return 0; 580 581 bus_space_write_2(iot, ioh, BVME410_IVEC, 0xffff); 582 if (bus_space_read_2(iot, ioh, BVME410_IVEC) != 0xffff) 583 return 0; 584 585 bus_space_write_2(iot, ioh, BVME410_IVEC, 0xa5a5); 586 if (bus_space_read_2(iot, ioh, BVME410_IVEC) != 0xffa5) 587 return 0; 588 589 return 1; 590 } 591 592 static int 593 bvme410_mem_size(bus_space_tag_t memt, u_long mem_addr) 594 { 595 bus_space_handle_t memh; 596 int r; 597 598 if (bus_space_map(memt, mem_addr, 256 * 1024, 0, &memh)) 599 return VMECF_MEMSIZ_DEFAULT; 600 if (!bus_space_peek_1(memt, memh, 0)) { 601 bus_space_unmap(memt, memh, 256 * 1024); 602 return VMECF_MEMSIZ_DEFAULT; 603 } 604 bus_space_write_1(memt, memh, 0, 128); 605 bus_space_write_1(memt, memh, 64 * 1024, 32); 606 bus_space_write_1(memt, memh, 32 * 1024, 8); 607 r = (int)(bus_space_read_1(memt, memh, 0) * 2048); 608 bus_space_unmap(memt, memh, 256 * 1024); 609 return r; 610 } 611 612 /* 613 * Need to be careful when writing to the bvme410 dual port memory. 614 * Continue writing each byte until it reads back the same. 615 */ 616 617 static void 618 bvme410_copytobuf(struct lance_softc *sc, void *from, int boff, int len) 619 { 620 volatile char *buf = (volatile char *)sc->sc_mem; 621 char *f = (char *)from; 622 623 for (buf += boff; len; buf++,f++,len--) 624 do { 625 *buf = *f; 626 } while (*buf != *f); 627 } 628 629 static void 630 bvme410_zerobuf(struct lance_softc *sc, int boff, int len) 631 { 632 volatile char *buf = (volatile char *)sc->sc_mem; 633 634 for (buf += boff; len; buf++,len--) 635 do { 636 *buf = '\0'; 637 } while (*buf != '\0'); 638 } 639 640
Indexes created Sun Oct 19 02:09:48 GMT 2025