if_we_vme.c revision 1.1
1 /* $NetBSD: if_we_vme.c,v 1.1 2010/03/13 16:30:03 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 35 * adapters. 36 * 37 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 38 * 39 * Copyright (C) 1993, David Greenman. This software may be used, modified, 40 * copied, distributed, and sold, in both source and binary form provided that 41 * the above copyright and these terms are retained. Under no circumstances is 42 * the author responsible for the proper functioning of this software, nor does 43 * the author assume any responsibility for damages incurred with its use. 44 */ 45 46 /* 47 * Device driver for the SMC Elite Ultra (8216) with SMC_TT VME-ISA bridge. 48 * Based on: 49 * NetBSD: if_we_isa.c,v 1.20 2008/04/28 20:23:52 martin Exp 50 */ 51 52 #include <sys/cdefs.h> 53 __KERNEL_RCSID(0, "$NetBSD: if_we_vme.c,v 1.1 2010/03/13 16:30:03 tsutsui Exp $"); 54 55 #include <sys/param.h> 56 #include <sys/systm.h> 57 #include <sys/device.h> 58 #include <sys/socket.h> 59 #include <sys/mbuf.h> 60 #include <sys/syslog.h> 61 62 #include <net/if.h> 63 #include <net/if_dl.h> 64 #include <net/if_types.h> 65 #include <net/if_media.h> 66 67 #include <net/if_ether.h> 68 69 #include <sys/bus.h> 70 #include <sys/intr.h> 71 72 #include <machine/cpu.h> 73 #include <machine/iomap.h> 74 #include <machine/scu.h> 75 76 #include <atari/vme/vmevar.h> 77 78 #include <dev/ic/dp8390reg.h> 79 #include <dev/ic/dp8390var.h> 80 #include <dev/ic/wereg.h> 81 #include <dev/ic/wevar.h> 82 83 /* #define WE_DEBUG */ 84 #ifdef WE_DEBUG 85 #define DPRINTF(x) printf x 86 #else 87 #define DPRINTF(x) /**/ 88 #endif 89 90 /* VME space mapped by SMC_TT VME-ISA bridge */ 91 #define SMCTT_MEM_BASE 0xFE000000 /* base for shared memory space */ 92 #define SMCTT_IOE_BASE 0xFE200000 /* base for I/O ports at even address */ 93 #define SMCTT_IOO_BASE 0xFE300000 /* base for I/O ports at odd address */ 94 95 #define SMCTT_IO_OFFSET (SMCTT_IOO_BASE - SMCTT_IOE_BASE) 96 97 /* default SMC8216 settings for SMC_TT specified by a jumper switch at No.2 */ 98 #define SMCTT_MEM_ADDR 0xD0000 99 #define SMCTT_IO_ADDR 0x280 100 101 /* SMC_TT uses IRQ4 on VME, IRQ3 on ISA, and interrupt vector 0xAA */ 102 #define SMCTT_VME_IRQ 4 103 #define SMCTT_ISA_IRQ 3 104 #define SMCTT_VECTOR 0xAA 105 106 static int we_vme_probe(device_t, cfdata_t , void *); 107 static void we_vme_attach(device_t, device_t, void *); 108 109 static uint8_t smctt_bus_space_read_1(bus_space_tag_t, bus_space_handle_t, 110 bus_size_t); 111 static void smctt_bus_space_write_1(bus_space_tag_t, bus_space_handle_t, 112 bus_size_t, uint8_t); 113 114 struct we_vme_softc { 115 struct we_softc sc_we; 116 struct atari_bus_space sc_bs; 117 }; 118 119 CFATTACH_DECL_NEW(we_vme, sizeof(struct we_vme_softc), 120 we_vme_probe, we_vme_attach, NULL, NULL); 121 122 static const int we_790_irq[] = { 123 -1, 9, 3, 5, 7, 10, 11, 15, 124 }; 125 126 static int 127 we_vme_probe(device_t parent, cfdata_t cf, void *aux) 128 { 129 struct vme_attach_args *va = aux; 130 struct atari_bus_space t; 131 bus_space_tag_t asict, memt; 132 bus_space_handle_t asich, asich1, memh; 133 bus_size_t memsize; 134 bool asich_valid, asich1_valid, memh_valid; 135 int i, rv; 136 uint8_t sum, reg, type, hwr; 137 138 rv = 0; 139 asich_valid = false; 140 asich1_valid = false; 141 memh_valid = false; 142 143 if (va->va_iobase != IOBASEUNK && 144 va->va_iobase != SMCTT_IOE_BASE + SMCTT_IO_ADDR) 145 return 0; 146 if (va->va_maddr != IOBASEUNK && 147 va->va_maddr != SMCTT_MEM_BASE + SMCTT_MEM_ADDR) 148 return 0; 149 if (va->va_irq != IRQUNK && 150 va->va_irq != SMCTT_VME_IRQ) 151 return 0; 152 153 /* SMC_TT has a bit weird I/O address mappings */ 154 asict = beb_alloc_bus_space_tag(&t); 155 /* XXX setup only simple byte functions used in MI we(4) driver */ 156 asict->abs_r_1 = smctt_bus_space_read_1; 157 asict->abs_w_1 = smctt_bus_space_write_1; 158 159 /* 160 * Only 16 bit accesses are allowed for memory space on SMC_TT, 161 * but MI we(4) uses them on 16 bit mode. 162 */ 163 memt = va->va_memt; 164 165 /* Attempt to map the device. */ 166 if (bus_space_map(asict, SMCTT_IOE_BASE + SMCTT_IO_ADDR, WE_NPORTS, 167 0, &asich) != 0) { 168 DPRINTF(("%s: failed to map even I/O space", __func__)); 169 goto out; 170 } 171 asich_valid = true; 172 173 if (bus_space_map(asict, SMCTT_IOO_BASE + SMCTT_IO_ADDR, WE_NPORTS, 174 0, &asich1) != 0) { 175 DPRINTF(("%s: failed to map odd I/O space", __func__)); 176 goto out; 177 } 178 asich1_valid = true; 179 180 /* XXX abuse stride for offset of odd ports from even ones */ 181 asict->stride = 182 (vaddr_t)bus_space_vaddr(asict, asich1) - 183 (vaddr_t)bus_space_vaddr(asict, asich); 184 185 /* 186 * Attempt to do a checksum over the station address PROM. 187 * If it fails, it's probably not an SMC_TT board. 188 */ 189 DPRINTF(("%s: WE_PROM: ", __func__)); 190 sum = 0; 191 for (i = 0; i < 8; i++) { 192 reg = bus_space_read_1(asict, asich, WE_PROM + i); 193 DPRINTF(("%02x ", reg)); 194 sum += reg; 195 } 196 DPRINTF(("\n")); 197 DPRINTF(("%s: WE_ROM_SUM: 0x%02x\n", __func__, sum)); 198 199 if (sum != WE_ROM_CHECKSUM_TOTAL) 200 goto out; 201 202 /* 203 * Reset the card to force it into a known state. 204 */ 205 bus_space_write_1(asict, asich, WE_MSR, WE_MSR_RST); 206 delay(100); 207 208 bus_space_write_1(asict, asich, WE_MSR, 209 bus_space_read_1(asict, asich, WE_MSR) & ~WE_MSR_RST); 210 211 /* Wait in case the card is reading it's EEPROM. */ 212 delay(5000); 213 214 /* 215 * Check card type. 216 */ 217 type = bus_space_read_1(asict, asich, WE_CARD_ID); 218 /* Assume SMT_TT has only 8216 */ 219 if (type != WE_TYPE_SMC8216C && type != WE_TYPE_SMC8216T) 220 goto out; 221 222 hwr = bus_space_read_1(asict, asich, WE790_HWR); 223 bus_space_write_1(asict, asich, WE790_HWR, hwr | WE790_HWR_SWH); 224 switch (bus_space_read_1(asict, asich, WE790_RAR) & WE790_RAR_SZ64) { 225 case WE790_RAR_SZ64: 226 memsize = 65536; 227 break; 228 case WE790_RAR_SZ32: 229 memsize = 32768; 230 break; 231 case WE790_RAR_SZ16: 232 memsize = 16384; 233 break; 234 case WE790_RAR_SZ8: 235 memsize = 8192; 236 break; 237 default: 238 memsize = 16384; 239 break; 240 } 241 bus_space_write_1(asict, asich, WE790_HWR, hwr); 242 243 /* Attempt to map the memory space. */ 244 if (bus_space_map(memt, SMCTT_MEM_BASE + SMCTT_MEM_ADDR, memsize, 245 0, &memh) != 0) { 246 DPRINTF(("%s: failed to map shared memory", __func__)); 247 goto out; 248 } 249 memh_valid = true; 250 251 /* 252 * Check the assigned interrupt number from the card. 253 */ 254 255 /* Assemble together the encoded interrupt number. */ 256 hwr = bus_space_read_1(asict, asich, WE790_HWR); 257 bus_space_write_1(asict, asich, WE790_HWR, hwr | WE790_HWR_SWH); 258 259 reg = bus_space_read_1(asict, asich, WE790_GCR); 260 i = ((reg & WE790_GCR_IR2) >> 4) | 261 ((reg & (WE790_GCR_IR1|WE790_GCR_IR0)) >> 2); 262 bus_space_write_1(asict, asich, WE790_HWR, hwr & ~WE790_HWR_SWH); 263 264 if (we_790_irq[i] != SMCTT_ISA_IRQ) { 265 DPRINTF(("%s: wrong IRQ (%d); check jumper settings\n", 266 __func__, we_790_irq[i])); 267 goto out; 268 } 269 270 /* So, we say we've found it! */ 271 va->va_iobase = SMCTT_IOE_BASE + SMCTT_IO_ADDR; 272 va->va_iosize = WE_NPORTS; 273 va->va_maddr = SMCTT_MEM_BASE + SMCTT_MEM_ADDR; 274 va->va_msize = memsize; 275 va->va_irq = SMCTT_VME_IRQ; 276 277 rv = 1; 278 279 out: 280 if (asich_valid) 281 bus_space_unmap(asict, asich, WE_NPORTS); 282 if (asich1_valid) 283 bus_space_unmap(asict, asich1, WE_NPORTS); 284 if (memh_valid) 285 bus_space_unmap(memt, memh, memsize); 286 return rv; 287 } 288 289 void 290 we_vme_attach(device_t parent, device_t self, void *aux) 291 { 292 struct we_vme_softc *wvsc = device_private(self); 293 struct we_softc *wsc = &wvsc->sc_we; 294 struct dp8390_softc *sc = &wsc->sc_dp8390; 295 struct vme_attach_args *va = aux; 296 bus_space_tag_t nict, asict, memt; 297 bus_space_handle_t nich, asich, asich1, memh; 298 const char *typestr; 299 300 aprint_normal("\n"); 301 302 sc->sc_dev = self; 303 304 /* See comments in the above probe function */ 305 asict = beb_alloc_bus_space_tag(&wvsc->sc_bs); 306 asict->abs_r_1 = smctt_bus_space_read_1; 307 asict->abs_w_1 = smctt_bus_space_write_1; 308 nict = asict; 309 310 memt = va->va_memt; 311 312 /* Map the device. */ 313 if (bus_space_map(asict, va->va_iobase, WE_NPORTS, 0, &asich) != 0) { 314 aprint_error_dev(self, "can't map even I/O space\n"); 315 return; 316 } 317 if (bus_space_map(asict, va->va_iobase + SMCTT_IO_OFFSET, WE_NPORTS, 318 0, &asich1) != 0) { 319 aprint_error_dev(self, "can't map odd I/O space\n"); 320 goto out; 321 } 322 asict->stride = 323 (vaddr_t)bus_space_vaddr(asict, asich1) - 324 (vaddr_t)bus_space_vaddr(asict, asich); 325 326 if (bus_space_subregion(asict, asich, WE_NIC_OFFSET, WE_NIC_NPORTS, 327 &nich) != 0) { 328 aprint_error_dev(self, "can't subregion I/O space\n"); 329 goto out1; 330 } 331 332 /* Map memory space. */ 333 if (bus_space_map(memt, va->va_maddr, va->va_msize, 0, &memh) != 0) { 334 aprint_error_dev(self, "can't map shared memory\n"); 335 goto out1; 336 } 337 338 wsc->sc_asict = asict; 339 wsc->sc_asich = asich; 340 341 sc->sc_regt = nict; 342 sc->sc_regh = nich; 343 344 sc->sc_buft = memt; 345 sc->sc_bufh = memh; 346 347 wsc->sc_maddr = va->va_maddr & 0xfffff; 348 sc->mem_size = va->va_msize; 349 350 /* Interface is always enabled. */ 351 sc->sc_enabled = 1; 352 353 /* SMC_TT assumes SMC8216 */ 354 sc->is790 = 1; 355 356 /* SMC_TT supports only 16 bit access for shared memory */ 357 wsc->sc_flags |= WE_16BIT_ENABLE; 358 359 /* Appeal the Atari spirit :-) */ 360 typestr = "SMC8216 with SMC_TT VME-ISA bridge"; 361 362 if (we_config(self, wsc, typestr) != 0) 363 goto out2; 364 365 /* 366 * Enable the configured interrupt. 367 */ 368 bus_space_write_1(asict, asich, WE790_ICR, 369 bus_space_read_1(asict, asich, WE790_ICR) | WE790_ICR_EIL); 370 371 /* Establish interrupt handler. */ 372 wsc->sc_ih = intr_establish(SMCTT_VECTOR - 64, USER_VEC, 0, 373 (hw_ifun_t)dp8390_intr, sc); 374 if (wsc->sc_ih == NULL) { 375 aprint_error_dev(self, "can't establish interrupt\n"); 376 goto out2; 377 } 378 /* 379 * Unmask the VME interrupt we're on. 380 */ 381 if ((machineid & ATARI_TT) != 0) 382 SCU->vme_mask |= 1 << va->va_irq; 383 384 return; 385 386 out2: 387 bus_space_unmap(memt, memh, va->va_msize); 388 out1: 389 bus_space_unmap(asict, asich1, WE_NPORTS); 390 out: 391 bus_space_unmap(asict, asich, WE_NPORTS); 392 } 393 394 static uint8_t 395 smctt_bus_space_read_1(bus_space_tag_t bt, bus_space_handle_t bh, 396 bus_size_t reg) 397 { 398 uint8_t rv; 399 400 if ((reg & 0x01) != 0) { 401 /* odd address space */ 402 rv = *(volatile uint8_t *)(bh + bt->stride + (reg & ~0x01)); 403 } else { 404 /* even address space */ 405 rv = *(volatile uint8_t *)(bh + reg); 406 } 407 408 return rv; 409 } 410 411 static void 412 smctt_bus_space_write_1(bus_space_tag_t bt, bus_space_handle_t bh, 413 bus_size_t reg, uint8_t val) 414 { 415 416 if ((reg & 0x01) != 0) { 417 /* odd address space */ 418 *(volatile uint8_t *)(bh + bt->stride + (reg & ~0x01)) = val; 419 } else { 420 /* even address space */ 421 *(volatile uint8_t *)(bh + reg) = val; 422 } 423 } 424
Indexes created Wed Oct 01 07:09:59 GMT 2025