intr.h revision 1.24
1/* $NetBSD: intr.h,v 1.24 2006/12/21 15:55:22 yamt Exp $ */ 2 3/*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#ifndef _BEBOX_INTR_H_ 40#define _BEBOX_INTR_H_ 41 42/* Interrupt priority `levels'. */ 43#define IPL_NONE 9 /* nothing */ 44#define IPL_SOFTCLOCK 8 /* software clock interrupt */ 45#define IPL_SOFTNET 7 /* software network interrupt */ 46#define IPL_BIO 6 /* block I/O */ 47#define IPL_NET 5 /* network */ 48#define IPL_SOFTSERIAL 4 /* software serial interrupt */ 49#define IPL_TTY 3 /* terminal */ 50#define IPL_LPT IPL_TTY 51#define IPL_VM 3 /* memory allocation */ 52#define IPL_AUDIO 2 /* audio */ 53#define IPL_CLOCK 1 /* clock */ 54#define IPL_STATCLOCK IPL_CLOCK 55#define IPL_HIGH 1 /* everything */ 56#define IPL_SCHED IPL_HIGH 57#define IPL_LOCK IPL_HIGH 58#define IPL_SERIAL 0 /* serial */ 59#define NIPL 10 60 61/* Interrupt sharing types. */ 62#define IST_NONE 0 /* none */ 63#define IST_PULSE 1 /* pulsed */ 64#define IST_EDGE 2 /* edge-triggered */ 65#define IST_LEVEL 3 /* level-triggered */ 66 67#ifndef _LOCORE 68 69#define CLKF_BASEPRI(frame) ((frame)->pri == 0) 70/* 71 * Interrupt handler chains. intr_establish() inserts a handler into 72 * the list. The handler is called with its (single) argument. 73 */ 74struct intrhand { 75 int (*ih_fun) __P((void *)); 76 void *ih_arg; 77 u_long ih_count; 78 struct intrhand *ih_next; 79 int ih_level; 80 int ih_irq; 81}; 82 83void do_pending_int __P((void)); 84 85void ext_intr __P((void)); 86void *intr_establish __P((int, int, int, int (*)(void *), void *)); 87void intr_disestablish __P((void *)); 88void intr_calculatemasks __P((void)); 89int isa_intr __P((void)); 90void isa_intr_mask __P((int)); 91void isa_intr_clr __P((int)); 92 93void enable_intr __P((void)); 94void disable_intr __P((void)); 95 96static __inline int splraise __P((int)); 97static __inline int spllower __P((int)); 98static __inline void splx __P((int)); 99static __inline void set_sint __P((int)); 100 101extern volatile int cpl, ipending, astpending, tickspending; 102extern int imask[]; 103extern long intrcnt[]; 104 105/* 106 * Reorder protection in the following inline functions is 107 * achieved with the "eieio" instruction which the assembler 108 * seems to detect and then doesn't move instructions past.... 109 */ 110static __inline int 111splraise(newcpl) 112 int newcpl; 113{ 114 int oldcpl; 115 116 __asm volatile("sync; eieio\n"); /* don't reorder.... */ 117 oldcpl = cpl; 118 cpl = oldcpl | newcpl; 119 __asm volatile("sync; eieio\n"); /* reorder protect */ 120 return(oldcpl); 121} 122 123static __inline void 124splx(newcpl) 125 int newcpl; 126{ 127 __asm volatile("sync; eieio\n"); /* reorder protect */ 128 cpl = newcpl; 129 if(ipending & ~newcpl) 130 do_pending_int(); 131 __asm volatile("sync; eieio\n"); /* reorder protect */ 132} 133 134static __inline int 135spllower(newcpl) 136 int newcpl; 137{ 138 int oldcpl; 139 140 __asm volatile("sync; eieio\n"); /* reorder protect */ 141 oldcpl = cpl; 142 cpl = newcpl; 143 if(ipending & ~newcpl) 144 do_pending_int(); 145 __asm volatile("sync; eieio\n"); /* reorder protect */ 146 return(oldcpl); 147} 148 149/* Following code should be implemented with lwarx/stwcx to avoid 150 * the disable/enable. i need to read the manual once more.... */ 151static __inline void 152set_sint(pending) 153 int pending; 154{ 155 int msrsave; 156 157 __asm ("mfmsr %0" : "=r"(msrsave)); 158 __asm volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 159 ipending |= pending; 160 __asm volatile ("mtmsr %0" :: "r"(msrsave)); 161} 162 163#define ICU_LEN 32 164#define IRQ_SLAVE 2 165#define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE) 166 167#define MOTHER_BOARD_REG 0x7ffff000 168#define CPU0_INT_MASK 0x0f0 169#define CPU1_INT_MASK 0x1f0 170#define INT_STATE_REG 0x2f0 171 172#define SINT_CLOCK 0x20000000 173#define SINT_NET 0x40000000 174#define SINT_SERIAL 0x80000000 175#define SPL_CLOCK 0x00000001 176#define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_SERIAL) 177 178#define CNT_SINT_NET 29 179#define CNT_SINT_CLOCK 30 180#define CNT_SINT_SERIAL 31 181#define CNT_CLOCK 0 182 183#define spllowersoftclock() spllower(imask[IPL_SOFTCLOCK]) 184 185#define setsoftclock() set_sint(SINT_CLOCK); 186#define setsoftnet() set_sint(SINT_NET); 187#define setsoftserial() set_sint(SINT_SERIAL); 188 189#define spl0() spllower(0) 190 191typedef int ipl_t; 192typedef struct { 193 ipl_t _ipl; 194} ipl_cookie_t; 195 196static inline ipl_cookie_t 197makeiplcookie(ipl_t ipl) 198{ 199 200 return (ipl_cookie_t){._ipl = ipl}; 201} 202 203static inline int 204splraiseipl(ipl_cookie_t icookie) 205{ 206 207 return splraise(imask[icookie._ipl]); 208} 209 210#include <sys/spl.h> 211 212#endif /* !_LOCORE */ 213 214#endif /* !_BEBOX_INTR_H_ */ 215