intr.h revision 1.6
1/* $NetBSD: intr.h,v 1.6 1998/08/15 10:11:01 mycroft Exp $ */ 2 3/*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39#ifndef _BEBOX_INTR_H_ 40#define _BEBOX_INTR_H_ 41 42/* Interrupt priority `levels'. */ 43#define IPL_NONE 9 /* nothing */ 44#define IPL_SOFTCLOCK 8 /* software clock interrupt */ 45#define IPL_SOFTNET 7 /* software network interrupt */ 46#define IPL_BIO 6 /* block I/O */ 47#define IPL_NET 5 /* network */ 48#define IPL_TTY 4 /* terminal */ 49#define IPL_IMP 3 /* memory allocation */ 50#define IPL_AUDIO 2 /* audio */ 51#define IPL_CLOCK 1 /* clock */ 52#define IPL_HIGH 0 /* everything */ 53#define IPL_SERIAL 0 /* serial */ 54#define NIPL 10 55 56/* Interrupt sharing types. */ 57#define IST_NONE 0 /* none */ 58#define IST_PULSE 1 /* pulsed */ 59#define IST_EDGE 2 /* edge-triggered */ 60#define IST_LEVEL 3 /* level-triggered */ 61 62#ifndef _LOCORE 63 64/* 65 * Interrupt handler chains. intr_establish() inserts a handler into 66 * the list. The handler is called with its (single) argument. 67 */ 68struct intrhand { 69 int (*ih_fun) __P((void *)); 70 void *ih_arg; 71 u_long ih_count; 72 struct intrhand *ih_next; 73 int ih_level; 74 int ih_irq; 75}; 76 77void setsoftclock __P((void)); 78void clearsoftclock __P((void)); 79int splsoftclock __P((void)); 80void setsoftnet __P((void)); 81void clearsoftnet __P((void)); 82int splsoftnet __P((void)); 83 84void do_pending_int __P((void)); 85 86 87extern volatile int cpl, ipending, astpending, tickspending; 88extern int imask[]; 89 90/* 91 * Reorder protection in the following inline functions is 92 * achived with the "eieio" instruction which the assembler 93 * seems to detect and then doen't move instructions past.... 94 */ 95static __inline int 96splraise(newcpl) 97 int newcpl; 98{ 99 int oldcpl; 100 101 __asm__ volatile("sync; eieio\n"); /* don't reorder.... */ 102 oldcpl = cpl; 103 cpl = oldcpl | newcpl; 104 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 105 return(oldcpl); 106} 107 108static __inline void 109splx(newcpl) 110 int newcpl; 111{ 112 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 113 cpl = newcpl; 114 if(ipending & ~newcpl) 115 do_pending_int(); 116 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 117} 118 119static __inline int 120spllower(newcpl) 121 int newcpl; 122{ 123 int oldcpl; 124 125 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 126 oldcpl = cpl; 127 cpl = newcpl; 128 if(ipending & ~newcpl) 129 do_pending_int(); 130 __asm__ volatile("sync; eieio\n"); /* reorder protect */ 131 return(oldcpl); 132} 133 134/* Following code should be implemented with lwarx/stwcx to avoid 135 * the disable/enable. i need to read the manual once more.... */ 136static __inline void 137set_sint(pending) 138 int pending; 139{ 140 int msrsave; 141 142 __asm__ ("mfmsr %0" : "=r"(msrsave)); 143 __asm__ volatile ("mtmsr %0" :: "r"(msrsave & ~PSL_EE)); 144 ipending |= pending; 145 __asm__ volatile ("mtmsr %0" :: "r"(msrsave)); 146} 147 148#define ICU_LEN 32 149#define IRQ_SLAVE 2 150#define LEGAL_IRQ(x) ((x) >= 0 && (x) < ICU_LEN && (x) != IRQ_SLAVE) 151 152#define MOTHER_BOARD_REG 0x7ffff000 153#define CPU0_INT_MASK 0x0f0 154#define CPU1_INT_MASK 0x1f0 155#define INT_STATE_REG 0x2f0 156 157#define SINT_CLOCK 0x20000000 158#define SINT_NET 0x40000000 159#define SINT_SERIAL 0x80000000 160#define SPL_CLOCK 0x00000001 161#define SINT_MASK (SINT_CLOCK|SINT_NET|SINT_SERIAL) 162 163#define CNT_SINT_NET 29 164#define CNT_SINT_CLOCK 30 165#define CNT_SINT_SERIAL 31 166#define CNT_CLOCK 0 167 168#define splbio() splraise(imask[IPL_BIO]) 169#define splnet() splraise(imask[IPL_NET]) 170#define spltty() splraise(imask[IPL_TTY]) 171#define splclock() splraise(SPL_CLOCK|SINT_CLOCK|SINT_NET) 172#define splimp() splraise(imask[IPL_IMP]) 173#define splserial() splraise(imask[IPL_SERIAL]) 174#define splstatclock() splhigh() 175#define splsoftclock() spllower(SINT_CLOCK) 176#define splsoftnet() splraise(SINT_NET) 177#define splsoftserial() splraise(SINT_SERIAL) 178 179#define spllpt() spltty() 180 181#define setsoftclock() set_sint(SINT_CLOCK); 182#define setsoftnet() set_sint(SINT_NET); 183#define setsoftserial() set_sint(SINT_SERIAL); 184 185#define splhigh() splraise(0xffffffff) 186#define spl0() spllower(0) 187 188#endif /* !_LOCORE */ 189 190#endif /* !_BEBOX_INTR_H_ */ 191