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pio.h revision 1.5
      1 /*	$NetBSD: pio.h,v 1.5 1997/12/12 03:08:29 sakamoto Exp $ */
      2 /*	$OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $ */
      3 
      4 /*
      5  * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed under OpenBSD by
     18  *	Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
     23  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     24  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
     26  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  *
     34  */
     35 
     36 #ifndef _MACHINE_PIO_H_
     37 #define _MACHINE_PIO_H_
     38 /*
     39  * I/O macros.
     40  */
     41 
     42 static __inline void
     43 __outb(a,v)
     44 	volatile u_int8_t *a;
     45 	u_int8_t v;
     46 {
     47 	*a = v;
     48 	__asm__ volatile("eieio; sync");
     49 }
     50 
     51 static __inline void
     52 __outw(a,v)
     53 	volatile u_int16_t *a;
     54 	u_int16_t v;
     55 {
     56 	*a = v;
     57 	__asm__ volatile("eieio; sync");
     58 }
     59 
     60 static __inline void
     61 __outl(a,v)
     62 	volatile u_int32_t *a;
     63 	u_int32_t v;
     64 {
     65 	*a = v;
     66 	__asm__ volatile("eieio; sync");
     67 }
     68 
     69 static __inline void
     70 __outwrb(a,v)
     71 	volatile u_int16_t *a;
     72 	u_int16_t v;
     73 {
     74 	u_int32_t _p_ = (u_int32_t)a;
     75 
     76 	__asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(_p_));
     77 	__asm__ volatile("eieio; sync");
     78 }
     79 
     80 static __inline void
     81 __outlrb(a,v)
     82 	volatile u_int32_t *a;
     83 	u_int32_t v;
     84 {
     85 	u_int32_t _p_ = (u_int32_t)a;
     86 
     87 	__asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(_p_));
     88 	__asm__ volatile("eieio; sync");
     89 }
     90 
     91 static __inline u_int8_t
     92 __inb(a)
     93 	volatile u_int8_t *a;
     94 {
     95 	u_int8_t _v_;
     96 
     97 	_v_ = *a;
     98 	__asm__ volatile("eieio; sync");
     99 	return _v_;
    100 }
    101 
    102 static __inline u_int16_t
    103 __inw(a)
    104 	volatile u_int16_t *a;
    105 {
    106 	u_int16_t _v_;
    107 
    108 	_v_ = *a;
    109 	__asm__ volatile("eieio; sync");
    110 	return _v_;
    111 }
    112 
    113 static __inline u_int32_t
    114 __inl(a)
    115 	volatile u_int32_t *a;
    116 {
    117 	u_int32_t _v_;
    118 
    119 	_v_ = *a;
    120 	__asm__ volatile("eieio; sync");
    121 	return _v_;
    122 }
    123 
    124 static __inline u_int16_t
    125 __inwrb(a)
    126 	volatile u_int16_t *a;
    127 {
    128 	u_int16_t _v_;
    129 	u_int32_t _p_ = (u_int32_t)a;
    130 
    131 	__asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(_p_));
    132 	__asm__ volatile("eieio; sync");
    133 	return _v_;
    134 }
    135 
    136 static __inline u_int32_t
    137 __inlrb(a)
    138 	volatile u_int32_t *a;
    139 {
    140 	u_int32_t _v_;
    141 	u_int32_t _p_ = (u_int32_t)a;
    142 
    143 	__asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(_p_));
    144 	__asm__ volatile("eieio; sync");
    145 	return _v_;
    146 }
    147 
    148 #define	outb(a,v)	(__outb((volatile u_int8_t *)(a), v))
    149 #define	out8(a,v)	outb(a,v)
    150 #define	outw(a,v)	(__outw((volatile u_int16_t *)(a), v))
    151 #define	out16(a,v)	outw(a,v)
    152 #define	outl(a,v)	(__outl((volatile u_int32_t *)(a), v))
    153 #define	out32(a,v)	outl(a,v)
    154 #define	inb(a)		(__inb((volatile u_int8_t *)(a)))
    155 #define	in8(a)		inb(a)
    156 #define	inw(a)		(__inw((volatile u_int16_t *)(a)))
    157 #define	in16(a)		inw(a)
    158 #define	inl(a)		(__inl((volatile u_int32_t *)(a)))
    159 #define	in32(a)		inl(a)
    160 
    161 #define	out8rb(a,v)	outb(a,v)
    162 #define	outwrb(a,v)	(__outwrb((volatile u_int16_t *)(a), v))
    163 #define	out16rb(a,v)	outwrb(a,v)
    164 #define	outlrb(a,v)	(__outlrb((volatile u_int32_t *)(a), v))
    165 #define	out32rb(a,v)	outlrb(a,v)
    166 #define	in8rb(a)	inb(a)
    167 #define	inwrb(a)	(__inwrb((volatile u_int16_t *)(a)))
    168 #define	in16rb(a)	inwrb(a)
    169 #define	inlrb(a)	(__inlrb((volatile u_int32_t *)(a)))
    170 #define	in32rb(a)	inlrb(a)
    171 
    172 
    173 static __inline void
    174 __outsb(a,s,c)
    175 	volatile u_int8_t *a;
    176 	const u_int8_t *s;
    177 	size_t c;
    178 {
    179 	while (c--)
    180 		*a = *s++;
    181 	__asm__ volatile("eieio; sync");
    182 }
    183 
    184 static __inline void
    185 __outsw(a,s,c)
    186 	volatile u_int16_t *a;
    187 	const u_int16_t *s;
    188 	size_t c;
    189 {
    190 	while (c--)
    191 		*a = *s++;
    192 	__asm__ volatile("eieio; sync");
    193 }
    194 
    195 static __inline void
    196 __outsl(a,s,c)
    197 	volatile u_int32_t *a;
    198 	const u_int32_t *s;
    199 	size_t c;
    200 {
    201 	while (c--)
    202 		*a = *s++;
    203 	__asm__ volatile("eieio; sync");
    204 }
    205 
    206 static __inline void
    207 __outswrb(a,s,c)
    208 	volatile u_int16_t *a;
    209 	const u_int16_t *s;
    210 	size_t c;
    211 {
    212 	u_int32_t _p_ = (u_int32_t)a;
    213 
    214 	while (c--)
    215 		__asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(_p_));
    216 	__asm__ volatile("eieio; sync");
    217 }
    218 
    219 static __inline void
    220 __outslrb(a,s,c)
    221 	volatile u_int32_t *a;
    222 	const u_int32_t *s;
    223 	size_t c;
    224 {
    225 	u_int32_t _p_ = (u_int32_t)a;
    226 
    227 	while (c--)
    228 		__asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(_p_));
    229 	__asm__ volatile("eieio; sync");
    230 }
    231 
    232 static __inline void
    233 __insb(a,d,c)
    234 	volatile u_int8_t *a;
    235 	u_int8_t *d;
    236 	size_t c;
    237 {
    238 	while (c--)
    239 		*d++ = *a;
    240 	__asm__ volatile("eieio; sync");
    241 }
    242 
    243 static __inline void
    244 __insw(a,d,c)
    245 	volatile u_int16_t *a;
    246 	u_int16_t *d;
    247 	size_t c;
    248 {
    249 	while (c--)
    250 		*d++ = *a;
    251 	__asm__ volatile("eieio; sync");
    252 }
    253 
    254 static __inline void
    255 __insl(a,d,c)
    256 	volatile u_int32_t *a;
    257 	u_int32_t *d;
    258 	size_t c;
    259 {
    260 	while (c--)
    261 		*d++ = *a;
    262 	__asm__ volatile("eieio; sync");
    263 }
    264 
    265 static __inline void
    266 __inswrb(a,d,c)
    267 	volatile u_int16_t *a;
    268 	u_int16_t *d;
    269 	size_t c;
    270 {
    271 	u_int32_t _p_ = (u_int32_t)a;
    272 
    273 	while (c--)
    274 		__asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(_p_));
    275 	__asm__ volatile("eieio; sync");
    276 }
    277 
    278 static __inline void
    279 __inslrb(a,d,c)
    280 	volatile u_int32_t *a;
    281 	u_int32_t *d;
    282 	size_t c;
    283 {
    284 	u_int32_t _p_ = (u_int32_t)a;
    285 
    286 	while (c--)
    287 		__asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(_p_));
    288 	__asm__ volatile("eieio; sync");
    289 }
    290 
    291 #define	outsb(a,s,c)	(__outsb((volatile u_int8_t *)(a), s, c))
    292 #define	outs8(a,s,c)	outsb(a,s,c)
    293 #define	outsw(a,s,c)	(__outsw((volatile u_int16_t *)(a), s, c))
    294 #define	outs16(a,s,c)	outsw(a,s,c)
    295 #define	outsl(a,s,c)	(__outsl((volatile u_int32_t *)(a), s, c))
    296 #define	outs32(a,s,c)	outsl(a,s,c)
    297 #define	insb(a,d,c)	(__insb((volatile u_int8_t *)(a), d, c))
    298 #define	ins8(a,d,c)	insb(a,d,c)
    299 #define	insw(a,d,c)	(__insw((volatile u_int16_t *)(a), d, c))
    300 #define	ins16(a,d,c)	insw(a,d,c)
    301 #define	insl(a,d,c)	(__insl((volatile u_int32_t *)(a), d, c))
    302 #define	ins32(a,d,c)	insl(a,d,c)
    303 
    304 #define	outs8rb(a,s,c)	outsb(a,s,c)
    305 #define	outswrb(a,s,c)	(__outswrb((volatile u_int16_t *)(a), s, c))
    306 #define	outs16rb(a,s,c)	outswrb(a,s,c)
    307 #define	outslrb(a,s,c)	(__outslrb((volatile u_int32_t *)(a), s, c))
    308 #define	outs32rb(a,s,c)	outslrb(a,s,c)
    309 #define	ins8rb(a,d,c)	insb(a,d,c)
    310 #define	inswrb(a,d,c)	(__inswrb((volatile u_int16_t *)(a), d, c))
    311 #define	ins16rb(a,d,c)	inswrb(a,d,c)
    312 #define	inslrb(a,d,c)	(__inslrb((volatile u_int32_t *)(a), d, c))
    313 #define	ins32rb(a,d,c)	inslrb(a,d,c)
    314 
    315 #endif /*_MACHINE_PIO_H_*/
    316