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pci_machdep.c revision 1.7
      1 /*	$NetBSD: pci_machdep.c,v 1.7 2000/06/29 08:22:17 mrg Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  * Copyright (c) 1994 Charles M. Hannum.  All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *	This product includes software developed by Charles M. Hannum.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Machine-specific functions for PCI autoconfiguration.
     35  *
     36  * On PCs, there are two methods of generating PCI configuration cycles.
     37  * We try to detect the appropriate mechanism for this machine and set
     38  * up a few function pointers to access the correct method directly.
     39  *
     40  * The configuration method can be hard-coded in the config file by
     41  * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
     42  * as defined section 3.6.4.1, `Generating Configuration Cycles'.
     43  */
     44 
     45 #include <sys/types.h>
     46 #include <sys/param.h>
     47 #include <sys/time.h>
     48 #include <sys/systm.h>
     49 #include <sys/errno.h>
     50 #include <sys/device.h>
     51 
     52 #include <uvm/uvm_extern.h>
     53 
     54 #include <machine/bus.h>
     55 #include <machine/pio.h>
     56 #include <machine/intr.h>
     57 
     58 #include <dev/isa/isavar.h>
     59 #include <dev/pci/pcivar.h>
     60 #include <dev/pci/pcireg.h>
     61 
     62 #include <bebox/isa/icu.h>
     63 
     64 #define	PCI_MODE1_ENABLE	0x80000000UL
     65 #define	PCI_MODE1_ADDRESS_REG	(BEBOX_BUS_SPACE_IO + 0x0cf8)
     66 #define	PCI_MODE1_DATA_REG	(BEBOX_BUS_SPACE_IO + 0x0cfc)
     67 
     68 void
     69 pci_attach_hook(parent, self, pba)
     70 	struct device *parent, *self;
     71 	struct pcibus_attach_args *pba;
     72 {
     73 }
     74 
     75 int
     76 pci_bus_maxdevs(pc, busno)
     77 	pci_chipset_tag_t pc;
     78 	int busno;
     79 {
     80 
     81 	/*
     82 	 * Bus number is irrelevant.  Configuration Mechanism 1 is in
     83 	 * use, can have devices 0-32 (i.e. the `normal' range).
     84 	 */
     85 	return (32);
     86 }
     87 
     88 pcitag_t
     89 pci_make_tag(pc, bus, device, function)
     90 	pci_chipset_tag_t pc;
     91 	int bus, device, function;
     92 {
     93 	pcitag_t tag;
     94 
     95 	if (bus >= 256 || device >= 32 || function >= 8)
     96 		panic("pci_make_tag: bad request");
     97 
     98 	tag = PCI_MODE1_ENABLE |
     99 		    (bus << 16) | (device << 11) | (function << 8);
    100 	return tag;
    101 }
    102 
    103 void
    104 pci_decompose_tag(pc, tag, bp, dp, fp)
    105 	pci_chipset_tag_t pc;
    106 	pcitag_t tag;
    107 	int *bp, *dp, *fp;
    108 {
    109 
    110 	if (bp != NULL)
    111 		*bp = (tag >> 16) & 0xff;
    112 	if (dp != NULL)
    113 		*dp = (tag >> 11) & 0x1f;
    114 	if (fp != NULL)
    115 		*fp = (tag >> 8) & 0x7;
    116 	return;
    117 }
    118 
    119 pcireg_t
    120 pci_conf_read(pc, tag, reg)
    121 	pci_chipset_tag_t pc;
    122 	pcitag_t tag;
    123 	int reg;
    124 {
    125 	pcireg_t data;
    126 
    127 	out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
    128 	data = in32rb(PCI_MODE1_DATA_REG);
    129 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
    130 	return data;
    131 }
    132 
    133 void
    134 pci_conf_write(pc, tag, reg, data)
    135 	pci_chipset_tag_t pc;
    136 	pcitag_t tag;
    137 	int reg;
    138 	pcireg_t data;
    139 {
    140 
    141 	out32rb(PCI_MODE1_ADDRESS_REG, tag | reg);
    142 	out32rb(PCI_MODE1_DATA_REG, data);
    143 	out32rb(PCI_MODE1_ADDRESS_REG, 0);
    144 }
    145 
    146 int
    147 pci_intr_map(pc, intrtag, pin, line, ihp)
    148 	pci_chipset_tag_t pc;
    149 	pcitag_t intrtag;
    150 	int pin, line;
    151 	pci_intr_handle_t *ihp;
    152 {
    153 
    154 	if (pin == 0) {
    155 		/* No IRQ used. */
    156 		goto bad;
    157 	}
    158 
    159 	if (pin > 4) {
    160 		printf("pci_intr_map: bad interrupt pin %d\n", pin);
    161 		goto bad;
    162 	}
    163 
    164 	/*
    165 	 * Section 6.2.4, `Miscellaneous Functions', says that 255 means
    166 	 * `unknown' or `no connection' on a PC.  We assume that a device with
    167 	 * `no connection' either doesn't have an interrupt (in which case the
    168 	 * pin number should be 0, and would have been noticed above), or
    169 	 * wasn't configured by the BIOS (in which case we punt, since there's
    170 	 * no real way we can know how the interrupt lines are mapped in the
    171 	 * hardware).
    172 	 *
    173 	 * XXX
    174 	 * Since IRQ 0 is only used by the clock, and we can't actually be sure
    175 	 * that the BIOS did its job, we also recognize that as meaning that
    176 	 * the BIOS has not configured the device.
    177 	 */
    178 	if (line == 0 || line == 255) {
    179 		printf("pci_intr_map: no mapping for pin %c\n", '@' + pin);
    180 		goto bad;
    181 	} else {
    182 		if (line >= ICU_LEN) {
    183 			printf("pci_intr_map: bad interrupt line %d\n", line);
    184 			goto bad;
    185 		}
    186 		if (line == IRQ_SLAVE) {
    187 			printf("pci_intr_map: changed line 2 to line 9\n");
    188 			line = 9;
    189 		}
    190 	}
    191 
    192 	*ihp = line;
    193 	return 0;
    194 
    195 bad:
    196 	*ihp = -1;
    197 	return 1;
    198 }
    199 
    200 const char *
    201 pci_intr_string(pc, ih)
    202 	pci_chipset_tag_t pc;
    203 	pci_intr_handle_t ih;
    204 {
    205 	static char irqstr[8];		/* 4 + 2 + NULL + sanity */
    206 
    207 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
    208 		panic("pci_intr_string: bogus handle 0x%x\n", ih);
    209 
    210 	sprintf(irqstr, "irq %d", ih);
    211 	return (irqstr);
    212 
    213 }
    214 
    215 const struct evcnt *
    216 pci_intr_evcnt(pc, ih)
    217 	pci_chipset_tag_t pc;
    218 	pci_intr_handle_t ih;
    219 {
    220 
    221 	/* XXX for now, no evcnt parent reported */
    222 	return NULL;
    223 }
    224 
    225 void *
    226 pci_intr_establish(pc, ih, level, func, arg)
    227 	pci_chipset_tag_t pc;
    228 	pci_intr_handle_t ih;
    229 	int level, (*func) __P((void *));
    230 	void *arg;
    231 {
    232 
    233 	if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE)
    234 		panic("pci_intr_establish: bogus handle 0x%x\n", ih);
    235 
    236 	return isa_intr_establish(NULL, ih, IST_LEVEL, level, func, arg);
    237 }
    238 
    239 void
    240 pci_intr_disestablish(pc, cookie)
    241 	pci_chipset_tag_t pc;
    242 	void *cookie;
    243 {
    244 
    245 	return isa_intr_disestablish(NULL, cookie);
    246 }
    247