pci_machdep.c revision 1.9
1 /* $NetBSD: pci_machdep.c,v 1.9 2001/02/12 06:01:46 briggs Exp $ */ 2 3 /* 4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Charles M. Hannum. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Machine-specific functions for PCI autoconfiguration. 35 * 36 * On PCs, there are two methods of generating PCI configuration cycles. 37 * We try to detect the appropriate mechanism for this machine and set 38 * up a few function pointers to access the correct method directly. 39 * 40 * The configuration method can be hard-coded in the config file by 41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode 42 * as defined section 3.6.4.1, `Generating Configuration Cycles'. 43 */ 44 45 #include <sys/types.h> 46 #include <sys/param.h> 47 #include <sys/extent.h> 48 #include <sys/time.h> 49 #include <sys/systm.h> 50 #include <sys/errno.h> 51 #include <sys/device.h> 52 53 #include <uvm/uvm_extern.h> 54 55 #define _BEBOX_BUS_DMA_PRIVATE 56 #include <machine/bus.h> 57 #include <machine/pio.h> 58 #include <machine/intr.h> 59 60 #include <dev/isa/isavar.h> 61 #include <dev/pci/pcivar.h> 62 #include <dev/pci/pcireg.h> 63 #include <dev/pci/pciconf.h> 64 65 #include <bebox/isa/icu.h> 66 67 struct bebox_bus_dma_tag pci_bus_dma_tag = { 68 0, /* _bounce_thresh */ 69 _bus_dmamap_create, 70 _bus_dmamap_destroy, 71 _bus_dmamap_load, 72 _bus_dmamap_load_mbuf, 73 _bus_dmamap_load_uio, 74 _bus_dmamap_load_raw, 75 _bus_dmamap_unload, 76 NULL, /* _dmamap_sync */ 77 _bus_dmamem_alloc, 78 _bus_dmamem_free, 79 _bus_dmamem_map, 80 _bus_dmamem_unmap, 81 _bus_dmamem_mmap, 82 }; 83 84 #define PCI_MODE1_ENABLE 0x80000000UL 85 #define PCI_MODE1_ADDRESS_REG (BEBOX_BUS_SPACE_IO + 0x0cf8) 86 #define PCI_MODE1_DATA_REG (BEBOX_BUS_SPACE_IO + 0x0cfc) 87 88 void 89 pci_attach_hook(parent, self, pba) 90 struct device *parent, *self; 91 struct pcibus_attach_args *pba; 92 { 93 } 94 95 int 96 pci_bus_maxdevs(pc, busno) 97 pci_chipset_tag_t pc; 98 int busno; 99 { 100 101 /* 102 * Bus number is irrelevant. Configuration Mechanism 1 is in 103 * use, can have devices 0-32 (i.e. the `normal' range). 104 */ 105 return (32); 106 } 107 108 pcitag_t 109 pci_make_tag(pc, bus, device, function) 110 pci_chipset_tag_t pc; 111 int bus, device, function; 112 { 113 pcitag_t tag; 114 115 if (bus >= 256 || device >= 32 || function >= 8) 116 panic("pci_make_tag: bad request"); 117 118 tag = PCI_MODE1_ENABLE | 119 (bus << 16) | (device << 11) | (function << 8); 120 return tag; 121 } 122 123 void 124 pci_decompose_tag(pc, tag, bp, dp, fp) 125 pci_chipset_tag_t pc; 126 pcitag_t tag; 127 int *bp, *dp, *fp; 128 { 129 130 if (bp != NULL) 131 *bp = (tag >> 16) & 0xff; 132 if (dp != NULL) 133 *dp = (tag >> 11) & 0x1f; 134 if (fp != NULL) 135 *fp = (tag >> 8) & 0x7; 136 return; 137 } 138 139 pcireg_t 140 pci_conf_read(pc, tag, reg) 141 pci_chipset_tag_t pc; 142 pcitag_t tag; 143 int reg; 144 { 145 pcireg_t data; 146 147 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 148 data = in32rb(PCI_MODE1_DATA_REG); 149 out32rb(PCI_MODE1_ADDRESS_REG, 0); 150 return data; 151 } 152 153 void 154 pci_conf_write(pc, tag, reg, data) 155 pci_chipset_tag_t pc; 156 pcitag_t tag; 157 int reg; 158 pcireg_t data; 159 { 160 161 out32rb(PCI_MODE1_ADDRESS_REG, tag | reg); 162 out32rb(PCI_MODE1_DATA_REG, data); 163 out32rb(PCI_MODE1_ADDRESS_REG, 0); 164 } 165 166 int 167 pci_intr_map(pa, ihp) 168 struct pci_attach_args *pa; 169 pci_intr_handle_t *ihp; 170 { 171 int pin = pa->pa_intrpin; 172 int line = pa->pa_intrline; 173 174 if (pin == 0) { 175 /* No IRQ used. */ 176 goto bad; 177 } 178 179 if (pin > 4) { 180 printf("pci_intr_map: bad interrupt pin %d\n", pin); 181 goto bad; 182 } 183 184 /* 185 * Section 6.2.4, `Miscellaneous Functions', says that 255 means 186 * `unknown' or `no connection' on a PC. We assume that a device with 187 * `no connection' either doesn't have an interrupt (in which case the 188 * pin number should be 0, and would have been noticed above), or 189 * wasn't configured by the BIOS (in which case we punt, since there's 190 * no real way we can know how the interrupt lines are mapped in the 191 * hardware). 192 * 193 * XXX 194 * Since IRQ 0 is only used by the clock, and we can't actually be sure 195 * that the BIOS did its job, we also recognize that as meaning that 196 * the BIOS has not configured the device. 197 */ 198 if (line == 0 || line == 255) { 199 printf("pci_intr_map: no mapping for pin %c\n", '@' + pin); 200 goto bad; 201 } else { 202 if (line >= ICU_LEN) { 203 printf("pci_intr_map: bad interrupt line %d\n", line); 204 goto bad; 205 } 206 if (line == IRQ_SLAVE) { 207 printf("pci_intr_map: changed line 2 to line 9\n"); 208 line = 9; 209 } 210 } 211 212 *ihp = line; 213 return 0; 214 215 bad: 216 *ihp = -1; 217 return 1; 218 } 219 220 const char * 221 pci_intr_string(pc, ih) 222 pci_chipset_tag_t pc; 223 pci_intr_handle_t ih; 224 { 225 static char irqstr[8]; /* 4 + 2 + NULL + sanity */ 226 227 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 228 panic("pci_intr_string: bogus handle 0x%x\n", ih); 229 230 sprintf(irqstr, "irq %d", ih); 231 return (irqstr); 232 233 } 234 235 const struct evcnt * 236 pci_intr_evcnt(pc, ih) 237 pci_chipset_tag_t pc; 238 pci_intr_handle_t ih; 239 { 240 241 /* XXX for now, no evcnt parent reported */ 242 return NULL; 243 } 244 245 void * 246 pci_intr_establish(pc, ih, level, func, arg) 247 pci_chipset_tag_t pc; 248 pci_intr_handle_t ih; 249 int level, (*func) __P((void *)); 250 void *arg; 251 { 252 253 if (ih == 0 || ih >= ICU_LEN || ih == IRQ_SLAVE) 254 panic("pci_intr_establish: bogus handle 0x%x\n", ih); 255 256 return (void *)intr_establish(ih, IST_LEVEL, level, func, arg); 257 } 258 259 void 260 pci_intr_disestablish(pc, cookie) 261 pci_chipset_tag_t pc; 262 void *cookie; 263 { 264 265 intr_disestablish(cookie); 266 } 267 268 void 269 pci_conf_interrupt(pci_chipset_tag_t pc, int bus, int dev, int func, 270 int swiz, int *iline) 271 { 272 if (bus == 0) { 273 switch (dev) { 274 case 12: /* SCSI is bit 10, mapped to IRQ 20 */ 275 case 13: /* PCI slot 1 is bit 11, mapped to IRQ 21 */ 276 case 14: /* PCI slot 2 is bit 12, mapped to IRQ 22 */ 277 case 15: /* PCI slot 3 is bit 13, mapped to IRQ 23 */ 278 *iline = dev + 8; 279 } 280 } else { 281 *iline = 20 + ((swiz + dev + 1) & 3); 282 } 283 } 284
Indexes created Mon Sep 22 13:09:51 GMT 2025