gt.c revision 1.21.16.1
1 /* $NetBSD: gt.c,v 1.21.16.1 2010/01/20 09:04:33 matt Exp $ */ 2 3 /* 4 * Copyright (c) 2000 Soren S. Jorvang. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions, and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: gt.c,v 1.21.16.1 2010/01/20 09:04:33 matt Exp $"); 30 31 #include "opt_pci.h" 32 #include "pci.h" 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/ioctl.h> 37 #include <sys/select.h> 38 #include <sys/tty.h> 39 #include <sys/proc.h> 40 #include <sys/user.h> 41 #include <sys/conf.h> 42 #include <sys/file.h> 43 #include <sys/uio.h> 44 #include <sys/kernel.h> 45 #include <sys/syslog.h> 46 #include <sys/types.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 #include <sys/extent.h> 50 51 #include <machine/autoconf.h> 52 #include <machine/bus.h> 53 #include <machine/intr.h> 54 55 #include <mips/cache.h> 56 57 #include <dev/pci/pcivar.h> 58 #ifdef PCI_NETBSD_CONFIGURE 59 #include <dev/pci/pciconf.h> 60 #endif 61 62 #include <cobalt/dev/gtreg.h> 63 64 struct gt_softc { 65 device_t sc_dev; 66 67 bus_space_tag_t sc_bst; 68 bus_space_handle_t sc_bsh; 69 struct cobalt_pci_chipset sc_pc; 70 }; 71 72 static int gt_match(device_t, cfdata_t, void *); 73 static void gt_attach(device_t, device_t, void *); 74 static int gt_print(void *aux, const char *pnp); 75 76 static void gt_timer_init(struct gt_softc *sc); 77 #if 0 /* unused */ 78 static void gt_timer0_init(void *); 79 static long gt_timer0_read(void *); 80 #endif 81 82 CFATTACH_DECL_NEW(gt, sizeof(struct gt_softc), 83 gt_match, gt_attach, NULL, NULL); 84 85 static int 86 gt_match(device_t parent, cfdata_t cf, void *aux) 87 { 88 89 return 1; 90 } 91 92 #define GT_REG_REGION 0x1000 93 94 static void 95 gt_attach(device_t parent, device_t self, void *aux) 96 { 97 struct gt_softc *sc = device_private(self); 98 struct mainbus_attach_args *ma = aux; 99 #if NPCI > 0 100 pci_chipset_tag_t pc; 101 struct pcibus_attach_args pba; 102 #endif 103 104 sc->sc_dev = self; 105 sc->sc_bst = ma->ma_iot; 106 if (bus_space_map(sc->sc_bst, ma->ma_addr, GT_REG_REGION, 107 0, &sc->sc_bsh)) { 108 aprint_error(": unable to map GT64111 registers\n"); 109 return; 110 } 111 112 aprint_normal("\n"); 113 114 gt_timer_init(sc); 115 116 bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_PCI_COMMAND, 117 (bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_PCI_COMMAND) & 118 ~PCI_SYNCMODE) | PCI_PCLK_HIGH); 119 120 (void)bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_PCI_TIMEOUT_RETRY); 121 bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_PCI_TIMEOUT_RETRY, 122 0x00 << PCI_RETRYCTR_SHIFT | 0xff << PCI_TIMEOUT1_SHIFT | 0xff); 123 124 #if NPCI > 0 125 pc = &sc->sc_pc; 126 pc->pc_bst = sc->sc_bst; 127 pc->pc_bsh = sc->sc_bsh; 128 129 #ifdef PCI_NETBSD_CONFIGURE 130 pc->pc_ioext = extent_create("pciio", 0x10001000, 0x11ffffff, 131 M_DEVBUF, NULL, 0, EX_NOWAIT); 132 pc->pc_memext = extent_create("pcimem", 0x12000000, 0x13ffffff, 133 M_DEVBUF, NULL, 0, EX_NOWAIT); 134 pci_configure_bus(pc, pc->pc_ioext, pc->pc_memext, NULL, 0, 135 mips_cache_info.mci_dcache_align); 136 #endif 137 pba.pba_dmat = &pci_bus_dma_tag; 138 pba.pba_dmat64 = NULL; 139 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED; 140 pba.pba_bus = 0; 141 pba.pba_bridgetag = NULL; 142 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED | 143 PCI_FLAGS_MRL_OKAY | /*PCI_FLAGS_MRM_OKAY|*/ PCI_FLAGS_MWI_OKAY; 144 pba.pba_pc = pc; 145 config_found_ia(self, "pcibus", &pba, gt_print); 146 #endif 147 } 148 149 static int 150 gt_print(void *aux, const char *pnp) 151 { 152 153 /* XXX */ 154 return 0; 155 } 156 157 static void 158 gt_timer_init(struct gt_softc *sc) 159 { 160 161 /* stop timer0 */ 162 bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL, 163 bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL) & ~ENTC0); 164 /* mask timer0 interrupt */ 165 bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_MASTER_MASK, 166 bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_MASTER_MASK) & ~T0EXP); 167 } 168 169 #if 0 /* unused; now NetBSD/cobalt uses CPU INT5 for hardclock(9) */ 170 #define TIMER0_INIT_VALUE 500000 171 172 static void 173 gt_timer0_init(void *cookie) 174 { 175 struct gt_softc *sc = cookie; 176 177 bus_space_write_4(sc->sc_bst, sc->sc_bsh, 178 GT_TIMER_COUNTER0, TIMER0_INIT_VALUE); 179 /* start timer0 */ 180 bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL, 181 bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_CTRL) | ENTC0); 182 /* unmask timer0 interrupt */ 183 bus_space_write_4(sc->sc_bst, sc->sc_bsh, GT_MASTER_MASK, 184 bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_MASTER_MASK) | T0EXP); 185 } 186 187 static long 188 gt_timer0_read(void *cookie) 189 { 190 struct gt_softc *sc = cookie; 191 uint32_t counter0; 192 193 counter0 = bus_space_read_4(sc->sc_bst, sc->sc_bsh, GT_TIMER_COUNTER0); 194 counter0 = TIMER0_INIT_VALUE - counter0; 195 #if 0 196 counter /= 50; 197 #else 198 /* 199 * From pmax/pmax/dec_3min.c: 200 * 1/64 + 1/256 + 1/2048 = 41/2048 = 1/49.9512... 201 */ 202 counter0 = (counter0 >> 6) + (counter0 >> 8) + (counter0 >> 11); 203 #endif 204 return counter0; 205 } 206 #endif 207
Indexes created Thu Oct 02 01:09:59 GMT 2025