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intr.h revision 1.8.2.4 
      1 /*	$NetBSD: intr.h,v 1.8.2.4 2001/04/21 17:53:27 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2000 Soren S. Jorvang.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions, and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     18  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     25  * SUCH DAMAGE.
     26  */
     27 
     28 #define	IPL_NONE	0	/* Disable only this interrupt. */
     29 #define	IPL_BIO		1	/* Disable block I/O interrupts. */
     30 #define	IPL_NET		2	/* Disable network interrupts. */
     31 #define	IPL_TTY		3	/* Disable terminal interrupts. */
     32 #define	IPL_IMP		4	/* Memory allocation */
     33 #define	IPL_CLOCK	5	/* Disable clock interrupts. */
     34 #define	IPL_STATCLOCK	6	/* Disable profiling interrupts. */
     35 #define	IPL_HIGH	7	/* Disable all interrupts. */
     36 #define NIPL		8
     37 
     38 /* Interrupt sharing types. */
     39 #define IST_NONE	0	/* none */
     40 #define IST_PULSE	1	/* pulsed */
     41 #define IST_EDGE	2	/* edge-triggered */
     42 #define IST_LEVEL	3	/* level-triggered */
     43 
     44 /* Soft interrupt masks. */
     45 #define SIR_CLOCK	31
     46 #define SIR_NET		30
     47 #define SIR_CLOCKMASK	((1 << SIR_CLOCK))
     48 #define SIR_NETMASK	((1 << SIR_NET) | SIR_CLOCKMASK)
     49 #define SIR_ALLMASK	(SIR_CLOCKMASK | SIR_NETMASK)
     50 
     51 #ifdef _KERNEL
     52 #ifndef _LOCORE
     53 
     54 #include <mips/cpuregs.h>
     55 
     56 extern int		_splraise(int);
     57 extern int		_spllower(int);
     58 extern int		_splset(int);
     59 extern int		_splget(void);
     60 extern void		_splnone(void);
     61 extern void		_setsoftintr(int);
     62 extern void		_clrsoftintr(int);
     63 
     64 #define setsoftclock()	_setsoftintr(MIPS_SOFT_INT_MASK_0)
     65 #define setsoftnet()	_setsoftintr(MIPS_SOFT_INT_MASK_1)
     66 #define clearsoftclock() _clrsoftintr(MIPS_SOFT_INT_MASK_0)
     67 #define clearsoftnet()	_clrsoftintr(MIPS_SOFT_INT_MASK_1)
     68 
     69 #define splhigh()       _splraise(MIPS_INT_MASK)
     70 #define spl0()          (void)_spllower(0)
     71 #define splx(s)         (void)_splset(s)
     72 #define SPLSOFT		MIPS_SOFT_INT_MASK_0 | MIPS_SOFT_INT_MASK_1
     73 #define SPLBIO		SPLSOFT | MIPS_INT_MASK_4
     74 #define SPLNET		SPLBIO | MIPS_INT_MASK_1 | MIPS_INT_MASK_2
     75 #define SPLTTY		SPLNET | MIPS_INT_MASK_3
     76 #define SPLCLOCK	SPLTTY | MIPS_INT_MASK_0 | MIPS_INT_MASK_5
     77 #define splbio()        _splraise(SPLBIO)
     78 #define splnet()        _splraise(SPLNET)
     79 #define spltty()        _splraise(SPLTTY)
     80 #define splclock()      _splraise(SPLCLOCK)
     81 #define splvm()		splclock()
     82 #define splstatclock()  splclock()
     83 #define splsoftclock()	_splraise(MIPS_SOFT_INT_MASK_0)
     84 #define splsoftnet()	_splraise(MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
     85 #define spllowersoftclock() _spllower(MIPS_SOFT_INT_MASK_0)
     86 
     87 #define	splsched()	splhigh()
     88 #define	spllock()	splhigh()
     89 
     90 extern unsigned int	intrcnt[];
     91 #define SOFTCLOCK_INTR	0
     92 #define SOFTNET_INTR	1
     93 
     94 extern void *	cpu_intr_establish(int, int, int (*)(void *), void *);
     95 extern void *	icu_intr_establish(int, int, int, int (*)(void *), void *);
     96 
     97 #endif /* !_LOCORE */
     98 #endif /* _LOCORE */
     99