1 1.4 andvar /* $NetBSD: zs.c,v 1.4 2024/05/03 21:38:15 andvar Exp $ */ 2 1.1 tsutsui 3 1.1 tsutsui /*- 4 1.3 tsutsui * Copyright (c) 2008 Izumi Tsutsui. All rights reserved. 5 1.1 tsutsui * 6 1.1 tsutsui * Redistribution and use in source and binary forms, with or without 7 1.1 tsutsui * modification, are permitted provided that the following conditions 8 1.1 tsutsui * are met: 9 1.1 tsutsui * 1. Redistributions of source code must retain the above copyright 10 1.1 tsutsui * notice, this list of conditions and the following disclaimer. 11 1.1 tsutsui * 2. Redistributions in binary form must reproduce the above copyright 12 1.1 tsutsui * notice, this list of conditions and the following disclaimer in the 13 1.1 tsutsui * documentation and/or other materials provided with the distribution. 14 1.1 tsutsui * 15 1.1 tsutsui * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 1.1 tsutsui * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 1.1 tsutsui * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 1.1 tsutsui * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 1.1 tsutsui * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 1.1 tsutsui * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 1.1 tsutsui * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 1.1 tsutsui * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 1.3 tsutsui * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 1.3 tsutsui * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 1.1 tsutsui */ 26 1.1 tsutsui 27 1.1 tsutsui #ifdef CONS_ZS 28 1.1 tsutsui /* 29 1.1 tsutsui * optional Z85C30 serial support for Qube 2700 30 1.1 tsutsui */ 31 1.1 tsutsui 32 1.1 tsutsui #include <lib/libsa/stand.h> 33 1.2 tsutsui #include <lib/libkern/libkern.h> 34 1.2 tsutsui 35 1.1 tsutsui #include <dev/ic/z8530reg.h> 36 1.1 tsutsui 37 1.2 tsutsui #include <machine/cpu.h> 38 1.2 tsutsui 39 1.1 tsutsui #include "boot.h" 40 1.1 tsutsui #include "zs.h" 41 1.1 tsutsui 42 1.1 tsutsui #define ZSCLOCK 11059200 /* 19200 * 576 */ 43 1.1 tsutsui 44 1.1 tsutsui #define ZS_DELAY() delay(2) 45 1.1 tsutsui 46 1.1 tsutsui static uint8_t zs_read(void *, uint8_t); 47 1.1 tsutsui static void zs_write(void *, uint8_t, uint8_t); 48 1.1 tsutsui static void zs_write_reg(void *, uint8_t, uint8_t); 49 1.1 tsutsui static void zs_reset(void *); 50 1.1 tsutsui 51 1.1 tsutsui static uint8_t 52 1.1 tsutsui zs_read(void *dev, uint8_t reg) 53 1.1 tsutsui { 54 1.1 tsutsui volatile uint8_t *zs = dev; 55 1.1 tsutsui uint8_t val; 56 1.1 tsutsui 57 1.1 tsutsui val = *(volatile uint8_t *)(zs + reg); 58 1.1 tsutsui ZS_DELAY(); 59 1.1 tsutsui 60 1.1 tsutsui return val; 61 1.1 tsutsui } 62 1.1 tsutsui 63 1.1 tsutsui static void 64 1.1 tsutsui zs_write(void *dev, uint8_t reg, uint8_t val) 65 1.1 tsutsui { 66 1.1 tsutsui volatile uint8_t *zs = dev; 67 1.1 tsutsui 68 1.1 tsutsui *(volatile uint8_t *)(zs + reg) = val; 69 1.1 tsutsui ZS_DELAY(); 70 1.1 tsutsui } 71 1.1 tsutsui 72 1.1 tsutsui static void 73 1.1 tsutsui zs_write_reg(void *dev, uint8_t reg, uint8_t val) 74 1.1 tsutsui { 75 1.1 tsutsui 76 1.1 tsutsui zs_write(dev, ZS_CSR, reg); 77 1.1 tsutsui zs_write(dev, ZS_CSR, val); 78 1.1 tsutsui } 79 1.1 tsutsui 80 1.1 tsutsui static void 81 1.1 tsutsui zs_reset(void *dev) 82 1.1 tsutsui { 83 1.1 tsutsui 84 1.1 tsutsui /* clear errors */ 85 1.1 tsutsui zs_write_reg(dev, 9, 0); 86 1.1 tsutsui /* hardware reset */ 87 1.1 tsutsui zs_write_reg(dev, 9, ZSWR9_HARD_RESET); 88 1.1 tsutsui delay(1000); 89 1.1 tsutsui 90 1.4 andvar /* disable all interrupts */ 91 1.1 tsutsui zs_write_reg(dev, 1, 0); 92 1.1 tsutsui 93 1.1 tsutsui /* set TX/RX misc parameters and modes */ 94 1.1 tsutsui zs_write_reg(dev, 4, ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP); 95 1.1 tsutsui zs_write_reg(dev, 10, ZSWR10_NRZ); 96 1.1 tsutsui zs_write_reg(dev, 3, ZSWR3_RX_8); 97 1.1 tsutsui zs_write_reg(dev, 5, ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS); 98 1.1 tsutsui 99 1.1 tsutsui /* sync registers unused */ 100 1.1 tsutsui zs_write_reg(dev, 6, 0); 101 1.1 tsutsui zs_write_reg(dev, 7, 0); 102 1.1 tsutsui 103 1.1 tsutsui /* set baud rate generator mode */ 104 1.1 tsutsui zs_write_reg(dev, 14, ZSWR14_BAUD_FROM_PCLK); 105 1.1 tsutsui /* set clock mode */ 106 1.1 tsutsui zs_write_reg(dev, 11, ZSWR11_RXCLK_BAUD | ZSWR11_TXCLK_BAUD); 107 1.1 tsutsui /* set baud rate constant */ 108 1.1 tsutsui zs_write_reg(dev, 12, BPS_TO_TCONST(ZSCLOCK / 16, ZSSPEED)); 109 1.1 tsutsui zs_write_reg(dev, 13, 0); 110 1.1 tsutsui 111 1.1 tsutsui /* enable baud rate generator */ 112 1.1 tsutsui zs_write_reg(dev, 14, ZSWR14_BAUD_FROM_PCLK | ZSWR14_BAUD_ENA); 113 1.1 tsutsui /* disable all external interrupts */ 114 1.1 tsutsui zs_write_reg(dev, 15, 0); 115 1.1 tsutsui 116 1.1 tsutsui /* reset external status twice (see src/sys/dev/ic/z8530sc.c) */ 117 1.1 tsutsui zs_write(dev, ZS_CSR, ZSWR0_RESET_STATUS); 118 1.1 tsutsui zs_write(dev, ZS_CSR, ZSWR0_RESET_STATUS); 119 1.1 tsutsui 120 1.1 tsutsui /* enable TX and RX */ 121 1.1 tsutsui zs_write_reg(dev, 3, ZSWR3_RX_8 | ZSWR3_RX_ENABLE); 122 1.1 tsutsui zs_write_reg(dev, 5, 123 1.1 tsutsui ZSWR5_TX_8 | ZSWR5_DTR | ZSWR5_RTS | ZSWR5_TX_ENABLE); 124 1.1 tsutsui } 125 1.1 tsutsui 126 1.1 tsutsui void * 127 1.1 tsutsui zs_init(int addr, int speed) 128 1.1 tsutsui { 129 1.1 tsutsui void *zs; 130 1.1 tsutsui 131 1.2 tsutsui zs = (void *)MIPS_PHYS_TO_KSEG1(ZS_BASE + addr); 132 1.1 tsutsui zs_reset(zs); 133 1.1 tsutsui 134 1.1 tsutsui return zs; 135 1.1 tsutsui } 136 1.1 tsutsui 137 1.1 tsutsui void 138 1.1 tsutsui zs_putc(void *dev, int c) 139 1.1 tsutsui { 140 1.1 tsutsui uint8_t csr; 141 1.1 tsutsui 142 1.1 tsutsui do { 143 1.1 tsutsui csr = zs_read(dev, ZS_CSR); 144 1.1 tsutsui } while ((csr & ZSRR0_TX_READY) == 0); 145 1.1 tsutsui 146 1.1 tsutsui zs_write(dev, ZS_DATA, c); 147 1.1 tsutsui } 148 1.1 tsutsui 149 1.1 tsutsui int 150 1.1 tsutsui zs_getc(void *dev) 151 1.1 tsutsui { 152 1.1 tsutsui uint8_t csr, data; 153 1.1 tsutsui 154 1.1 tsutsui do { 155 1.1 tsutsui csr = zs_read(dev, ZS_CSR); 156 1.1 tsutsui } while ((csr & ZSRR0_RX_READY) == 0); 157 1.1 tsutsui 158 1.1 tsutsui data = zs_read(dev, ZS_DATA); 159 1.1 tsutsui return data; 160 1.1 tsutsui } 161 1.1 tsutsui 162 1.1 tsutsui int 163 1.1 tsutsui zs_scan(void *dev) 164 1.1 tsutsui { 165 1.1 tsutsui uint8_t csr, data; 166 1.1 tsutsui 167 1.1 tsutsui csr = zs_read(dev, ZS_CSR); 168 1.1 tsutsui if ((csr & ZSRR0_RX_READY) == 0) 169 1.1 tsutsui return -1; 170 1.1 tsutsui 171 1.1 tsutsui data = zs_read(dev, ZS_DATA); 172 1.1 tsutsui return data; 173 1.1 tsutsui } 174 1.1 tsutsui #endif /* CONS_ZS */ 175