gapspci_pci.c revision 1.2
1 /* $NetBSD: gapspci_pci.c,v 1.2 2001/04/24 19:43:25 marcus Exp $ */ 2 3 /*- 4 * Copyright (c) 2001 Marcus Comstedt. 5 * Copyright (c) 2001 Jason R. Thorpe. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Marcus Comstedt. 19 * 4. Neither the name of The NetBSD Foundation nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 /* 37 * PCI configuraiton space implementation for the SEGA GAPS PCI bridge. 38 */ 39 40 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/device.h> 46 47 #include <machine/cpu.h> 48 #include <machine/bus.h> 49 #include <machine/shbvar.h> 50 #include <machine/sysasicvar.h> 51 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/pcireg.h> 54 55 #include <dreamcast/dev/g2/gapspcivar.h> 56 57 void gaps_attach_hook(struct device *, struct device *, 58 struct pcibus_attach_args *); 59 int gaps_bus_maxdevs(void *, int); 60 pcitag_t gaps_make_tag(void *, int, int, int); 61 pcireg_t gaps_conf_read(void *, pcitag_t, int); 62 void gaps_conf_write(void *, pcitag_t, int, pcireg_t); 63 64 int gaps_intr_map(struct pci_attach_args *, pci_intr_handle_t *); 65 const char *gaps_intr_string(void *, pci_intr_handle_t); 66 void *gaps_intr_establish(void *, pci_intr_handle_t, 67 int, int (*)(void *), void *); 68 void gaps_intr_disestablish(void *, void *); 69 70 void 71 gaps_pci_init(struct gaps_softc *sc) 72 { 73 pci_chipset_tag_t pc = &sc->sc_pc; 74 75 memset(pc, 0, sizeof(*pc)); 76 77 pc->pc_attach_hook = gaps_attach_hook; 78 pc->pc_bus_maxdevs = gaps_bus_maxdevs; 79 pc->pc_make_tag = gaps_make_tag; 80 pc->pc_conf_read = gaps_conf_read; 81 pc->pc_conf_write = gaps_conf_write; 82 pc->pc_conf_v = sc; 83 84 pc->pc_intr_map = gaps_intr_map; 85 pc->pc_intr_string = gaps_intr_string; 86 pc->pc_intr_establish = gaps_intr_establish; 87 pc->pc_intr_disestablish = gaps_intr_disestablish; 88 89 if (bus_space_map(sc->sc_memt, 0x01001600, 0x100, 90 0, &sc->sc_pci_memh) != 0) 91 panic("gaps_pci_init: can't map PCI configuration space"); 92 } 93 94 #define GAPS_PCITAG_MAGIC 0x022473 95 96 void 97 gaps_attach_hook(struct device *bus, struct device *pci, 98 struct pcibus_attach_args *pba) 99 { 100 struct gaps_softc *sc = (void *) bus; 101 102 /* 103 * Now that we know there's a bus configured, go ahead and 104 * program the BAR on the device. 105 */ 106 pci_conf_write(&sc->sc_pc, GAPS_PCITAG_MAGIC, 107 PCI_MAPREG_START + 4, 0x01000000); 108 pci_conf_write(&sc->sc_pc, GAPS_PCITAG_MAGIC, PCI_COMMAND_STATUS_REG, 109 pci_conf_read(&sc->sc_pc, 0, PCI_COMMAND_STATUS_REG) | 110 PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE); 111 } 112 113 int 114 gaps_bus_maxdevs(void *v, int bus) 115 { 116 117 return (1); 118 } 119 120 pcitag_t 121 gaps_make_tag(void *v, int bus, int dev, int func) 122 { 123 124 if (bus == 0 && dev == 0 && func == 0) 125 return (GAPS_PCITAG_MAGIC); 126 127 return (0); 128 } 129 130 pcireg_t 131 gaps_conf_read(void *v, pcitag_t tag, int reg) 132 { 133 struct gaps_softc *sc = v; 134 135 if (tag != GAPS_PCITAG_MAGIC) 136 return (-1); 137 138 if (reg == (PCI_MAPREG_START + 4)) { 139 /* 140 * We fake the BAR -- just return the physical address 141 * to which the device is mapped. 142 */ 143 return (0x01001700); 144 } 145 146 return (bus_space_read_4(sc->sc_memt, sc->sc_pci_memh, reg)); 147 } 148 149 void 150 gaps_conf_write(void *v, pcitag_t tag, int reg, pcireg_t val) 151 { 152 struct gaps_softc *sc = v; 153 154 if (tag != GAPS_PCITAG_MAGIC) 155 return; 156 157 /* Disallow writing to the "BAR" ... it doesn't actually exist. */ 158 if (reg == (PCI_MAPREG_START + 4) && val != 0x01000000) 159 return; 160 161 bus_space_write_4(sc->sc_memt, sc->sc_pci_memh, reg, val); 162 } 163 164 int 165 gaps_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp) 166 { 167 168 /* We interrupt at the CPU's irq 11. */ 169 *ihp = 11; 170 return (0); 171 } 172 173 const char * 174 gaps_intr_string(void *v, pci_intr_handle_t ih) 175 { 176 177 return ("SH4 irq 11"); 178 } 179 180 void * 181 gaps_intr_establish(void *v, pci_intr_handle_t ih, int level, 182 int (*func)(void *), void *arg) 183 { 184 return sysasic_intr_establish(ih, SYSASIC_EVENT_EXT, 185 level, func, arg); 186 } 187 188 void 189 gaps_intr_disestablish(void *v, void *ih) 190 { 191 192 panic("gaps_intr_disestablish: not implemented"); 193 } 194
Indexes created Thu Sep 25 06:09:39 GMT 2025