clock_ebus.c revision 1.4 1 /* $NetBSD: clock_ebus.c,v 1.4 2011/06/12 04:33:29 tsutsui Exp $ */
2
3 /*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
34 __KERNEL_RCSID(0, "$NetBSD: clock_ebus.c,v 1.4 2011/06/12 04:33:29 tsutsui Exp $");
35
36 #include <sys/param.h>
37 #include <sys/kernel.h>
38 #include <sys/device.h>
39 #include <sys/systm.h>
40 #include <sys/timetc.h>
41
42 #include <dev/clock_subr.h>
43
44 #include <emips/ebus/ebusvar.h>
45 #include <emips/emips/machdep.h>
46 #include <machine/emipsreg.h>
47
48 /*
49 * Device softc
50 */
51 struct eclock_softc {
52 struct device sc_dev;
53 struct _Tc *sc_dp;
54 uint32_t sc_reload;
55 struct timecounter sc_tc;
56 struct todr_chip_handle sc_todr;
57 };
58
59 static int eclock_ebus_match(device_t, cfdata_t, void *);
60 static void eclock_ebus_attach(device_t, device_t, void *);
61
62 CFATTACH_DECL(eclock_ebus, sizeof (struct eclock_softc),
63 eclock_ebus_match, eclock_ebus_attach, NULL, NULL);
64
65 void eclock_init(device_t);
66
67 static void __eclock_init(device_t);
68 static int eclock_gettime(struct todr_chip_handle *, struct timeval *);
69 static int eclock_settime(struct todr_chip_handle *, struct timeval *);
70 static int eclock_ebus_intr(void *, void *);
71 static u_int eclock_counter(struct timecounter *);
72
73 /* BUGBUG resolve the gap between cpu_initclocks() and eclock_init(x) */
74 device_t clockdev = NULL;
75
76 void
77 eclock_init(device_t dev)
78 {
79
80 if (dev == NULL)
81 dev = clockdev;
82 if (dev == NULL)
83 panic("eclock_init");
84 __eclock_init(dev);
85 }
86
87 static void
88 __eclock_init(device_t dev)
89 {
90 struct eclock_softc *sc = (struct eclock_softc *)dev;
91 struct _Tc *tc = sc->sc_dp;
92 uint32_t reload = 10 * 1000000; /* 1sec in 100ns units (10MHz clock) */
93
94 /*
95 * Compute reload according to whatever value passed in,
96 * Warn if fractional
97 */
98 if (hz > 1) {
99 uint32_t r = reload / hz;
100 if ((r * hz) != reload)
101 printf("%s: %d Hz clock will cause roundoffs"
102 " with 10MHz xtal (%d)\n",
103 sc->sc_dev.dv_xname, hz, reload - (r * hz));
104 reload = r;
105 }
106
107 sc->sc_reload = reload;
108
109 /* Start the counter */
110 tc->DownCounterHigh = 0;
111 tc->DownCounter = sc->sc_reload;
112 tc->Control = TCCT_ENABLE | TCCT_INT_ENABLE;
113 }
114
115 /*
116 * Get the time of day, based on the clock's value and/or the base value.
117 * NB: At 10MHz, our 64bits FreeRunning is worth 58,426 years.
118 */
119
120 extern u_quad_t __qdivrem(u_quad_t uq, u_quad_t vq, u_quad_t *arq);
121
122
123 static int
124 eclock_gettime(struct todr_chip_handle *todr, struct timeval *tv)
125 {
126 struct eclock_softc *sc = todr->cookie;
127 struct _Tc *tc = sc->sc_dp;
128 uint64_t free;
129 int s;
130
131 /*
132 * 32bit processor, guard against interrupts in the middle of
133 * reading this 64bit entity
134 */
135 /* BUGBUG Should read it "twice" to guard against rollover too. */
136 s = splhigh();
137 free = tc->FreeRunning;
138 splx(s);
139
140 /*
141 * Big fight with the compiler here, it gets very confused by 64bits.
142 */
143 #if 0
144 /*
145 * This is in C:
146 */
147 {
148 uint64_t freeS, freeU;
149 freeS = free / (10 * 1000 * 1000);
150 freeU = free % (10 * 1000 * 1000);
151 tv->tv_sec = freeS;
152 tv->tv_usec = freeU / 10;
153 #if 0
154 printf("egt: s x%" PRIx64 " u x%lx (fs %" PRId64
155 " fu %" PRId64 " f %" PRId64 ")\n",
156 tv->tv_sec, tv->tv_usec, freeS, freeU, free);
157 #endif
158 }
159 #else
160 /*
161 * And this is in assembly :-)
162 */
163 {
164 u_quad_t r;
165 u_quad_t d = __qdivrem(free,(u_quad_t)10000000,&r);
166 uint32_t su, uu;
167 su = (uint32_t)d;
168 uu = (uint32_t)r;
169 uu = uu / 10; /* in usecs */
170 tv->tv_sec = su;
171 tv->tv_usec = uu;
172 #if 0
173 printf("egt: s x%" PRIx64 " u x%lx (fs %" PRId64
174 " fu %" PRId64 " f %" PRId64 ")\n",
175 tv->tv_sec, tv->tv_usec, d, r, free);
176 #endif
177 }
178 #endif
179
180 return 0;
181 }
182
183 /*
184 * Reset the TODR based on the time value.
185 */
186 static int
187 eclock_settime(struct todr_chip_handle *todr, struct timeval *tv)
188 {
189 struct eclock_softc *sc = todr->cookie;
190 struct _Tc *tc = sc->sc_dp;
191 uint64_t free, su;
192 uint32_t uu;
193 int s;
194
195 /* Careful with what we do here, else the compilerbugs hit hard */
196 s = splhigh();
197
198 su = (uint64_t)tv->tv_sec; /* 0(tv) */
199 uu = (uint32_t)tv->tv_usec; /* 8(tv) */
200
201
202 free = su * 10 * 1000 * 1000;
203 free += uu * 10;
204
205 tc->FreeRunning = free;
206 splx(s);
207
208 #if 0
209 /*
210 Should compile to something like this:
211 80260c84 <eclock_settime>:
212 80260c84: 27bdffc0 addiu sp,sp,-64
213 80260c88: afbf0038 sw ra,56(sp)
214 80260c8c: afb40030 sw s4,48(sp)
215 80260c90: afb3002c sw s3,44(sp)
216 80260c94: afb20028 sw s2,40(sp)
217 80260c98: afb10024 sw s1,36(sp)
218 80260c9c: afb00020 sw s0,32(sp)
219 80260ca0: afb50034 sw s5,52(sp)
220 80260ca4: 8c820000 lw v0,0(a0)
221 80260ca8: 00a09021 move s2,a1
222 80260cac: 8c55003c lw s5,60(v0) //s5=tc
223 80260cb0: 0c004122 jal 80010488 <_splraise>
224 80260cb4: 3404ff00 li a0,0xff00
225 80260cb8: 8e540000 lw s4,0(s2) //s4=tv->tv_sec=us
226 80260cbc: 3c060098 lui a2,0x98
227 80260cc0: 34c69680 ori a2,a2,0x9680 //a2=10000000
228 80260cc4: 02860019 multu s4,a2 //free=us*10000000
229 80260cc8: 8e530004 lw s3,4(s2) //s3=uu
230 80260ccc: 00402021 move a0,v0 //s=splhigh()
231 80260cd0: 001328c0 sll a1,s3,0x3
232 80260cd4: 00131040 sll v0,s3,0x1
233 80260cd8: 00451021 addu v0,v0,a1
234 80260cdc: 00401821 move v1,v0 //v1 = uu*10
235 80260ce0: 00001021 move v0,zero
236 80260ce4: 00003812 mflo a3 //a3=low(free)
237 80260ce8: 00e38821 addu s1,a3,v1 //s1=low(free)+(uu*10)
238 80260cec: 0227282b sltu a1,s1,a3 //a1=overflow bit
239 80260cf0: 00003010 mfhi a2 //a2=high(free)
240 80260cf4: 00c28021 addu s0,a2,v0 //s0=a2=high(free) [useless, v0=0]
241 80260cf8: 00b08021 addu s0,a1,s0 //s0+=overflow bit
242 80260cfc: aeb1000c sw s1,12(s5)
243 80260d00: aeb00008 sw s0,8(s5)
244 80260d04: 0c00413f jal 800104fc <_splset>
245 80260d08: 00000000 nop
246 */
247 #endif
248
249 #if 0
250 printf("est: s x%" PRIx64 " u x%lx (%d %d), free %" PRId64 "\n",
251 tv->tv_sec, tv->tv_usec, su, uu, free);
252 #endif
253
254 return 0;
255 }
256
257 static int
258 eclock_ebus_intr(void *cookie, void *f)
259 {
260 struct eclock_softc *sc = cookie;
261 struct _Tc *tc = sc->sc_dp;
262 struct clockframe *cf = f;
263 volatile uint32_t x;
264
265 x = tc->Control;
266 tc->DownCounterHigh = 0;
267 tc->DownCounter = sc->sc_reload;
268
269 hardclock(cf);
270 emips_clock_evcnt.ev_count++;
271
272 return 0;
273 }
274
275 static u_int
276 eclock_counter(struct timecounter *tc)
277 {
278 struct eclock_softc *sc = tc->tc_priv;
279 struct _Tc *Tc = sc->sc_dp;
280
281 return (u_int)Tc->FreeRunning; /* NB: chops to 32bits */
282 }
283
284
285 static int
286 eclock_ebus_match(device_t parent, cfdata_t cf, void *aux)
287 {
288 struct ebus_attach_args *ia = aux;
289 struct _Tc *mc = (struct _Tc *)ia->ia_vaddr;
290
291 if (strcmp("eclock", ia->ia_name) != 0)
292 return 0;
293 if ((mc == NULL) ||
294 (mc->Tag != PMTTAG_TIMER))
295 return 0;
296
297 return 1;
298 }
299
300 static void
301 eclock_ebus_attach(device_t parent, device_t self, void *aux)
302 {
303 struct ebus_attach_args *ia = aux;
304 struct eclock_softc *sc = (struct eclock_softc *)self;
305
306 sc->sc_dp = (struct _Tc *)ia->ia_vaddr;
307
308 /* NB: We are chopping our 64bit free-running down to 32bits */
309 sc->sc_tc.tc_get_timecount = eclock_counter;
310 sc->sc_tc.tc_poll_pps = 0;
311 sc->sc_tc.tc_counter_mask = 0xffffffff;
312 sc->sc_tc.tc_frequency = 10*1000*1000; /* 10 MHz */
313 sc->sc_tc.tc_name = "eclock"; /* BUGBUG is it unique per instance?? */
314 sc->sc_tc.tc_quality = 2000; /* uhu? */
315 sc->sc_tc.tc_priv = sc;
316 sc->sc_tc.tc_next = NULL;
317
318 #if DEBUG
319 printf(" virt=%p ", (void *)sc->sc_dp);
320 #endif
321 printf(": eMIPS clock\n");
322
323 /* Turn interrupts off, just in case. */
324 sc->sc_dp->Control &= ~(TCCT_INT_ENABLE|TCCT_INTERRUPT);
325
326 ebus_intr_establish(parent, (void *)ia->ia_cookie, IPL_CLOCK,
327 eclock_ebus_intr, sc);
328
329 #ifdef EVCNT_COUNTERS
330 evcnt_attach_dynamic(&clock_intr_evcnt, EVCNT_TYPE_INTR, NULL,
331 sc->sc_dev->dv_xname, "intr");
332 #endif
333
334 clockdev = self;
335 memset(&sc->sc_todr,0,sizeof sc->sc_todr);
336 sc->sc_todr.cookie = sc;
337 sc->sc_todr.todr_gettime = eclock_gettime;
338 sc->sc_todr.todr_settime = eclock_settime;
339 todr_attach(&sc->sc_todr);
340
341 tc_init(&sc->sc_tc);
342 }
343