clock_ebus.c revision 1.9
1 /* $NetBSD: clock_ebus.c,v 1.9 2025/09/07 21:45:12 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2010 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code was written by Alessandro Forin and Neil Pittman 8 * at Microsoft Research and contributed to The NetBSD Foundation 9 * by Microsoft Corporation. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 34 __KERNEL_RCSID(0, "$NetBSD: clock_ebus.c,v 1.9 2025/09/07 21:45:12 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/kernel.h> 38 #include <sys/device.h> 39 #include <sys/systm.h> 40 #include <sys/timetc.h> 41 42 #include <dev/clock_subr.h> 43 44 #include <emips/ebus/ebusvar.h> 45 #include <emips/emips/machdep.h> 46 #include <machine/emipsreg.h> 47 48 /* 49 * Device softc 50 */ 51 struct eclock_softc { 52 device_t sc_dev; 53 struct _Tc *sc_dp; 54 uint32_t sc_reload; 55 struct timecounter sc_tc; 56 struct todr_chip_handle sc_todr; 57 }; 58 59 static int eclock_ebus_match(device_t, cfdata_t, void *); 60 static void eclock_ebus_attach(device_t, device_t, void *); 61 62 CFATTACH_DECL_NEW(eclock_ebus, sizeof (struct eclock_softc), 63 eclock_ebus_match, eclock_ebus_attach, NULL, NULL); 64 65 void eclock_init(device_t); 66 67 static void __eclock_init(device_t); 68 static int eclock_gettime(struct todr_chip_handle *, struct timeval *); 69 static int eclock_settime(struct todr_chip_handle *, struct timeval *); 70 static int eclock_ebus_intr(void *, void *); 71 static u_int eclock_counter(struct timecounter *); 72 73 /* BUGBUG resolve the gap between cpu_initclocks() and eclock_init(x) */ 74 device_t clockdev = NULL; 75 76 void 77 eclock_init(device_t dev) 78 { 79 80 if (dev == NULL) 81 dev = clockdev; 82 if (dev == NULL) 83 panic("eclock_init"); 84 __eclock_init(dev); 85 } 86 87 static void 88 __eclock_init(device_t dev) 89 { 90 struct eclock_softc *sc = device_private(dev); 91 struct _Tc *tc = sc->sc_dp; 92 uint32_t reload = 10 * 1000000; /* 1sec in 100ns units (10MHz clock) */ 93 94 /* 95 * Compute reload according to whatever value passed in, 96 * Warn if fractional 97 */ 98 if (hz > 1) { 99 uint32_t r = reload / hz; 100 if ((r * hz) != reload) 101 printf("%s: %d Hz clock will cause roundoffs" 102 " with 10MHz xtal (%d)\n", 103 device_xname(sc->sc_dev), hz, reload - (r * hz)); 104 reload = r; 105 } 106 107 sc->sc_reload = reload; 108 109 /* Start the counter */ 110 tc->DownCounterHigh = 0; 111 tc->DownCounter = sc->sc_reload; 112 tc->Control = TCCT_ENABLE | TCCT_INT_ENABLE; 113 } 114 115 /* 116 * Get the time of day, based on the clock's value and/or the base value. 117 * NB: At 10MHz, our 64bits FreeRunning is worth 58,426 years. 118 */ 119 120 121 static int 122 eclock_gettime(struct todr_chip_handle *todr, struct timeval *tv) 123 { 124 struct eclock_softc *sc = device_private(todr->todr_dev); 125 struct _Tc *tc = sc->sc_dp; 126 uint64_t free; 127 int s; 128 129 /* 130 * 32bit processor, guard against interrupts in the middle of 131 * reading this 64bit entity 132 */ 133 /* BUGBUG Should read it "twice" to guard against rollover too. */ 134 s = splhigh(); 135 free = tc->FreeRunning; 136 splx(s); 137 138 /* 139 * Big fight with the compiler here, it gets very confused by 64bits. 140 */ 141 #if 1 142 /* 143 * This is in C: 144 */ 145 { 146 uint64_t freeS, freeU; 147 freeS = free / 10000000UL; 148 freeU = free % 10000000UL; 149 tv->tv_sec = freeS; 150 tv->tv_usec = freeU / 10; 151 #if 0 152 printf("egt: s x%" PRIx64 " u x%lx (fs %" PRId64 153 " fu %" PRId64 " f %" PRId64 ")\n", 154 tv->tv_sec, tv->tv_usec, freeS, freeU, free); 155 #endif 156 } 157 #else 158 /* 159 * And this is in assembly :-) 160 */ 161 { 162 u_quad_t r; 163 u_quad_t d = __qdivrem(free,(u_quad_t)10000000,&r); 164 uint32_t su, uu; 165 su = (uint32_t)d; 166 uu = (uint32_t)r; 167 uu = uu / 10; /* in usecs */ 168 tv->tv_sec = su; 169 tv->tv_usec = uu; 170 #if 0 171 printf("egt: s x%" PRIx64 " u x%lx (fs %" PRId64 172 " fu %" PRId64 " f %" PRId64 ")\n", 173 tv->tv_sec, tv->tv_usec, d, r, free); 174 #endif 175 } 176 #endif 177 178 return 0; 179 } 180 181 /* 182 * Reset the TODR based on the time value. 183 */ 184 static int 185 eclock_settime(struct todr_chip_handle *todr, struct timeval *tv) 186 { 187 struct eclock_softc *sc = device_private(todr->todr_dev); 188 struct _Tc *tc = sc->sc_dp; 189 uint64_t free, su; 190 uint32_t uu; 191 int s; 192 193 /* Careful with what we do here, else the compilerbugs hit hard */ 194 s = splhigh(); 195 196 su = (uint64_t)tv->tv_sec; /* 0(tv) */ 197 uu = (uint32_t)tv->tv_usec; /* 8(tv) */ 198 199 200 free = su * 10 * 1000 * 1000; 201 free += uu * 10; 202 203 tc->FreeRunning = free; 204 splx(s); 205 206 #if 0 207 /* 208 Should compile to something like this: 209 80260c84 <eclock_settime>: 210 80260c84: 27bdffc0 addiu sp,sp,-64 211 80260c88: afbf0038 sw ra,56(sp) 212 80260c8c: afb40030 sw s4,48(sp) 213 80260c90: afb3002c sw s3,44(sp) 214 80260c94: afb20028 sw s2,40(sp) 215 80260c98: afb10024 sw s1,36(sp) 216 80260c9c: afb00020 sw s0,32(sp) 217 80260ca0: afb50034 sw s5,52(sp) 218 80260ca4: 8c820000 lw v0,0(a0) 219 80260ca8: 00a09021 move s2,a1 220 80260cac: 8c55003c lw s5,60(v0) //s5=tc 221 80260cb0: 0c004122 jal 80010488 <_splraise> 222 80260cb4: 3404ff00 li a0,0xff00 223 80260cb8: 8e540000 lw s4,0(s2) //s4=tv->tv_sec=us 224 80260cbc: 3c060098 lui a2,0x98 225 80260cc0: 34c69680 ori a2,a2,0x9680 //a2=10000000 226 80260cc4: 02860019 multu s4,a2 //free=us*10000000 227 80260cc8: 8e530004 lw s3,4(s2) //s3=uu 228 80260ccc: 00402021 move a0,v0 //s=splhigh() 229 80260cd0: 001328c0 sll a1,s3,0x3 230 80260cd4: 00131040 sll v0,s3,0x1 231 80260cd8: 00451021 addu v0,v0,a1 232 80260cdc: 00401821 move v1,v0 //v1 = uu*10 233 80260ce0: 00001021 move v0,zero 234 80260ce4: 00003812 mflo a3 //a3=low(free) 235 80260ce8: 00e38821 addu s1,a3,v1 //s1=low(free)+(uu*10) 236 80260cec: 0227282b sltu a1,s1,a3 //a1=overflow bit 237 80260cf0: 00003010 mfhi a2 //a2=high(free) 238 80260cf4: 00c28021 addu s0,a2,v0 //s0=a2=high(free) [useless, v0=0] 239 80260cf8: 00b08021 addu s0,a1,s0 //s0+=overflow bit 240 80260cfc: aeb1000c sw s1,12(s5) 241 80260d00: aeb00008 sw s0,8(s5) 242 80260d04: 0c00413f jal 800104fc <_splset> 243 80260d08: 00000000 nop 244 */ 245 #endif 246 247 #if 0 248 printf("est: s x%" PRIx64 " u x%lx (%d %d), free %" PRId64 "\n", 249 tv->tv_sec, tv->tv_usec, su, uu, free); 250 #endif 251 252 return 0; 253 } 254 255 static int 256 eclock_ebus_intr(void *cookie, void *f) 257 { 258 struct eclock_softc *sc = cookie; 259 struct _Tc *tc = sc->sc_dp; 260 struct clockframe *cf = f; 261 volatile uint32_t x __unused; 262 263 x = tc->Control; 264 tc->DownCounterHigh = 0; 265 tc->DownCounter = sc->sc_reload; 266 267 hardclock(cf); 268 emips_clock_evcnt.ev_count++; 269 270 return 0; 271 } 272 273 static u_int 274 eclock_counter(struct timecounter *tc) 275 { 276 struct eclock_softc *sc = tc->tc_priv; 277 struct _Tc *Tc = sc->sc_dp; 278 279 return (u_int)Tc->FreeRunning; /* NB: chops to 32bits */ 280 } 281 282 283 static int 284 eclock_ebus_match(device_t parent, cfdata_t cf, void *aux) 285 { 286 struct ebus_attach_args *ia = aux; 287 struct _Tc *mc = (struct _Tc *)ia->ia_vaddr; 288 289 if (strcmp("eclock", ia->ia_name) != 0) 290 return 0; 291 if ((mc == NULL) || 292 (mc->Tag != PMTTAG_TIMER)) 293 return 0; 294 295 return 1; 296 } 297 298 static void 299 eclock_ebus_attach(device_t parent, device_t self, void *aux) 300 { 301 struct eclock_softc *sc = device_private(self); 302 struct ebus_attach_args *ia = aux; 303 304 sc->sc_dev = self; 305 sc->sc_dp = (struct _Tc *)ia->ia_vaddr; 306 307 /* NB: We are chopping our 64bit free-running down to 32bits */ 308 sc->sc_tc.tc_get_timecount = eclock_counter; 309 sc->sc_tc.tc_poll_pps = 0; 310 sc->sc_tc.tc_counter_mask = 0xffffffff; 311 sc->sc_tc.tc_frequency = 10 * 1000 * 1000; /* 10 MHz */ 312 sc->sc_tc.tc_name = "eclock"; /* BUGBUG is it unique per instance?? */ 313 sc->sc_tc.tc_quality = 2000; /* uhu? */ 314 sc->sc_tc.tc_priv = sc; 315 sc->sc_tc.tc_next = NULL; 316 317 #if DEBUG 318 printf(" virt=%p ", (void *)sc->sc_dp); 319 #endif 320 printf(": eMIPS clock\n"); 321 322 /* Turn interrupts off, just in case. */ 323 sc->sc_dp->Control &= ~(TCCT_INT_ENABLE|TCCT_INTERRUPT); 324 325 ebus_intr_establish(parent, (void *)ia->ia_cookie, IPL_CLOCK, 326 eclock_ebus_intr, sc); 327 328 #ifdef EVCNT_COUNTERS 329 evcnt_attach_dynamic(&clock_intr_evcnt, EVCNT_TYPE_INTR, NULL, 330 device_xname(self), "intr"); 331 #endif 332 333 clockdev = self; 334 memset(&sc->sc_todr, 0, sizeof sc->sc_todr); 335 sc->sc_todr.todr_dev = self; 336 sc->sc_todr.todr_gettime = eclock_gettime; 337 sc->sc_todr.todr_settime = eclock_settime; 338 todr_attach(&sc->sc_todr); 339 340 tc_init(&sc->sc_tc); 341 } 342
Indexes created Thu Oct 02 10:09:58 GMT 2025