dz_ebus.c revision 1.1 1 /* $NetBSD: dz_ebus.c,v 1.1 2011/01/26 01:18:50 pooka Exp $ */
2
3 /*-
4 * Copyright (c) 2010 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code was written by Alessandro Forin and Neil Pittman
8 * at Microsoft Research and contributed to The NetBSD Foundation
9 * by Microsoft Corporation.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: dz_ebus.c,v 1.1 2011/01/26 01:18:50 pooka Exp $");
35
36 #include "opt_ddb.h"
37
38 #include <sys/param.h>
39 #include <sys/systm.h>
40 #include <sys/callout.h>
41 #include <sys/ioctl.h>
42 #include <sys/tty.h>
43 #include <sys/proc.h>
44 #include <sys/buf.h>
45 #include <sys/conf.h>
46 #include <sys/file.h>
47 #include <sys/uio.h>
48 #include <sys/kernel.h>
49 #include <sys/syslog.h>
50 #include <sys/device.h>
51 #include <sys/kauth.h>
52
53 #include <machine/bus.h>
54 #include <machine/emipsreg.h>
55
56 #include <dev/cons.h>
57
58
59 #include <emips/ebus/ebusvar.h>
60 #include <emips/emips/cons.h>
61 //#include <emips/emips/machdep.h>
62
63 #include "ioconf.h" /* for dz_cd */
64
65 #define DZ_C2I(c) ((c)<<3) /* convert controller # to index */
66 #define DZ_I2C(c) ((c)>>3) /* convert minor to controller # */
67 #define DZ_PORT(u) ((u)&07) /* extract the port # */
68
69 struct dz_softc {
70 struct device sc_dev; /* Autoconf blaha */
71 struct evcnt sc_rintrcnt; /* recevive interrupt counts */
72 struct evcnt sc_tintrcnt; /* transmit interrupt counts */
73 struct _Usart *sc_dr; /* reg pointers */
74 bus_space_tag_t sc_iot;
75 bus_space_handle_t sc_ioh;
76 int sc_consline; /* console line, or -1 */
77 int sc_rxint; /* Receive interrupt count XXX */
78 u_char sc_brk; /* Break asserted on some lines */
79 u_char sc_dsr; /* DSR set bits if no mdm ctrl */
80 struct dz_linestate {
81 struct dz_softc *dz_sc; /* backpointer to softc */
82 int dz_line; /* channel number */
83 struct tty * dz_tty; /* what we work on */
84 } sc_dz;
85 };
86
87 void dzrint(struct dz_softc *, uint32_t);
88 void dzxint(struct dz_softc *, uint32_t);
89
90 #ifndef TIOCM_BRK
91 #define TIOCM_BRK 0100000 /* no equivalent */
92
93 static void dzstart(struct tty *);
94 static int dzparam(struct tty *, struct termios *);
95 static unsigned dzmctl(struct dz_softc *sc, int line,
96 int bits, /* one of the TIOCM_xx */
97 int how); /* one of the DMSET/BIS.. */
98
99 #include <dev/dec/dzkbdvar.h>
100 #endif
101
102 dev_type_open(dzopen);
103 dev_type_close(dzclose);
104 dev_type_read(dzread);
105 dev_type_write(dzwrite);
106 dev_type_ioctl(dzioctl);
107 dev_type_stop(dzstop);
108 dev_type_tty(dztty);
109 dev_type_poll(dzpoll);
110
111 const struct cdevsw dz_cdevsw = {
112 dzopen, dzclose, dzread, dzwrite, dzioctl,
113 dzstop, dztty, dzpoll, nommap, ttykqfilter, D_TTY
114 };
115
116 int
117 dzopen(dev_t dev, int flag, int mode, struct lwp *l)
118 {
119 struct tty *tp;
120 int unit, line;
121 struct dz_softc *sc;
122 int s, error = 0;
123
124 unit = DZ_I2C(minor(dev));
125 line = DZ_PORT(minor(dev));
126 if (unit >= dz_cd.cd_ndevs || dz_cd.cd_devs[unit] == NULL)
127 return (ENXIO);
128
129 sc = (void *)dz_cd.cd_devs[unit];
130
131 if (line > 0) /* FIXME fo rmore than one line */
132 return ENXIO;
133
134 tp = sc->sc_dz.dz_tty;
135 if (tp == NULL)
136 return (ENODEV);
137 tp->t_oproc = dzstart;
138 tp->t_param = dzparam;
139 tp->t_dev = dev;
140
141 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp))
142 return (EBUSY);
143
144 if ((tp->t_state & TS_ISOPEN) == 0) {
145 ttychars(tp);
146 if (tp->t_ispeed == 0) {
147 tp->t_iflag = TTYDEF_IFLAG;
148 tp->t_oflag = TTYDEF_OFLAG;
149 tp->t_cflag = TTYDEF_CFLAG;
150 tp->t_lflag = TTYDEF_LFLAG;
151 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED;
152 }
153 (void) dzparam(tp, &tp->t_termios);
154 ttsetwater(tp);
155 }
156 /* we have no modem control but..*/
157 if (dzmctl(sc, line, TIOCM_DTR, DMBIS) & TIOCM_CD)
158 tp->t_state |= TS_CARR_ON;
159 s = spltty();
160 while (!(flag & O_NONBLOCK) && !(tp->t_cflag & CLOCAL) &&
161 !(tp->t_state & TS_CARR_ON)) {
162 tp->t_wopen++;
163 error = ttysleep(tp, &tp->t_rawcv, true, 0);
164 tp->t_wopen--;
165 if (error)
166 break;
167 }
168 (void) splx(s);
169 if (error)
170 return (error);
171 return ((*tp->t_linesw->l_open)(dev, tp));
172 }
173 int
174 dzclose(dev_t dev, int flag, int mode, struct lwp *l)
175 {
176 struct dz_softc *sc;
177 struct tty *tp;
178 int unit, line;
179
180
181 unit = DZ_I2C(minor(dev));
182 line = DZ_PORT(minor(dev));
183 sc = (void *)dz_cd.cd_devs[unit];
184
185 tp = sc->sc_dz.dz_tty;
186
187 (*tp->t_linesw->l_close)(tp, flag);
188
189 /* Make sure a BREAK state is not left enabled. */
190 (void) dzmctl(sc, line, TIOCM_BRK, DMBIC);
191
192 /* Do a hangup if so required. */
193 if ((tp->t_cflag & HUPCL) || tp->t_wopen || !(tp->t_state & TS_ISOPEN))
194 (void) dzmctl(sc, line, 0, DMSET);
195
196 return (ttyclose(tp));
197 }
198 int
199 dzread(dev_t dev, struct uio *uio, int flag)
200 {
201 struct tty *tp;
202 struct dz_softc *sc;
203
204 sc = (void *)dz_cd.cd_devs[DZ_I2C(minor(dev))];
205
206 tp = sc->sc_dz.dz_tty;
207 return ((*tp->t_linesw->l_read)(tp, uio, flag));
208 }
209
210 int
211 dzwrite(dev_t dev, struct uio *uio, int flag)
212 {
213 struct tty *tp;
214 struct dz_softc *sc;
215
216 sc = (void *)dz_cd.cd_devs[DZ_I2C(minor(dev))];
217
218 tp = sc->sc_dz.dz_tty;
219 return ((*tp->t_linesw->l_write)(tp, uio, flag));
220 }
221
222 /*ARGSUSED*/
223 int
224 dzioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l)
225 {
226 struct dz_softc *sc;
227 struct tty *tp;
228 int unit, line;
229 int error;
230
231 unit = DZ_I2C(minor(dev));
232 line = 0;
233 sc = (void *)dz_cd.cd_devs[unit];
234 tp = sc->sc_dz.dz_tty;
235
236 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l);
237 if (error >= 0)
238 return (error);
239
240 error = ttioctl(tp, cmd, data, flag, l);
241 if (error >= 0)
242 return (error);
243
244 switch (cmd) {
245
246 case TIOCSBRK:
247 (void) dzmctl(sc, line, TIOCM_BRK, DMBIS);
248 break;
249
250 case TIOCCBRK:
251 (void) dzmctl(sc, line, TIOCM_BRK, DMBIC);
252 break;
253
254 case TIOCSDTR:
255 (void) dzmctl(sc, line, TIOCM_DTR, DMBIS);
256 break;
257
258 case TIOCCDTR:
259 (void) dzmctl(sc, line, TIOCM_DTR, DMBIC);
260 break;
261
262 case TIOCMSET:
263 (void) dzmctl(sc, line, *(int *)data, DMSET);
264 break;
265
266 case TIOCMBIS:
267 (void) dzmctl(sc, line, *(int *)data, DMBIS);
268 break;
269
270 case TIOCMBIC:
271 (void) dzmctl(sc, line, *(int *)data, DMBIC);
272 break;
273
274 case TIOCMGET:
275 *(int *)data = (dzmctl(sc, line, 0, DMGET) & ~TIOCM_BRK);
276 break;
277
278 default:
279 return (EPASSTHROUGH);
280 }
281 return (0);
282 }
283
284 /*ARGSUSED*/
285 void
286 dzstop(struct tty *tp, int flag)
287 {
288 if (tp->t_state & TS_BUSY)
289 if (!(tp->t_state & TS_TTSTOP))
290 tp->t_state |= TS_FLUSH;
291 }
292
293 struct tty *
294 dztty(dev_t dev)
295 {
296 struct dz_softc *sc = (void *)dz_cd.cd_devs[DZ_I2C(minor(dev))];
297 struct tty *tp = sc->sc_dz.dz_tty;
298
299 return (tp);
300 }
301
302 int
303 dzpoll( dev_t dev, int events, struct lwp *l)
304 {
305 struct tty *tp;
306 struct dz_softc *sc;
307
308 sc = (void *)dz_cd.cd_devs[DZ_I2C(minor(dev))];
309
310 tp = sc->sc_dz.dz_tty;
311 return ((*tp->t_linesw->l_poll)(tp, events, l));
312 }
313
314 void
315 dzstart(struct tty *tp)
316 {
317 struct dz_softc *sc;
318 struct clist *cl;
319 int unit, s;
320
321 unit = DZ_I2C(minor(tp->t_dev));
322 sc = (void *)dz_cd.cd_devs[unit];
323
324 s = spltty();
325 if (tp->t_state & (TS_TIMEOUT|TS_BUSY|TS_TTSTOP)) {
326 splx(s);
327 return;
328 }
329 cl = &tp->t_outq;
330 ttypull(tp);
331 if (cl->c_cc == 0) {
332 splx(s);
333 return;
334 }
335
336 tp->t_state |= TS_BUSY;
337
338 /* was idle, get it started */
339 dzxint(sc,USI_TXRDY);
340 splx(s);
341 }
342
343 static int rclk = 25000000; /* BUGBUGBUGBUG */
344
345 static int
346 dzdivisor(int baudrate)
347 {
348 int act_baud, divisor, error;
349
350 if (baudrate <= 0)
351 return (0);
352
353 divisor = (rclk/8)/(baudrate);
354 divisor = (divisor/2) + (divisor&1);
355
356 if (divisor <= 0)
357 return (-1);
358 act_baud = rclk / (divisor * 16);
359
360 /* 10 times error in percent: */
361 error = ((act_baud - baudrate) * 2000 / baudrate + 1) >> 1;
362
363 /* 3.0% maximum error tolerance: */
364 if (error < -30 || error > 30)
365 return (-1);
366
367 return (divisor);
368 }
369
370 static int
371 dzparam(struct tty *tp, struct termios *t)
372 {
373 struct dz_softc *sc;
374 int cflag = t->c_cflag;
375 int unit, line;
376 int speed;
377 unsigned lpr;
378 int s;
379 struct _Usart *dzr;
380
381 unit = DZ_I2C(minor(tp->t_dev));
382 line = DZ_PORT(minor(tp->t_dev));
383 sc = (void *)dz_cd.cd_devs[unit];
384
385 /* check requested parameters */
386 if (t->c_ispeed != t->c_ospeed)
387 return (EINVAL);
388 speed = dzdivisor(t->c_ispeed);
389 if (speed < 0)
390 return (EINVAL);
391
392 tp->t_ispeed = t->c_ispeed;
393 tp->t_ospeed = t->c_ospeed;
394 tp->t_cflag = cflag;
395
396 { static int didit=0;
397 if (!didit && t->c_ispeed != 38400)
398 printf("dzparam: c_ispeed %d ignored, keeping 38400\n",t->c_ispeed);
399 didit = 1;
400 }
401 speed = dzdivisor(38400);
402
403 if (speed == 0) {
404 (void) dzmctl(sc, line, 0, DMSET); /* hang up line */
405 return (0);
406 }
407
408 switch (cflag & CSIZE)
409 {
410 case CS5:
411 lpr = USC_BPC_5;
412 break;
413 case CS6:
414 lpr = USC_BPC_6;
415 break;
416 case CS7:
417 lpr = USC_BPC_7;
418 break;
419 default:
420 lpr = USC_BPC_8;
421 break;
422 }
423 if (cflag & CSTOPB)
424 lpr |= USC_2STOP;
425
426 if (cflag & PARENB) {
427 if (cflag & PARODD)
428 lpr |= USC_ODD;
429 else
430 lpr |= USC_EVEN;
431 } else
432 lpr |= USC_NONE;
433
434 s = spltty();
435
436 dzr = sc->sc_dr;
437
438 dzr->Baud = speed;
439 dzr->Control = USC_CLKDIV_4 | USC_TXEN | USC_RXEN | lpr;
440 #define USI_INTRS (USI_RXRDY|USI_RXBRK|USI_OVRE|USI_FRAME|USI_PARE)
441 dzr->IntrEnable = USI_INTRS;
442
443 (void) splx(s);
444 return (0);
445 }
446
447 static unsigned
448 dzmctl(struct dz_softc *sc, int line, int bits, int how)
449 {
450 unsigned mbits;
451 int s;
452 struct _Usart *dzr;
453
454 mbits = 0;
455
456 s = spltty();
457
458 dzr = sc->sc_dr;
459
460 /* we have no modem control bits (CD,RI,DTR,DSR,..) */
461 mbits |= TIOCM_CD;
462 mbits |= TIOCM_DTR;
463
464 if (dzr->ChannelStatus & USI_RXBRK)
465 mbits |= TIOCM_BRK;
466
467 switch (how)
468 {
469 case DMSET:
470 mbits = bits;
471 break;
472
473 case DMBIS:
474 mbits |= bits;
475 break;
476
477 case DMBIC:
478 mbits &= ~bits;
479 break;
480
481 case DMGET:
482 (void) splx(s);
483 return (mbits);
484 }
485
486 /* BUGBUG work in progress */
487 if (mbits & TIOCM_BRK) {
488 sc->sc_brk |= (1 << line);
489 dzr->Control |= USC_STTBRK;
490 } else {
491 sc->sc_brk &= ~(1 << line);
492 dzr->Control |= USC_STPBRK;
493 }
494
495 (void) splx(s);
496 return (mbits);
497 }
498
499
500 #if defined(DDB)
501 int dz_ddb = 0;
502 #endif
503
504 /* Receiver Interrupt */
505
506 void
507 dzrint(struct dz_softc *sc, uint32_t csr)
508 {
509 struct tty *tp;
510 int cc, mcc;
511 struct _Usart *dzr;
512
513 sc->sc_rxint++;
514 dzr = sc->sc_dr;
515
516 cc = dzr->RxData;
517 tp = sc->sc_dz.dz_tty;
518
519 if (csr & USI_RXBRK)
520 mcc = CNC_BREAK;
521 else
522 mcc = cc;
523
524 /* clear errors before we print or bail out */
525 if (csr & (USI_OVRE|USI_FRAME|USI_PARE))
526 dzr->Control = USC_RSTSTA;
527
528 if (!(tp->t_state & TS_ISOPEN)) {
529 wakeup(&tp->t_rawq);
530 return;
531 }
532
533 if (csr & USI_OVRE) {
534 log(LOG_WARNING, "%s: silo overflow, line %d\n",
535 sc->sc_dev.dv_xname, 0);
536 }
537
538 if (csr & USI_FRAME)
539 cc |= TTY_FE;
540 if (csr & USI_PARE)
541 cc |= TTY_PE;
542
543 #if defined(DDB)
544 /* ^P drops into DDB */
545 if (dz_ddb && (cc == 0x10))
546 Debugger();
547 #endif
548 (*tp->t_linesw->l_rint)(cc, tp);
549
550 }
551
552 /* Transmitter Interrupt */
553
554 void
555 dzxint(struct dz_softc *sc, uint32_t csr)
556 {
557 struct tty *tp;
558 struct clist *cl;
559 int ch;
560 struct _Usart *dzr;
561
562 dzr = sc->sc_dr;
563
564 tp = sc->sc_dz.dz_tty;
565 cl = &tp->t_outq;
566 tp->t_state &= ~TS_BUSY;
567
568 /* Just send out a char if we have one */
569 if (cl->c_cc) {
570 tp->t_state |= TS_BUSY;
571 ch = getc(cl);
572 dzr->TxData = ch;
573 dzr->IntrEnable = USI_TXRDY;
574 return;
575 }
576
577 /* Nothing to send; turn off intr */
578 dzr->IntrDisable = USI_TXRDY;
579
580 if (tp->t_state & TS_FLUSH)
581 tp->t_state &= ~TS_FLUSH;
582 else
583 ndflush (&tp->t_outq, cl->c_cc);
584
585 (*tp->t_linesw->l_start)(tp);
586 }
587
588 /* Machdep part of the driver
589 */
590 int dz_ebus_match(struct device *, struct cfdata *, void *);
591 void dz_ebus_attach(struct device *, struct device *, void *);
592 int dz_ebus_intr(void *, void *);
593
594 void dz_ebus_cnsetup(paddr_t);
595 void dz_ebus_cninit(struct consdev*);
596 int dz_ebus_cngetc(dev_t);
597 void dz_ebus_cnputc(dev_t, int);
598 void dz_ebus_cnpollc(dev_t, int);
599
600 static int dz_ebus_getmajor(void);
601
602 CFATTACH_DECL(dz_ebus, sizeof(struct dz_softc),
603 dz_ebus_match, dz_ebus_attach, NULL, NULL);
604
605 struct consdev dz_ebus_consdev = {
606 NULL, dz_ebus_cninit, dz_ebus_cngetc, dz_ebus_cnputc,
607 dz_ebus_cnpollc, NULL, NULL, NULL, NODEV, CN_NORMAL,
608 };
609
610 /* Points to the console regs. Special mapping until VM is turned on.
611 */
612 struct _Usart *dzcn;
613
614 int
615 dz_ebus_match(struct device *parent, struct cfdata *cf, void *aux)
616 {
617 struct ebus_attach_args *iba;
618 struct _Usart *us;
619
620 iba = aux;
621
622 if (strcmp(iba->ia_name, "dz") != 0)
623 return (0);
624
625 us = (struct _Usart *)iba->ia_vaddr;
626 if ((us == NULL) ||
627 (us->Tag != PMTTAG_USART))
628 return (0);
629
630 return (1);
631 }
632
633 void
634 dz_ebus_attach(struct device *parent, struct device *self, void *aux)
635 {
636 struct ebus_attach_args *iba;
637 struct dz_softc *sc;
638
639 iba = aux;
640 sc = (struct dz_softc *)self;
641
642 sc->sc_dr = (struct _Usart *)iba->ia_vaddr;
643 #if DEBUG
644 printf(" virt=%p ", (void *)sc->sc_dr);
645 #endif
646
647 printf(": neilsart 1 line");
648 ebus_intr_establish(parent, (void *)iba->ia_cookie, IPL_TTY,
649 dz_ebus_intr, sc);
650
651 sc->sc_rxint = sc->sc_brk = 0;
652 sc->sc_consline = 0;
653
654 /* Initialize our softc structure. Should be done in open? */
655
656 sc->sc_dz.dz_sc = sc;
657 sc->sc_dz.dz_line = 0;
658 sc->sc_dz.dz_tty = ttymalloc();
659
660 evcnt_attach_dynamic(&sc->sc_rintrcnt, EVCNT_TYPE_INTR, NULL,
661 sc->sc_dev.dv_xname, "rintr");
662 evcnt_attach_dynamic(&sc->sc_tintrcnt, EVCNT_TYPE_INTR, NULL,
663 sc->sc_dev.dv_xname, "tintr");
664
665 /* Initialize hw regs */
666 #if 0
667 DZ_WRITE_WORD(dr_csr, DZ_CSR_MSE | DZ_CSR_RXIE | DZ_CSR_TXIE);
668 DZ_WRITE_BYTE(dr_dtr, 0);
669 DZ_WRITE_BYTE(dr_break, 0);
670 #endif
671
672 /* Switch the console to virtual mode */
673 dzcn = sc->sc_dr;
674 /* And test it */
675 printf("\n");
676
677 }
678
679 static int
680 dz_ebus_getmajor(void)
681 {
682 extern const struct cdevsw dz_cdevsw;
683 static int cache = -1;
684
685 if (cache != -1)
686 return (cache);
687
688 return (cache = cdevsw_lookup_major(&dz_cdevsw));
689 }
690
691 int
692 dz_ebus_intr(void *cookie, void *f)
693 {
694 struct dz_softc *sc;
695 struct _Usart *dzr;
696 uint32_t csr;
697
698 sc = cookie;
699 dzr = sc->sc_dr;
700
701 #define USI_INTERRUPTS (USI_INTRS|USI_TXRDY)
702
703 for (; ((csr = (dzr->ChannelStatus & dzr->IntrMask)) & USI_INTERRUPTS) != 0;) {
704 if ((csr & USI_INTRS) != 0)
705 dzrint(sc, csr);
706 if ((csr & USI_TXRDY) != 0)
707 dzxint(sc, csr);
708 }
709
710 return (0);
711 }
712
713 void
714 dz_ebus_cnsetup(paddr_t addr)
715 {
716
717 dzcn = (struct _Usart *)addr;
718
719 #if 0
720 /* Initialize enough to xmit/recv via polling.
721 * Bootloader might or might not have done it.
722 */
723 dzcn->Control = USC_RXEN|USC_TXEN|USC_BPC_8|USC_NONE|USC_1STOP|USC_CLKDIV_4;
724 dzcn->Baud = 0x29; /* 38400 */
725 #endif
726
727 /*
728 * Point the console at us
729 */
730 cn_tab = &dz_ebus_consdev;
731 cn_tab->cn_pri = CN_NORMAL;/*CN_REMOTE?*/
732 cn_tab->cn_dev = makedev(dz_ebus_getmajor(), 0);
733 }
734
735 void dz_ebus_cninit(struct consdev *cn)
736 {
737 }
738
739 int
740 dz_ebus_cngetc(dev_t dev)
741 {
742 int c, s;
743
744 c = 0;
745 s = spltty();
746
747 while ((dzcn->ChannelStatus & USI_RXRDY) == 0)
748 DELAY(10);
749 c = dzcn->RxData;
750
751 splx(s);
752 if (c == 13) /* map cr->ln */
753 c = 10;
754 return (c);
755 }
756
757 int dzflipped = 0;
758 void
759 dz_ebus_cnputc(dev_t dev, int ch)
760 {
761 int timeout, s;
762
763 /* Don't hang the machine! */
764 timeout = 1 << 15;
765
766 s = spltty();
767
768 #if 1
769 /* Keep wired to hunt for a bug */
770 if (dzcn && (dzcn != (struct _Usart *)0xfff90000)) {
771 dzcn = (struct _Usart *)0xfff90000;
772 dzflipped++;
773 }
774 #endif
775
776 /* Wait until ready */
777 while ((dzcn->ChannelStatus & USI_TXRDY) == 0)
778 if (--timeout < 0)
779 break;
780
781 /* Put the character */
782 dzcn->TxData = ch;
783
784 splx(s);
785 }
786
787 /* Called before/after going into poll mode
788 */
789 void
790 dz_ebus_cnpollc(dev_t dev, int on)
791 {
792 }
793
794